TW201531580A - Ti膜之成膜方法 - Google Patents
Ti膜之成膜方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 150000002500 ions Chemical class 0.000 claims abstract description 23
- 230000015572 biosynthetic process Effects 0.000 claims description 27
- 239000011229 interlayer Substances 0.000 claims description 13
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 230000005684 electric field Effects 0.000 claims description 7
- 229910003074 TiCl4 Inorganic materials 0.000 abstract 1
- 238000003795 desorption Methods 0.000 abstract 1
- XJDNKRIXUMDJCW-UHFFFAOYSA-J titanium tetrachloride Chemical compound Cl[Ti](Cl)(Cl)Cl XJDNKRIXUMDJCW-UHFFFAOYSA-J 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 144
- 235000012431 wafers Nutrition 0.000 description 30
- 238000005755 formation reaction Methods 0.000 description 27
- 239000013078 crystal Substances 0.000 description 9
- 230000007246 mechanism Effects 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 5
- 229910008486 TiSix Inorganic materials 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 238000005121 nitriding Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000011010 flushing procedure Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 230000009257 reactivity Effects 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005108 dry cleaning Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
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Abstract
提供一種即便在低溫成膜中,仍可成膜出少Cl殘留,且阻抗相當低之Ti膜的Ti膜之成膜方法。
將基板配置於腔室內,並導入含有為Ti原料之TiCl4氣體、為還原氣體之H2氣體的處理氣體,且在該腔室內生成電漿以在基板上成膜出Ti膜時,在腔室內,除處理氣體外,導入Ar氣體來作為電漿生成氣體,而將Ar氣體電漿化以生成Ar離子,並將Ar離子作用在基板上所沉積之Ti膜,來促進Cl從Ti膜之脫離。
Description
本發明係關於一種Ti膜之成膜方法。
在半導體元件之製造中,對應於近期之高密度化及高積體化的要求,而有將電路結構作成多層配線構造之傾向,因此,為下層Si基板與上層配線層之連接部的接觸孔之電性連接用的填埋技術便變得重要。
為了取得此般之接觸孔或貫穿孔的填埋所使用的W膜等金屬配線(栓)與下層Si基板的歐姆接觸,在進行該等填埋之前,會進行於接觸孔或貫穿孔之內側成膜出Ti膜。
此般Ti膜雖自以往便使用物理蒸鍍(PVD)來加以成膜,但伴隨著元件之微細化及高積體化之要求,而變得多使用階段覆蓋(段差覆蓋性)較良好之化學蒸鍍(CVD)。
關於Ti膜之CVD成膜,係提議有使用TiCl4氣體、H2氣體、Ar氣體來作為成膜氣體,將該等透過噴淋頭來朝腔室導入,且一邊藉由階段加熱器來加熱半導體晶圓,一邊將高頻電力施加至平行平板電極,而將上述氣體電漿化,以藉由讓TiCl4氣體、H2氣體反應之電漿CVD來成膜出Ti膜的技術(例如專利文獻1)。
專利文獻1:日本特開平11-040518號公報。
在使用TiCl4氣體來成膜出Ti膜的情況,TiCl4氣體會分解而生成之Cl氣體會殘留於膜中,這便會成為Ti膜之阻抗上升的原因。然而,由於近年來,半導體元件係進一步地微細化,伴隨於此,Ti膜等其他膜相對於接觸孔或貫穿孔內之填埋金屬的所佔比例增加,故被要求有少Cl殘留且低阻抗
之Ti膜。
為了使得Ti膜中之Cl殘留量減少而低阻抗化,雖只要將成膜溫度提高至600℃左右便可讓Cl脫離,但近年來,從在元件使用耐熱溫度低之材料或防止雜質擴散之觀點看來,便趨向450℃以下之低溫成膜,而將成膜溫度高溫化是不實用的。
本發明係有鑑於上述要點,其課題在於提供一種可成膜出少Cl殘留且阻抗相當低之Ti膜的Ti膜之成膜方法。
亦即,本發明係提供一種Ti膜之成膜方法,係將基板配置於腔室內,並導入含有為Ti原料之TiCl4氣體、為還原氣體之H2氣體之處理氣體,且在該腔室內生成電漿以在基板上成膜出Ti膜的Ti膜之成膜方法,其係在該腔室內,除該處理氣體外,導入Ar氣體來作為電漿生成氣體,而將Ar氣體電漿化以生成Ar離子,並將Ar離子作用在基板上所沉積之Ti膜,來促進Cl從Ti膜之脫離。
本發明中,較佳地,Ti膜成膜時的溫度為450℃以下。又較佳地,Ti膜成膜時之氣體流量係:TiCl4氣體:1~100mL/min(sccm);H2氣體:20~5000mL/min(sccm);Ar氣體流量:100~10000mL/min(sccm)。又較佳地,成膜處理時之該腔室內的壓力係13.3~1333Pa之範圍。
又,本發明中,較佳地,係將基板載置於該腔室內所設置之載置台上,並將阻抗調整電路連接於設置在載置台所連接之電極的傳送路徑,而藉此來讓從電漿所見之該傳送路徑的阻抗下降,而讓從電漿流經基板之電流增加,以使得Ar離子高能量化。在上述情況,藉由將該載置台之該電極作為下部電極,並以對向於該下部電極之方式來設置上部電極,而將高頻電力供給至該上部電極,便可以形成於該上部電極與該下部電極之間的高頻電場來生成電漿。此般之構造中,該高頻電力之功率較佳地為100~3000W。
進一步地,本發明中,該基板係可具有Si部分以及由形成於其上之SiO2所構成之層間絕緣膜,於該層間絕緣膜係以面向該Si部分之方式來形成有孔,在該基板成膜出Ti膜時,形成於該Si部分之Ti膜的膜厚會較形成於該層間絕緣膜之Ti膜的膜厚要厚。
根據本發明,由於係將Ar氣體導入來作為電漿生成氣體,將Ar氣體電漿化以生成Ar離子,而讓Ar離子作用於沉積於基板上之Ti膜,來促進Cl從Ti膜之脫離,故即便低溫成膜,仍可成膜出少Cl殘留,且阻抗相當低的Ti膜。
1‧‧‧腔室
2‧‧‧晶座
5‧‧‧加熱器
10‧‧‧噴淋頭
20‧‧‧氣體供給機構
22‧‧‧TiCl4氣體供給源
23‧‧‧Ar氣體供給源
24‧‧‧H2氣體供給源
41‧‧‧高頻電源
42‧‧‧電極
42a‧‧‧傳送路徑
43‧‧‧阻抗調整電路
53‧‧‧排氣裝置
60‧‧‧控制部
62‧‧‧記憶部
62a‧‧‧記憶媒體
100‧‧‧成膜裝置
110‧‧‧Si基板
111‧‧‧層間絕緣膜
112‧‧‧接觸孔
113‧‧‧Ti膜
114‧‧‧TiSix膜
115‧‧‧TiN膜
116‧‧‧金屬
W‧‧‧半導體晶圓
圖1係顯示用以實施本發明一實施形態相關的Ti膜之成膜方法的成膜裝置一範例之概略剖面圖。
圖2係顯示本發明一實施形態相關的Ti膜之成膜方法的實施所使用之晶圓構造例的剖面圖。
圖3係顯示Ti膜成膜後及矽化後之晶圓狀態的剖面圖。
圖4係用以說明本發明之機制的圖式。
圖5係用以說明阻抗調整電路之機能的成膜裝置之概略圖。
圖6係以(a)以往與(b)本發明實施形態來比較Si基板上及由SiO2所構成之層間絕緣膜上的Ti膜厚度用之圖式。
圖7係顯示從圖6(a)、(b)之狀態,形成TiSix膜、成膜出TiN阻隔膜後,填埋金屬後的狀態之圖式。
圖8係顯示在Si基板上及由SiO2所構成之層間絕緣膜上依照本發明實施形態來成膜出Ti膜時,成膜時間與膜厚之關係的圖式。
以下,便參照添附圖式,就本發明實施形態來具體地說明。
以下說明中,氣體之流量單位雖使用mL/min,但由於氣體會因溫度及氣壓而使得體積有較大地變化,故本發明中係使用換算成標準狀態之值。另外,由於換算成標準狀態之流量通常以sccm(Standerd Cubic Centimeter per Minutes)來表示,故併記為sccm。此處之標準狀態係溫度0℃(273.15K),氣壓1atm(101325Pa)之狀態。
圖1係顯示用以實施本發明一實施形態相關的Ti膜之成膜方法的成膜裝置之一範例的概略剖面圖。
成膜裝置100係構成為藉由在平行平板電極形成高頻電場來形成電漿,並且藉由CVD法來成膜出Ti膜之電漿CVD-Ti成膜裝置。
該成膜裝置100係具有略圓筒狀之腔室1。腔室1之內部係以其中央下部之圓筒狀支撐構件3來加以支撐的狀態而設置有用以水平地支撐為被處理基板之Si晶圓(以下僅稱為晶圓)W之載置台(台)而以AIN所構成之晶座2。晶座2外緣部係設置有用以引導晶圓W之引導環4。又,晶座2係填埋有以鉬等高熔點金屬所構成之加熱器5,該加熱器5係藉由從加熱電源6供電而將為被處理基板之晶圓W加熱至既定溫度。
腔室1之頂壁1a係透過絕緣構件9來設置有亦作為平行平板電極之上部電極機能的預混型噴淋頭10。噴淋頭10係具有基材構件11與噴淋板12,噴淋板12外周部係透過貼附防止用而成為圓環狀之中間構件13,以未圖示之螺絲固定於基材構件11。噴淋板12係成為凸緣狀,且在其內部形成有凹部,而在基材構件11與噴淋板12之間形成有氣體擴散空間14。基材構件11係於其外周形成有凸緣部11a,該凸緣部11a會被絕緣構件9所支撐。噴淋板12係形成有複數氣體噴出孔15,基材構件11中央附近則形成有一個氣體導入孔16。
然後,該氣體導入孔16係連接於氣體供給機構20之氣體管線。
氣體供給機構20係具有供給為清潔氣體之ClF3氣體的ClF3氣體供給源21、供給為Ti原料氣體之TiCl4氣體的TiCl4氣體供給源22、供給作為電漿生成氣體或沖淨氣體來加以使用之Ar氣體的Ar氣體供給源23、供給為還原氣體之H2氣體的H2氣體供給源24、供給為氮化氣體之NH3氣體的NH3供給源25、供給N2氣體的N2氣體供給源26。然後,ClF3氣體供給源21、TiCl4氣體供給源22、Ar氣體供給源23、H2氣體供給源24、NH3氣體供給源25、N2氣體供給源26會分別連接於ClF3氣體供給管線28及35、TiCl4氣體供給管線29、Ar氣體供給管線30、H2氣體供給管線31、NH3氣體供給管線32、N2氣體供給管線33。然後,各氣體管線係設置有質流控制器37及夾置質流控制器37之2個閥36。
TiCl4氣體供給管線29係連接有ClF3氣體供給管線28及Ar氣體供給管線30。又,H2氣體供給管線31係連接有NH3氣體供給管線32、N2氣體供給管線33及ClF3氣體供給管線35。TiCl4氣體供給管線29及H2氣體供
給管線31係連接於氣體混合部38,而在此所混合之混合氣體會透過氣體配管39來連接於該氣體導入孔16。然後,混合氣體係經由氣體導入孔16而到達氣體擴散空間14,並通過噴淋板12之氣體噴出孔15而朝向腔室1內之晶圓W來被加以噴出。
噴淋頭10係透過匹配器40來連接有高頻電源41,且從該高頻電源41供給高頻電力至噴淋板10。噴淋頭10係具有作為平行平板電極之上部電極的機能。另一方面,晶座2表面附近係埋設有具有作為平行平板電極之下部電極的機能之電極42。從而,藉由供給高頻電力至噴淋頭10,來在噴淋頭10與電極42之間形成高頻電場,而藉由該電場,來將處理氣體電漿化。高頻電源41之頻率較佳地係設定為200kHz~13.56MHz,典型來說為使用450kHz。
電極42所連接之傳送路徑42a係連接有阻抗調整電路43。阻抗調整電路43係用以讓從電漿看來之電極42所連接的傳送路徑42a之阻抗下降,而讓從電漿流通於電極42之電流增加者,例如,由線圈44與可變電容45所構成。流通於傳送路徑42a之電流會藉由感應器46來檢出,並基於該檢出值來控制阻抗調整電路43之電抗。
又,噴淋頭10之基材構件11係設置有用以加熱噴淋頭10之加熱器47。該加熱器47係連接有加熱器電源48,並藉由從加熱器電源48供電至加熱器47來加熱噴淋頭10至所欲之溫度。基材構件11上部所形成之凹部係設置有隔熱構件49。
腔室1之底壁1b中央部係形成有圓形孔50,底壁1b係以包覆該孔50之方式來設置有朝向下方突出之排氣室51。排氣室51側面係連接有排氣管52,該排氣管52係連接有排氣裝置53。然後,可藉由讓該排氣裝置53作動,來將腔室1內減壓至既定真空度。
晶座2係相對於晶座2表面來可升降地設置有用以支撐晶圓W並升降之3根(僅圖示2根)的晶圓支撐銷54。然後,晶圓支撐銷54係藉由汽缸等驅動機構56透過支撐板55來進行升降。
腔室1側壁係設置有用以在與腔室1鄰接設置之未圖示的晶圓搬送室之間進行晶圓W之搬出入的搬出入口57,以及開閉該搬出入口57之閘閥58。
為成膜裝置100之構成部的加熱電源6及48、閥36、質流控制器37、匹配器40、高頻電源41、可變電容45、驅動機構56等係構成為連接於具備有微處理器(電腦)之控制部60來加以控制。又,控制部60係連接有由為了讓操作者管理成膜裝置100而進行指令之輸入操作等鍵盤,以及將成膜裝置100之運作狀況可視化來加以顯示之顯示器等所構成的使用者介面61。進一步地,控制部60係連接有儲存以控制部60之控制來實現成膜裝置100所實行之各種處理用的程式,以及依照處理條件來讓成膜裝置100之各構成部實行處理的程式,亦即處理配方的記憶部62。處理配方係被記憶於記憶部62中之記憶媒體62a。記憶媒體可為硬碟等固定者,亦可為CDROM、DVD等可搬性者。又,亦可從其他裝置,例如透過專用線路來適當地傳送配方。然後,依需要,藉由從使用者介面61之指示等從記憶部62叫出任意處理配方,以讓控制部60實行,便會在控制部60之控制下,進行在成膜裝置100中之所欲的處理。
接著,便就使用上述成膜裝置100來進行的Ti膜之成膜方法來加以說明。
本實施形態中,晶圓W例如如圖2所示,係可使用具有在Si基板101上形成有層間絕緣膜111,並於層間絕緣膜111形成有到達至Si基板110之雜質擴散區域110a的接觸孔112之構造者。
在對此般構造之晶圓W藉由成膜裝置100來成膜出Ti膜時,首先,係調整腔室1內之壓力後,開啟閘閥58,並從搬送室(未圖示)透過搬出入口57來將具有圖2構造之晶圓W朝腔室1內搬入。然後,維持腔室1內為既定真空度,並將晶圓W預備加熱,而在晶圓W之溫度幾乎穩定的時間點,將為電漿生成氣體之Ar氣體、為還原氣體之H2氣體、為Ti原料氣體之TiCl4氣體流至未圖示之預流管線而進行預流後,同樣地保持氣體流量及壓力而切換為成膜用管線,並將該等氣體透過噴淋頭10來導入至腔室1內。
然後,開始該等氣體之導入後,從高頻電源41來施加高頻電力至噴淋頭10,而生成被導入至腔室1內之Ar氣體、H2氣體、TiCl4氣體的電漿,並在以加熱器5來加熱至既定溫度之晶圓W上讓電漿化之氣體反應。藉此,如圖3(a)所示,便會在Si基板(Si部分)110表面沉積Ti膜113。然後,
如圖3(b)所示,藉由讓該Ti膜113與接觸孔112底之Si基板110反應,便會形成TiSix膜114。
在Ti膜成膜時,雖以往亦將氣體電漿化,但電漿化之目的不過是用以提高氣體自身之反應性,而在成膜溫度為450℃以下時,便無法將Ti膜中殘留Cl充分地降低。
相對於此,本實施形態中,如圖4所示,藉由高頻電場來將為電漿生成氣體之Ar氣體電漿化以生成高能量的Ar離子,並讓該Ar離子作用於Ti膜,以促進Cl從Ti膜中之脫離。由於Ar離子具有直進性,故Ar離子會到達接觸孔底部且亦促進Cl從接觸孔底部之Ti膜的脫離。藉此,即便450℃以下的成膜溫度,亦可得到少Cl殘留且低阻抗之Ti膜。又,Ar離子亦具有蝕刻作用及濺鍍作用,藉此,便可去除接觸孔開口之突出或平坦部之Ti膜。
為了有效地發揮Ar離子之Cl脫離作用,較佳地係讓Ar氣體流量及高頻功率較以往增加。藉此,便可大量地供給高能量之Ar離子至Ti膜,以促進Cl之脫離。又,較佳地係讓TiCl4氣體流量較以往增加,且讓H2氣體較以往減少。由於以往係以H2來還原TiCl4而生成HCl之反應作為主體,故會盡可能地減少Ti流量,而增加H2氣體流量,但本實施形態中,係可藉由Ar離子,來在Cl或TiClx的狀態下讓Cl脫離,故H2氣體只要少量即可,又,從讓TiCl4充分地到達至接觸孔底部之觀點看來,讓TiCl4氣體流量增加是有利的。
如上述,為了得到本實施形態之Ar離子的作用,則需要較大之功率,但由於從電漿流通至晶圓W之電流乃係一部分,而一半以上則會流通至腔室壁部,故當供給所需功率的高頻電力時,從電漿朝腔室壁部流通之電流會變大,便有讓電漿變得不安定而產生異常放電等之虞。
於是,圖1之成膜裝置中,係在晶座2內之電極42所連接的傳送路徑42a設置有阻抗調整電路43,而可調整從電漿所見之傳送路徑42a的阻抗,便可解決此般之問題。
亦即,這是因為加大功率便會加大電漿與晶圓之間的電漿鞘區之電位差V而加速離子,但依照歐姆定律(V=ZI),則只要能讓從電漿朝晶圓流通之電流I增加,即便高頻功率較低,仍能加大電位差。
從電漿至晶圓之間係有所謂的電漿鞘區與晶座之電容成分,而該等會成為阻抗,但如圖5所示,藉由阻抗調整電路43,便會抵消該等電容成分,而盡可能地降低傳送路徑42之阻抗,便可有效地加大從電漿透過晶圓W流通於傳送路徑42a之電流。因此,便可以較小之功率來充分地發揮Ar離子之作用,可促進Cl的脫離並且促進成膜反應。另外,雖圖1中使用組合線圈44與可變電容45者來作為阻抗調整電路43,而藉由可變電容45來調整阻抗,但並不被限制於此。
又,藉由加大從電漿流通晶圓W之電流,便可相對地讓從電漿朝腔室壁部流通之電流變小,且即便加大高頻功率,仍可讓電漿安定化。
本實施形態中,如上述般藉由阻抗調整電路43之存在,則即便高頻功率變低仍可得到Ar離子之Cl脫離作用,從此般觀點看來,高頻功率之範圍較適合為100~3000W。當小於100W時,便有讓Ti膜中之Cl充分地脫離,且促進成膜之效果變得不夠充分之虞,又,當超過3000W時,又有讓電漿變得不安定之虞及產生電漿損害之虞。
在Ti膜之成膜時,從高頻電源41所供給之高頻電力的頻率較佳地係200kHz~13.56MHz,典型來說為使用450kHz。這是因為有利於將作為電漿氣體而被導入之Ar氣體成為高能量的Ar離子之故。
關於成膜溫度如上述般,從元件之耐熱性及雜質擴散之抑制的觀點來看,較佳地係450℃以下。但是,由於當溫度過低時,無法得到良好的膜質,故較佳地係350℃以上。
雖腔室1內之壓力越低壓則電漿損害越低,但當壓力過低時,會使得Ti膜之面內均勻性(阻抗質)明顯地惡化。又,由於當壓力過高時,Ti膜之阻抗質會變高故不佳。因此,便考量該等之問題點而規定較佳的範圍。
當彙整Ti膜之成膜條件的具體範圍時,便如下表示。
高頻電力之功率:100~3000W
TiCl4氣體流量(用以成膜之流量):1~100mL/min(sccm),更佳地係3.5~20mL/min(sccm)
Ar氣體流量:100~10000mL/min(sccm)
H2氣體流量:20~5000mL/min(sccm)
腔室內壓力:13.3~1333Pa(0.1~10Torr)
成膜時之晶圓溫度:350~450℃
另外,成膜時間會依照欲得到之膜厚來適當設定。Ti膜之膜厚較佳地係1~10nm。
了解到在實施形態中,成膜條件會與以往完全不同,且可藉由上述範圍之條件,在所謂450℃以下之低溫成膜中,提高Ti膜之選擇性。亦即,可提高Ti膜相對於Si之成膜速度,而降低相對於SiO2之成膜速度。因此,因此,相對於以往如圖6(a)所示,Ti膜113係在Si基板(Si部分)110上及在由SiO2所構成之層間絕緣膜111上會成膜出幾乎相同之厚度,則本實施形態之情況如圖6(b)所示,會在需要形成接觸區域之Si基板110上形成有較厚之Ti膜,而在由SiO2所構成之層間絕緣膜111上形成有較薄之Ti膜。從而,如圖7(a)、(b)所示,在形成TiSix膜114,而進一步地成膜出TiN阻隔膜115後,便填埋入金屬116的情況,相較於(a)之以往的情況,(b)之本實施形態的情況可讓填埋入接觸孔112之金屬116的體積變大,並可降低填埋金屬(栓)之阻抗。
以往,雖已知有在高溫區域中因反應性之差異來得到Ti膜之選擇性的技術,但在此般低溫區域中可得到選擇性卻是首見的想法。
實際上,便以本實施形態之範圍的下述條件,來在Si上及SiO2上成膜出Ti膜。
溫度:450℃
TiCl4氣體流量:20mL/min(sccm)
Ar氣體流量:2000mL/min(sccm)
H2氣體流量:20mL/min(sccm)
腔室內壓力:200Pa(1.5Torr)
高頻電力之功率:2500W
於圖8顯示此時成膜時間與膜厚之關係。如該圖所示,確認了藉由本實施形態之條件,Si上之Ti膜的成膜速度會較SiO2上要高,且可得到選擇性。
如上述,進行Ti膜之成膜後,亦可依需要來實施Ti膜之氮化處理。該氮化處理中,係在上述Ti膜之成膜結束後,成為停止TiCl4氣體,並讓H2氣體及Ar氣體繼續流的狀態,而將腔室1內加熱至適當的溫度,流入NH3
氣體來作為氮化氣體,並且從高頻電源41將高頻電力施加至噴淋頭10以將處理氣體電漿化,而藉由電漿化之處理氣體來氮化Ti膜表面。
在Ti膜成膜後或氮化處理後,開啟閘閥58,並透過搬出入口57來將晶圓W朝未圖示之晶圓搬送室搬出。
如此一來,在Ti膜及依需要對既定片數之晶圓進行氮化處理後,進行腔室1之清潔。該處理係藉由在腔室1內不存在有晶圓之狀態下,在腔室1內從ClF3氣體供給源21透過ClF3氣體供給管線28及35來導入ClF3氣體,並一邊將噴淋頭10加熱至適當之溫度,一邊進行乾式清潔來加以進行。
又,雖本範例中,係同時地供給Ti原料氣體、還原氣體,而藉由電漿CVD來成膜出Ti膜,但亦可將Ti原料氣體與還原氣體之供給,以夾置利用Ar氣體或N2氣體般之沖淨氣體的沖淨之方式來交互地重複,並在生成電漿之狀態下以原子層沉積法(ALD法)來成膜出Ti膜。
另外,本發明並不被限定於上述實施形態而可有各種變形。例如,上述實施形態中,雖就同時地供給為Ti原料氣體之TiCl4氣體與為還原氣體之H2氣體,並藉由電漿CVD來成膜出Ti膜之範例來加以表示,但亦可將TiCl4氣體與H2氣體之供給,以夾置利用Ar氣體或N2氣體般之沖淨氣體的沖淨之方式來交互地重複,並在生成電漿之狀態下以原子層沉積法(ALD法)來成膜出Ti膜。又,本實施形態中,雖藉由將高頻電力施加至噴淋頭來形成高頻電場以生成電漿,但亦可將高頻電力施加至晶座,又,電漿生成機構亦不需被限制於此般平行平板型的電漿形成機構。
Claims (9)
- 一種Ti膜之成膜方法,係將基板配置於腔室內,並導入含有為Ti原料之TiCl4氣體、為還原氣體之H2氣體之處理氣體,且在該腔室內生成電漿以在基板上成膜出Ti膜的Ti膜之成膜方法,其係在該腔室內,除該處理氣體外,導入Ar氣體來作為電漿生成氣體,而將Ar氣體電漿化以生成Ar離子,並將Ar離子作用在基板上所沉積之Ti膜,來促進Cl從Ti膜之脫離。
- 如申請專利範圍第1項之Ti膜之成膜方法,其中Ti膜成膜時的溫度為450℃以下。
- 如申請專利範圍第1項之Ti膜之成膜方法,其中Ti膜成膜時之氣體流量係:TiCl4氣體:1~100mL/min(sccm);H2氣體:20~5000mL/min(sccm);Ar氣體流量:100~10000mL/min(sccm)。
- 如申請專利範圍第2項之Ti膜之成膜方法,其中Ti膜成膜時之氣體流量係:TiCl4氣體:1~100mL/min(sccm);H2氣體:20~5000mL/min(sccm);Ar氣體流量:100~10000mL/min(sccm)。
- 如申請專利範圍第1至4項中任一項之Ti膜之成膜方法,其中成膜處理時之該腔室內的壓力係13.3~1333Pa之範圍。
- 如申請專利範圍第1至4項中任一項之Ti膜之成膜方法,其係將基板載置於該腔室內所設置之載置台上,並將阻抗調整電路連接於設置在載置台所連接之電極的傳送路徑,而藉此來讓從電漿所見之該傳送路徑的阻抗下降,而讓從電漿流經基板之電流增加,以使得Ar離子高能量化。
- 如申請專利範圍第6項之Ti膜之成膜方法,其係藉由將該載置台之該電極作為下部電極,並以對向於該下部電極之方式來設置上部電極,而將高頻電力供給至該上部電極,便會以形成於該上部電極與該下部電極之間的高頻電場來生成電漿。
- 如申請專利範圍第7項之Ti膜之成膜方法,其中該高頻電力之功率為100~3000W。
- 如申請專利範圍第1至4項中任一項之Ti膜之成膜方法,其中該基板係具有Si部分以及由形成於其上之SiO2所構成之層間絕緣膜,於該層間絕緣膜係以面向該Si部分之方式來形成有孔,在該基板成膜出Ti膜時,形成於該Si部分之Ti膜的膜厚會較形成於該層間絕緣膜之Ti膜的膜厚要厚。
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