TW201426845A - 基板處理方法、程式、電腦記憶媒體及基板處理系統 - Google Patents

基板處理方法、程式、電腦記憶媒體及基板處理系統 Download PDF

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Publication number
TW201426845A
TW201426845A TW102131552A TW102131552A TW201426845A TW 201426845 A TW201426845 A TW 201426845A TW 102131552 A TW102131552 A TW 102131552A TW 102131552 A TW102131552 A TW 102131552A TW 201426845 A TW201426845 A TW 201426845A
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TW
Taiwan
Prior art keywords
polymer
neutral layer
photoresist pattern
substrate processing
block copolymer
Prior art date
Application number
TW102131552A
Other languages
English (en)
Chinese (zh)
Inventor
村松誠
北野高広
冨田忠利
田內啓士
Original Assignee
東京威力科創股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東京威力科創股份有限公司 filed Critical 東京威力科創股份有限公司
Publication of TW201426845A publication Critical patent/TW201426845A/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00031Regular or irregular arrays of nanoscale structures, e.g. etch mask layer
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0451Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H10P72/0458Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers vertical arrangement
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/01Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0147Film patterning
    • B81C2201/0149Forming nanoscale microstructures using auto-arranging or self-assembling material
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • Analytical Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Formation Of Insulating Films (AREA)
TW102131552A 2012-09-07 2013-09-02 基板處理方法、程式、電腦記憶媒體及基板處理系統 TW201426845A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012196737A JP5881565B2 (ja) 2012-09-07 2012-09-07 基板処理方法、プログラム及びコンピュータ記憶媒体

Publications (1)

Publication Number Publication Date
TW201426845A true TW201426845A (zh) 2014-07-01

Family

ID=50237032

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102131552A TW201426845A (zh) 2012-09-07 2013-09-02 基板處理方法、程式、電腦記憶媒體及基板處理系統

Country Status (3)

Country Link
JP (1) JP5881565B2 (https=)
TW (1) TW201426845A (https=)
WO (1) WO2014038420A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645251B (zh) * 2015-03-05 2018-12-21 日商東京威力科創股份有限公司 Substrate processing method, program, computer memory medium and substrate processing system

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6177723B2 (ja) * 2014-04-25 2017-08-09 東京エレクトロン株式会社 基板処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
JP6346115B2 (ja) * 2015-03-24 2018-06-20 東芝メモリ株式会社 パターン形成方法
JP6494446B2 (ja) * 2015-06-23 2019-04-03 東京エレクトロン株式会社 基板処理方法、プログラム及びコンピュータ記憶媒体

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04364021A (ja) * 1991-06-11 1992-12-16 Sumitomo Electric Ind Ltd 半導体装置の製造方法
JP4753672B2 (ja) * 2005-09-16 2011-08-24 独立行政法人農業・食品産業技術総合研究機構 樹脂製マイクロチャネルアレイの製造方法及びこれを用いた血液測定方法
US7989026B2 (en) * 2008-01-12 2011-08-02 International Business Machines Corporation Method of use of epoxy-containing cycloaliphatic acrylic polymers as orientation control layers for block copolymer thin films
US7521094B1 (en) * 2008-01-14 2009-04-21 International Business Machines Corporation Method of forming polymer features by directed self-assembly of block copolymers
US8822139B2 (en) * 2010-04-14 2014-09-02 Asml Netherlands B.V. Method for providing an ordered layer of self-assemblable polymer for use in lithography
JP2013534542A (ja) * 2010-06-04 2013-09-05 エーエスエムエル ネザーランズ ビー.ブイ. 自己組織化可能な重合体及びリソグラフィにおける使用方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645251B (zh) * 2015-03-05 2018-12-21 日商東京威力科創股份有限公司 Substrate processing method, program, computer memory medium and substrate processing system
US10329144B2 (en) 2015-03-05 2019-06-25 Tokyo Electron Limited Substrate treatment method, computer storage medium and substrate treatment system

Also Published As

Publication number Publication date
JP5881565B2 (ja) 2016-03-09
WO2014038420A1 (ja) 2014-03-13
JP2014053439A (ja) 2014-03-20

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