TW201413978A - 形成多晶矽膜之方法、包含多晶矽膜之薄膜電晶體及包含多晶矽膜之顯示裝置 - Google Patents
形成多晶矽膜之方法、包含多晶矽膜之薄膜電晶體及包含多晶矽膜之顯示裝置 Download PDFInfo
- Publication number
- TW201413978A TW201413978A TW102129085A TW102129085A TW201413978A TW 201413978 A TW201413978 A TW 201413978A TW 102129085 A TW102129085 A TW 102129085A TW 102129085 A TW102129085 A TW 102129085A TW 201413978 A TW201413978 A TW 201413978A
- Authority
- TW
- Taiwan
- Prior art keywords
- polysilicon film
- film
- electrode
- metal catalyst
- grain boundary
- Prior art date
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 68
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 67
- 238000000034 method Methods 0.000 title claims abstract description 41
- 239000010408 film Substances 0.000 title claims description 127
- 239000010409 thin film Substances 0.000 title claims description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 64
- 239000002184 metal Substances 0.000 claims abstract description 64
- 239000003054 catalyst Substances 0.000 claims abstract description 60
- 238000005530 etching Methods 0.000 claims abstract description 9
- 230000003647 oxidation Effects 0.000 claims abstract description 9
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 7
- 229910052732 germanium Inorganic materials 0.000 claims description 50
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 50
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 17
- 238000002425 crystallisation Methods 0.000 claims description 16
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 11
- KMUONIBRACKNSN-UHFFFAOYSA-N potassium dichromate Chemical compound [K+].[K+].[O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O KMUONIBRACKNSN-UHFFFAOYSA-N 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 7
- 230000008025 crystallization Effects 0.000 claims description 7
- 239000007800 oxidant agent Substances 0.000 claims description 5
- 229910000420 cerium oxide Inorganic materials 0.000 claims description 3
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 claims description 3
- NZIHMSYSZRFUQJ-UHFFFAOYSA-N 6-chloro-1h-benzimidazole-2-carboxylic acid Chemical compound C1=C(Cl)C=C2NC(C(=O)O)=NC2=C1 NZIHMSYSZRFUQJ-UHFFFAOYSA-N 0.000 claims description 2
- 239000003795 chemical substances by application Substances 0.000 claims description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract 3
- 239000010410 layer Substances 0.000 description 73
- 239000012535 impurity Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 8
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 7
- 229910052707 ruthenium Inorganic materials 0.000 description 7
- 230000000994 depressogenic effect Effects 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 238000001000 micrograph Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- DIOQZVSQGTUSAI-UHFFFAOYSA-N decane Chemical compound CCCCCCCCCC DIOQZVSQGTUSAI-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- DEPMYWCZAIMWCR-UHFFFAOYSA-N nickel ruthenium Chemical compound [Ni].[Ru] DEPMYWCZAIMWCR-UHFFFAOYSA-N 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910005883 NiSi Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000005525 hole transport Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005499 laser crystallization Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02425—Conductive materials, e.g. metallic silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1277—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using a crystallisation promoting species, e.g. local introduction of Ni catalyst
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
Abstract
一種形成多晶矽膜之方法包含形成非晶矽膜於基板上;於非晶矽膜上吸附金屬催化劑;藉由熱處理製程結晶化非晶矽膜以形成多晶矽膜,多晶矽膜包含晶內區以及殘留有金屬催化劑之晶界;提供相對於晶內區與晶界具有不同氧化選擇性之蝕刻劑;以及藉由蝕刻劑蝕刻多晶矽膜的表面以移除殘留於晶界上之金屬催化劑。
Description
實施例是有關於一種形成多晶矽膜之方法、包含多晶矽膜之薄膜電晶體及包含多晶矽膜之顯示裝置。
平面型的顯示裝置,像是有機發光二極體(OLED)顯示器或是液晶顯示器(LCD)可使用薄膜電晶體(TFT)作為驅動元件。尤其,低溫多晶矽薄膜電晶體(LTPS TFT)具有極佳的載子遷移率,且因此被廣泛地使用。
低溫多晶矽薄膜電晶體可包含作為主動層的多晶矽膜,其中多晶矽膜藉由結晶化非晶矽膜而形成。
實施例係有關於一種形成多晶矽膜之方法,其包含形成非晶矽膜於基板上;於非晶矽膜上吸附金屬催化劑;藉由熱處理製程結晶化非晶矽膜以形成多晶矽膜,多晶矽膜包含晶內區以及殘留有金屬催化劑之晶界;提供相對於晶內區與晶界具有不同氧化選擇性之蝕刻劑;以及藉由蝕刻劑蝕刻多晶矽膜的表面以移除殘留於晶界之金屬催化劑。
金屬催化劑可包含鎳。鎳可形成為鎳矽化物以 作為晶種 於 熱處理製程期間執行結晶化 。
蝕刻劑可包含氧化劑,氧化劑相對於 晶界具有相對於晶內區之較高的氧化速率。
蝕刻劑可包含作為氧化劑之二鉻酸鉀以及作為用以移除矽氧化物之處理劑之氫氟酸。
在多晶矽膜中,晶界之蝕刻厚度可大於晶內區之蝕刻厚度。
藉由蝕刻劑來蝕刻多晶矽膜的表面以移除殘留於晶界之金屬催化劑可在金屬催化劑移除後形成殘留於晶界之表面之凹陷部份。
實施例亦針對一種薄膜電晶體,其包含根據前述方法所形成的多晶矽膜;位於多晶矽膜上之閘極絕緣層;位於閘極絕緣層上且重疊於多晶矽膜之閘極電極;以及藉由閘極電極而隔開且電性連接至多晶矽膜之源極電極和汲極電極。
實施例亦針對一種薄膜電晶體,其包含含有晶內區以及晶界之多晶矽膜,晶界包含對應至金屬催化劑移除之位置之凹陷部份;位於多晶矽膜上之閘極絕緣層;位於閘極絕緣層上且重疊於多晶矽膜之閘極電極;以及藉由閘極電極而隔開且電性連接至多晶矽膜之源極電極和汲極電極。
實施例亦針對一種顯示裝置,其包含根據前述方法所形成的多晶矽膜;位於多晶矽膜上之閘極絕緣層;位於閘極絕緣層上且重疊於多晶矽膜之閘極電極;以及藉由閘極電極而隔開且電性連接至多晶矽膜之源極電極和汲極電極。
顯示裝置更可包含電性連接至汲極電極之像素電極;面向像素電極之共用電極;以及於像素電極與共用電極之間之有機發光層。
根據一實施例,其提供一種顯示裝置包含含有晶內區及晶界之多晶矽膜,晶界包含對應至金屬催化劑被移除之位置之凹陷部份;位於多晶矽膜上之閘極絕緣層;位於閘極絕緣層上且重疊於多晶矽膜之閘極電極;以及藉由閘極電極而隔開且電性連接至多晶矽膜之源極電極和汲極電極。
顯示裝置更可包含電性連接至汲極電極之像素電極;面向像素電極之共用電極;以及於像素電極與共用電極之間之有機發光層。
100...基板
110...緩衝層
120...非晶矽膜
130...多晶矽膜
130a...通道區
130b...源極區
130c...汲極區
131、A...晶內區
132、B...晶界
140...閘極絕緣層
145...閘極電極
150...層間絕緣層
151...源極電極
152...汲極電極
160...平坦化層
165...像素定義膜
170...有機發光元件
171...像素電極
172...有機發光層
173...共用電極
200...薄膜電晶體
300...有機發光二極體顯示器
50...金屬催化劑
55、C...凹陷部份
t1、t2...氧化厚度
藉由參照所附之圖式來詳細描述例示性實施例,本技術特徵對於本領域具有通常知識者將變得顯而易見,其中:
第1A圖至第1H圖係繪示根據例示性實施例形成多晶矽膜之方法之階段的依序示意圖。
第2圖係繪示藉由例示性實施例之方法所形成之多晶矽膜之表面之顯微鏡影像圖。
第3圖係繪示第2圖所示之晶界的放大表面之掃描電子顯微鏡影像圖。
第4圖係繪示根據例示性實施例之薄膜電晶體之剖面圖。
第5圖係繪示根據例示性實施例之顯示裝置之剖面圖。
實施例在後述將會參照繪示例示性實施例之附圖而更完整地描述。本領域具有通常知識者應知悉的是,所述實施例在不脫離本發明之範疇或精神下可以各種不同方式修改。
在圖式中,層、薄膜、面板、區域等之厚度為了清晰而誇大,且整篇說明書中,相同或相似的參考符號係代表相同元件。將了解的是,當如層、薄膜、區域或基板之元件被稱為在其他元件之「上」時,元件可直接地位於其他元件之上或亦可存在中間元件。相反的,當一個元件被稱為「直接地」在其他元件之「上」時,不存在有中間元件。
第1A圖至第1H圖係依序地繪示根據例示性實施例之形成多晶矽膜之方法之階段的示意圖。
參閱第1A圖,緩衝層110形成於基板100上,基板可用各種材料製成,例如玻璃、石英、陶瓷、塑膠及金屬。
緩衝層110由氮化矽(SiNx)的單層膜結構或是由氮化矽(SiNx)與氧化矽(SiO2)層疊而成的雙層膜結構所形成。緩衝層110作用在於防止不必要的物質,例如雜質或濕氣,傳遞進入上層,且使表面平坦化。緩衝層110可根據基板100的種類及所採用之製程條件而省略。
接著,非晶矽膜120形成於緩衝層110上。非晶矽膜120可藉由例如化學氣相沉積(CVD)方法使用矽烷氣體而形成。
參閱第1B圖,金屬催化劑50吸附至非晶矽膜120上。金屬催化劑50的吸附可藉由像是離子摻雜、沉積、濺鍍、塗布( coating)或植入的方法來執行。金屬催化劑50可例如以小劑量範圍1×1010原子/cm2至1×1014原子/cm2被吸附。
金屬催化劑50可選自於例如鎳(Ni)、銀(Ag)、金(Au)、銅(Cu)、鋁(Al)、錫(Sn)、鎘(Cd)、鈀(Pd)及合金或其組合。
接著,非晶矽膜120接受熱處理製程。吸附在非晶矽膜120上之金屬催化劑50在熱處理期間作為晶種,以從非晶矽膜120長晶,且因此,如第1C圖所示,多晶矽膜130形成。
在當鎳被用以作為金屬催化劑50以結晶化非晶矽膜120時之情況下,鎳與非晶矽膜120的矽反應而形成為鎳矽化物(NiSix;x = 0.5-2),且鎳矽化物作為晶種以在其周圍長晶。
在使用金屬催化劑50之結晶化方法下,非晶矽膜120可在相對低的溫度下快速地結晶化。在利用金屬催化劑50而結晶化的多晶矽膜130中,具有十到幾十微米(μm)尺寸的晶粒形成,且在此種情況下,金屬催化劑50殘留於晶界。
第1D圖係繪示第1C圖所示之多晶矽膜之平坦表面之示意圖,且第1E圖係第1C圖所示之多晶矽膜之放大剖面圖。
在第1D圖與第1E圖中,多晶矽膜130分隔為晶內區131以及晶界132。金屬催化劑50,舉例來說:鎳,仍殘留於晶界132。若使金屬催化劑50殘留於晶界132,則可能作為增加由多晶矽膜130所形成之薄膜電晶體之漏電流的缺陷。因此,最好移除金屬催化劑50。
參閱第1F圖,準備相對於晶內區131及晶界132具有不同氧化選擇性的蝕刻劑。多晶矽膜130的表面使用蝕刻劑而蝕刻。
蝕刻劑可由氫氟酸(HF)以及二鉻酸鉀(K2Cr2O7)的混合溶液形成。作為矽氧化劑的蝕刻劑之二鉻酸鉀相對於晶界132的氧化速率相對於晶內區131較高。此外,氫氟酸作用在於移除多晶矽經由二鉻酸鉀氧化所產生的矽氧化物。
如果多晶矽膜130藉由蝕刻劑經受表面處理,晶界132的氧化厚度t1會大於晶內區131的氧化厚度t2。在此種情況下,晶界132的氧化厚度t1大於金屬催化劑50的尺寸。此外,蝕刻劑中的氫氟酸成分移除晶界132及晶內區131的氧化部份,以形成金屬催化劑50移除之多晶矽膜130。
第1G圖係金屬催化劑移除的多晶矽膜的放大剖視圖,且第1H圖係繪示第1G圖所示之多晶矽膜之平坦表面之示意圖。
參閱第1G圖與第1H圖,由於前述的蝕刻劑,於多晶矽膜130的晶界132的蝕刻厚度係大於晶內區131的蝕刻厚度。據此,在多晶矽膜130中,金屬催化劑移除的晶界132的上表面的高度係低於晶內區131的上表面的高度。
在第1G圖與第1H圖中,參考符號55繪示在金屬催化劑由晶界132表面移除後所留下的凹陷部份。
第2圖繪示由前述方法所形成之多晶矽膜之表面之顯微鏡影像圖。如第2圖所示,A代表了晶內區,B代表了晶界,而C則是代表了在殘留金屬催化劑被移除後所留下的凹陷部份。
第3圖係繪示第2圖所示之晶界的放大表面之掃描電子顯微鏡影像圖。
參閱第3圖,可驗證之前殘留於晶界的金屬催化劑由於藉由前述蝕刻劑之處理而被移除,且對應於金屬催化劑之先前位置之凹陷部份在金屬催化劑移除之位置上形成。在第3圖的左半部影像中,箭頭指出凹陷部份。
如前所述,根據本例示性實施例之形成多晶矽膜130的方法,在非晶矽膜120之結晶化後殘留於晶界132的金屬催化劑50可有效地移除。因此,在使用多晶矽膜130作為主動層的薄膜電晶體中,因為作為缺陷的金屬催化劑不存在,漏電流會減少或不會發生。因此,薄膜電晶體的電特性可得以提升。
接續,用前述方法所形成的多晶矽膜130作為主動層的薄膜電晶體將會被描述。
第4圖係繪示根據例示性實施例之薄膜電晶體之剖面圖。
參閱第4圖,緩衝層110形成於基板100上,且多晶矽膜130形成於緩衝層110上。多晶矽膜130藉由根據前述方法使用金屬催化劑而結晶化,因此金屬催化劑並不會殘留於晶界,而是會藉由前述蝕刻劑的處理被移除。
多晶矽膜130圖樣化為預定形狀以用於作為主動層。多晶矽膜130包含通道區130a、源極區130b以及汲極區130c。P型雜質或N型雜質可摻雜至源極區130b以及汲極區130c。
閘極絕緣層140形成於緩衝層110上方且覆蓋多晶矽膜130。閘極電極145形成於對應於通道區130a的閘極絕緣層140上方。閘極電極145可為與多晶矽膜130相同的材料。閘極電極145作為阻擋遮罩(blocking mask),使得在摻雜P型雜質或N型雜質時,雜質不會摻雜至通道區130a。
層間絕緣層150形成於閘極絕緣層140上且覆蓋閘極電極145。藉其暴露源極區130b以及汲極區130c的接觸孔形成於層間絕緣層150及閘極絕緣層140中。藉由接觸孔與源極區130b連接之源極電極151以及藉由接觸孔與汲極區130c連接之汲極電極152形成於層間絕緣層150上。
由於上述薄膜電晶體200使用已去除金屬催化劑的多晶矽膜130作為主動層,主動層中載子捕獲的缺陷可不存在。因此,根據本例示性實施例的薄膜電晶體200,漏電流減少或不會發生。據此,減少或避免閥值電壓增加的現象是可能的。
第5圖係繪示使用前述薄膜電晶體之顯示裝置之剖面圖。第5圖繪示有機發光二極體(OLED)顯示器作為顯示裝置的示例。
有機發光二極體(OLED)顯示器300連接至複數條訊號線,且包含以近似於矩陣形式所配置之複數個像素。第5圖繪示複數個像素中的一個像素,且每個像素包含複數個薄膜電晶體,然為了便於描述,於此僅顯示一個薄膜電晶體200。
參閱第5圖,緩衝層110形成於基板100上方,且多晶矽膜130形成於緩衝層110上。多晶矽膜130藉由根據前述方法使用金屬催化劑而結晶化,且金屬催化劑藉由前述蝕刻劑的處理可不殘留於晶界。
多晶矽膜130圖樣化為預定形狀以用於作為主動層。多晶矽膜130包含通道區130a、源極區130b以及汲極區130c。P型雜質或N型雜質可摻雜至源極區130b以及汲極區130c。
閘極絕緣層140形成於緩衝層110上方且覆蓋多晶矽膜130。閘極電極145形成於對應於通道區130a的閘極絕緣層140上方。此外,層間絕緣層150形成於閘極絕緣層140上且覆蓋閘極電極145。藉其暴露源極區130b以及汲極區130c的接觸孔形成於層間絕緣層150以及閘極絕緣層140中。
藉由接觸孔與源極區130b連接之源極電極151以及藉由接觸孔與汲極區130c連接之汲極電極152形成於層間絕緣層150上。平坦化層160形成於層間絕緣層150上且覆蓋源極電極151以及汲極電極152,且使汲極電極152暴露的接觸孔形成於平坦化層160中。
藉由接觸孔連接至汲極電極152之像素電極171形成於平坦化層160上,且像素定義膜165形成於平坦化層160且覆蓋像素電極171。使部份像素電極171暴露的開孔形成於像素定義膜165中。
有機發光層172形成於像素定義膜165的開孔中,且共用電極173形成於整個像素定義膜165上且覆蓋有機發光層172。像素電極171及共用電極173任一可作為電子注入電極(陰極),且另一個則可作為電洞注入電極(陽極)。
有機發光層172由發出紅色、綠色及藍色中任一色彩之有機材料或者是有機材料與無機材料的混合物所形成。用以增進有機發光層172之發光效率之附屬層可形成於有機發光層172的底部或頂部。附屬層可為電洞注入層(HIL)、電洞傳輸層(HTL)、電子注入層(EIL)以及電子傳輸層(ETL)之至少之一。
像素電極171與共用電極173之任一可形成為透明導電層,而另一個則可形成為反射導電層。從有機發光層172所發射出的光被反射導電層反射,傳輸穿過透明導電層且朝著顯示裝置之外部發射。像素電極171、有機發光層172以及共用電極173組成有機發光元件170。
上文中描述有機發光二極體(OLED)顯示器。在其他實施態樣中,根據本例示性實施例之顯示裝置可為液晶顯示器(LCD)。在此情況下,液晶顯示器包含液晶層(未繪示),且可形成以具有本領域具有通常知識者所習知之各種結構。
藉由總結與回顧的方法,結晶化非晶矽膜以形成多晶矽膜之方法之示例包括固相結晶化方法、準分子雷射結晶化方法、使用金屬催化劑之金屬誘導結晶化方法、金屬誘導側向結晶化方法(metal inducing lateral surface crystallization method)以及其他類似的方法。
在上述的方法中,與固相結晶化方法相比,使用金屬催化劑之結晶化方法可縮短結晶化過程時間且可在相對低溫下進行。此外,與使用雷射之結晶化方法相比,使用金屬催化劑之結晶化方法在製造大型顯示裝置的過程中是比較有利的。
然而,在使用金屬催化劑之結晶化方法中,金屬催化劑可能在結晶化後殘留於晶界。殘留的金屬催化劑可能作用為捕獲載子的缺陷,導致包含有多晶矽膜之薄膜電晶體中有漏電流的產生且使閥值電壓上升。
相反地,實施例提供了一種形成多晶矽膜之方法,其可減少可能性及/或防止因金屬催化劑所導致之效應,使金屬催化劑在結晶化後不會殘留。根據此實施例,在非晶矽膜之結晶化後,有效地移除殘留於晶界的金屬催化劑是可行的。因此,使用多晶矽膜作為主動層的薄膜電晶體中,因為金屬催化劑可不存在,基於金屬催化劑作為缺陷之漏電流可不發生。作為結果,電特性可得以提升。包含多晶矽膜的薄膜電晶體及顯示裝置可由此方法製造。
雖然本揭露係搭配目前考量可行之例示性實施例來描述,然應了解的是所揭露之實施例不受到侷限,而是相反地,旨在涵蓋包括於所附申請專利範圍的精神和範圍內的各種修改及等效配置。
130...多晶矽膜
131...晶內區
132...晶界
55...凹陷部份
Claims (12)
- 一種形成多晶矽膜之方法,該方法包含:
形成一非晶矽膜於一基板上;
於該非晶矽膜上吸附一金屬催化劑;
藉由一熱處理製程結晶化該非晶矽膜以形成一多晶矽膜,該多晶矽膜包含一晶內區及殘留有該金屬催化劑之一晶界;
提供相對於該晶內區與該晶界具有不同氧化選擇性之一蝕刻劑;以及
藉由該蝕刻劑蝕刻該多晶矽膜的表面以移除殘留於該晶界之該金屬催化劑。 - 如申請專利範圍第1項所述之形成多晶矽膜之方法,其中:
該金屬催化劑包含鎳,且
鎳係形成為鎳矽化物以作為一晶種以在該熱處理製程期間執行結晶化。 - 如申請專利範圍第1項所述之形成多晶矽膜之方法,其中該蝕刻劑包含一氧化劑,該氧化劑相對於該晶界具有相對於該晶內區之較高的氧化速率。
- 如申請專利範圍第3項所述之形成多晶矽膜之方法,其中該蝕刻劑包含作為該氧化劑之二鉻酸鉀以及作為用以移除矽氧化物之一處理劑之氫氟酸。
- 如申請專利範圍第3項所述之形成多晶矽膜之方法,其中在該多晶矽膜中,該晶界之蝕刻厚度大於該晶內區之蝕刻厚度。
- 如申請專利範圍第5項所述之形成多晶矽膜之方法,其中藉由該蝕刻劑蝕刻該多晶矽膜的表面以移除殘留於該晶界之該金屬催化劑在該金屬催化劑移除後會形成留於該晶界之表面之一凹陷部份。
- 一種薄膜電晶體,其包含:
一多晶矽膜,以如申請專利範圍第1項所述之形成多晶矽膜之方法形成;
一閘極絕緣層,位於該多晶矽膜上;
一閘極電極,位於該閘極絕緣層上,該閘極電極重疊該多晶矽膜;以及
一源極電極以及一汲極電極,藉由該閘極電極而隔開且電性連接至該多晶矽膜。 - 一種薄膜電晶體,其包含:
一多晶矽膜,包含一晶內區及一晶界,該晶界包含對應至一金屬催化劑被移除之位置之一凹陷部份;
一閘極絕緣層,位於該多晶矽膜上;
一閘極電極,位於該閘極絕緣層上且重疊該多晶矽膜;以及
一源極電極以及一汲極電極,藉由該閘極電極而隔開且電性連接至該多晶矽膜。 - 一種顯示裝置,其包含:
一多晶矽膜,以如申請專利範圍第1項所述之形成多晶矽膜之方法形成;
一閘極絕緣層,位於該多晶矽膜上;
一閘極電極,位於該閘極絕緣層上且重疊該多晶矽膜;以及
一源極電極以及一汲極電極,藉由該閘極電極而隔開且電性連接至該多晶矽膜。 - 如申請專利範圍第9項所述之顯示裝置,其更包含:
一像素電極,電性連接至該汲極電極;
一共用電極,面向該像素電極;以及
一有機發光層,位於該像素電極與該共用電極之間。 - 一種顯示裝置,其包含:
一多晶矽膜,包含一晶內區以及一晶界,該晶界包含對應至一金屬催化劑被移除之位置之一凹陷部份;
一閘極絕緣層,位於該多晶矽膜上;
一閘極電極,位於該閘極絕緣層上且重疊該多晶矽膜;以及
一源極電極以及一汲極電極,藉由該閘極電極而隔開且電性連接至該多晶矽膜。 - 如申請專利範圍第11項所述之顯示裝置,其更包含:
一像素電極,電性連接至該汲極電極;
一共用電極,面向該像素電極;以及
一有機發光層,位於該像素電極與該共用電極之間。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120106640A KR20140039863A (ko) | 2012-09-25 | 2012-09-25 | 다결정 규소막 형성 방법, 다결정 규소막을 포함하는 박막 트랜지스터 및 표시 장치 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW201413978A true TW201413978A (zh) | 2014-04-01 |
Family
ID=50318535
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW102129085A TW201413978A (zh) | 2012-09-25 | 2013-08-14 | 形成多晶矽膜之方法、包含多晶矽膜之薄膜電晶體及包含多晶矽膜之顯示裝置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20140084268A1 (zh) |
KR (1) | KR20140039863A (zh) |
CN (1) | CN103681349A (zh) |
TW (1) | TW201413978A (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102239841B1 (ko) * | 2014-08-06 | 2021-04-14 | 삼성디스플레이 주식회사 | 박막 트랜지스터, 이를 구비하는 디스플레이 장치, 박막 트랜지스터의 제조방법 및 디스플레이 장치의 제조방법 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW279275B (zh) * | 1993-12-27 | 1996-06-21 | Sharp Kk | |
KR100653263B1 (ko) * | 2000-12-29 | 2006-12-01 | 엘지.필립스 엘시디 주식회사 | 실리콘막의 결정화 방법 |
KR100466964B1 (ko) * | 2001-12-27 | 2005-01-24 | 엘지.필립스 엘시디 주식회사 | 폴리실리콘 박막 제조방법 |
US6727122B2 (en) * | 2001-12-29 | 2004-04-27 | Lg. Philips Lcd Co., Ltd. | Method of fabricating polysilicon thin film transistor |
US6930326B2 (en) * | 2002-03-26 | 2005-08-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor circuit and method of fabricating the same |
JP4115252B2 (ja) * | 2002-11-08 | 2008-07-09 | シャープ株式会社 | 半導体膜およびその製造方法ならびに半導体装置およびその製造方法 |
KR100656495B1 (ko) * | 2004-08-13 | 2006-12-11 | 삼성에스디아이 주식회사 | 박막트랜지스터 및 그 제조 방법 |
JP2006261632A (ja) * | 2005-02-18 | 2006-09-28 | Sumco Corp | シリコンウェーハの熱処理方法 |
KR100700494B1 (ko) * | 2005-08-25 | 2007-03-28 | 삼성에스디아이 주식회사 | 박막트랜지스터 및 그 제조 방법 |
JP2007266466A (ja) * | 2006-03-29 | 2007-10-11 | Tokyo Electron Ltd | プラズマエッチング方法、プラズマエッチング装置、コンピュータ記憶媒体及び処理レシピが記憶された記憶媒体 |
KR100770269B1 (ko) * | 2006-05-18 | 2007-10-25 | 삼성에스디아이 주식회사 | 박막트랜지스터의 제조방법 |
KR101049805B1 (ko) * | 2008-12-30 | 2011-07-15 | 삼성모바일디스플레이주식회사 | 다결정 실리콘의 제조방법, 박막트랜지스터, 그의 제조방법및 이를 포함하는 유기전계발광표시장치 |
KR101049799B1 (ko) * | 2009-03-03 | 2011-07-15 | 삼성모바일디스플레이주식회사 | 박막트랜지스터, 그의 제조방법 및 이를 포함하는 유기전계발광표시장치 |
US8003431B2 (en) * | 2009-10-21 | 2011-08-23 | Electronics And Telecommunications Research Institute | Method for antireflection treatment of a zinc oxide film and method for manufacturing solar cell using the same |
KR101125565B1 (ko) * | 2009-11-13 | 2012-03-23 | 삼성모바일디스플레이주식회사 | 박막트랜지스터, 그를 구비하는 유기전계발광표시장치 및 그들의 제조방법 |
KR101049802B1 (ko) * | 2009-11-20 | 2011-07-15 | 삼성모바일디스플레이주식회사 | 다결정 실리콘층의 제조방법, 박막트랜지스터, 그를 구비하는 유기전계발광표시장치 및 그들의 제조방법 |
KR101117643B1 (ko) * | 2010-04-08 | 2012-03-05 | 삼성모바일디스플레이주식회사 | 비정질 실리콘막의 결정화 방법, 그리고 박막 트랜지스터 및 이의 제조 방법 |
KR101050467B1 (ko) * | 2010-04-14 | 2011-07-20 | 삼성모바일디스플레이주식회사 | 다결정 실리콘층, 그 제조방법, 상기 다결정 실리층을 이용한 박막 트랜지스터 및 상기 박막 트랜지스터를 구비한 유기발광표시장치 |
-
2012
- 2012-09-25 KR KR1020120106640A patent/KR20140039863A/ko not_active Application Discontinuation
-
2013
- 2013-08-08 US US13/962,105 patent/US20140084268A1/en not_active Abandoned
- 2013-08-12 CN CN201310348944.3A patent/CN103681349A/zh active Pending
- 2013-08-14 TW TW102129085A patent/TW201413978A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
US20140084268A1 (en) | 2014-03-27 |
CN103681349A (zh) | 2014-03-26 |
KR20140039863A (ko) | 2014-04-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102180037B1 (ko) | 가요성 표시 장치 및 그 제조 방법 | |
TWI580021B (zh) | 有機發光二極體顯示器及製造其之方法 | |
TWI382471B (zh) | 多晶矽製造方法、以之製造之tft、tft製造方法及含該tft之有機發光二極體顯示裝置 | |
US8822999B2 (en) | Organic light-emitting display device and method of manufacturing the same | |
TWI529468B (zh) | 製造薄膜電晶體之方法,利用該方法製造之薄膜電晶體、製造有機發光顯示裝置之方法、以及利用該方法製造之有機發光顯示裝置 | |
KR102416742B1 (ko) | 투명 표시 장치 | |
WO2016000336A1 (zh) | 低温多晶硅tft阵列基板及其制备方法、显示装置 | |
KR100763913B1 (ko) | 박막 트랜지스터의 제조방법 | |
US20160079286A1 (en) | Thin-film transistor array substrate, method of manufacturing the same, and display device | |
US9312279B2 (en) | Thin film transistor array substrate, method of manufacturing the same, and display apparatus including the same | |
US7994706B2 (en) | Organic light emitting diode display device and method of fabricating the same | |
US10347705B2 (en) | Organic light emitting diode display and manufacturing method thereof | |
TW201714008A (zh) | 陣列基板、顯示裝置及陣列基板的製備方法陣列基板 | |
US8022398B2 (en) | Thin film transistor, method of forming the same and flat panel display device having the same | |
JP2005222068A (ja) | 有機電界発光表示装置及びその製造方法 | |
CN104934437B (zh) | 薄膜晶体管元件基板及其制造方法、和有机el显示装置 | |
US10615282B2 (en) | Thin-film transistor and manufacturing method thereof, array substrate, and display apparatus | |
WO2008041462A1 (fr) | Transistor en film mince, procédé de fabrication de celui-ci et dispositif d'affichage | |
TW201301500A (zh) | 有機發光顯示裝置及其製造方法 | |
US8927991B2 (en) | Organic light emitting diode display device and manufacturing method thereof | |
KR20230074461A (ko) | 박막 트랜지스터 및 표시 장치 | |
US20110127533A1 (en) | Organic light-emitting display device and method of manufacturing the same | |
KR102172972B1 (ko) | 박막 트랜지스터 및 그의 제조방법 | |
US8633484B2 (en) | Organic light emitting display and method of fabricating the same | |
JP7152448B2 (ja) | ディスプレイ装置 |