TW201346003A - Adhesive sheet and method for fabricating semiconductor device - Google Patents

Adhesive sheet and method for fabricating semiconductor device Download PDF

Info

Publication number
TW201346003A
TW201346003A TW102108050A TW102108050A TW201346003A TW 201346003 A TW201346003 A TW 201346003A TW 102108050 A TW102108050 A TW 102108050A TW 102108050 A TW102108050 A TW 102108050A TW 201346003 A TW201346003 A TW 201346003A
Authority
TW
Taiwan
Prior art keywords
adhesive layer
mass
adhesive
softening point
semiconductor device
Prior art date
Application number
TW102108050A
Other languages
Chinese (zh)
Other versions
TWI485225B (en
Inventor
Megumi Kodama
Takahiro Tokuyasu
Tetsurou Iwakura
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Publication of TW201346003A publication Critical patent/TW201346003A/en
Application granted granted Critical
Publication of TWI485225B publication Critical patent/TWI485225B/en

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/10Adhesives in the form of films or foils without carriers
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J133/00Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04Homopolymers or copolymers of esters
    • C09J133/06Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
    • C09J133/062Copolymers with monomers not covered by C09J133/06
    • C09J133/068Copolymers with monomers not covered by C09J133/06 containing glycidyl groups
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J161/00Adhesives based on condensation polymers of aldehydes or ketones; Adhesives based on derivatives of such polymers
    • C09J161/04Condensation polymers of aldehydes or ketones with phenols only
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • C09J163/04Epoxynovolacs
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J113/00Adhesives based on rubbers containing carboxyl groups
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/304Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier the adhesive being heat-activatable, i.e. not tacky at temperatures inferior to 30°C
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2413/00Presence of rubbers containing carboxyl groups
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2461/00Presence of condensation polymers of aldehydes or ketones
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2463/00Presence of epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • H01L2224/48096Kinked the kinked part being in proximity to the bonding area on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48105Connecting bonding areas at different heights
    • H01L2224/48106Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49177Combinations of different arrangements
    • H01L2224/49179Corner adaptations, i.e. disposition of the wire connectors at the corners of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85203Thermocompression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20104Temperature range 100 C=<T<150 C, 373.15 K =< T < 423.15K
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20105Temperature range 150 C=<T<200 C, 423.15 K =< T < 473.15K
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/201Temperature ranges
    • H01L2924/20106Temperature range 200 C=<T<250 C, 473.15 K =<T < 523.15K

Abstract

An adhesive sheet of this invention includes a resin composition. The resin composition contains a high molecular component (A), a thermal curable component (B1) in which softening point is less than 50 DEG c, a thermal curable component (B2) in which softening point is 50 to 100 DEG c, and a phenol resin (C) in which softening point is 100 DEG c or less. The adhesive sheet contains 11 to 22 mass% of the high molecular component (A), 10 to 20 mass% of the thermal curable component (B1) in which softening point is less than 50 DEG c, 10 to 20 mass% of the thermal curable component (B2) in which softening point is 50 to 100 DEG c, and 15 to 30 mass% of the phenol resin (C) in which softening point is 100 DEG c or less based on the 100 mass% of the resin composition.

Description

接著片及半導體裝置的製造方法 Substrate and method of manufacturing semiconductor device

本發明是有關於一種接著片及使用了接著片且包括帶有接著劑層的半導體晶片的半導體裝置的製造方法。 The present invention relates to a bonding sheet and a method of fabricating a semiconductor device using the bonding sheet and including a semiconductor wafer with an adhesive layer.

近年來,將可擕式電話、可擕式音頻設備用的記憶體密封晶片(Memory Package Chip)多段積層得到的堆疊多晶片密封(Multi Chip Package,MCP)日益普及。而且,隨著圖像處理技術及可擕式電話等的多功能化,上述密封的高集成化、高密度化及薄型化得到發展。作為用於製造上述半導體裝置的膜,例如可以列舉專利文獻1~5中記載的接著片。 In recent years, a stacked multi-chip package (MCP) obtained by stacking a memory package chip for a portable telephone or a portable audio device has been increasingly popular. Further, with the versatility of image processing technology and portable telephones, the above-described sealing has been highly integrated, high-density, and thinned. Examples of the film for producing the semiconductor device include the adhesive sheets described in Patent Documents 1 to 5.

先前技術文獻 Prior technical literature

專利文獻 Patent literature

專利文獻1:日本專利特開2001-279197號公報 Patent Document 1: Japanese Patent Laid-Open Publication No. 2001-279197

專利文獻2:日本專利特開2002-222913號公報 Patent Document 2: Japanese Patent Laid-Open Publication No. 2002-222913

專利文獻3:日本專利第3913481號公報 Patent Document 3: Japanese Patent No. 3913881

專利文獻4:日本專利特開2002-220576號公報 Patent Document 4: Japanese Patent Laid-Open Publication No. 2002-220576

專利文獻5:日本專利特開2004-072009號公報 Patent Document 5: Japanese Patent Laid-Open Publication No. 2004-072009

近年來,隨著半導體晶圓的膜化及配線的微細化等的進步,對可以實現具高可靠性的半導體裝置的接著膜的開發要求日益提高。特別是要求低黏性(tack)以提高拾取(pick-up)製程時的操作性、或者要求低黏度以確保在進行晶片黏著(die attach)製程時接著劑對基板或半導體晶片之凹凸部或引線的埋入性。 In recent years, with the progress of film formation of semiconductor wafers and miniaturization of wiring, development requirements for an adhesive film capable of realizing a semiconductor device having high reliability have been increasing. In particular, a low tack is required to improve the operability in a pick-up process, or a low viscosity is required to ensure that the adhesive adheres to the uneven portion of the substrate or the semiconductor wafer during the die attach process. The embedding of the leads.

然而,當使用低黏度的接著膜製造半導體裝置時,為了抑制引線接合(wire bonding)時的起泡,必需進行對接著劑加熱的後硬化(after cure)製程。使用了低黏度的接著膜的半導體裝置通常可以按照下述方法來製造。首先,在半導體晶圓上貼附接著片,之後進行切割而使半導體晶圓單體化。接著,將所得的半導體晶片自接著片剝離(拾取製程),並經由接著劑壓著在基板等上(晶片黏著(Die Attach)製程)。接著,進行上述的後硬化(膜硬化(film cure)製程)後,藉由引線接合將半導體晶片連接於基板上。進而,視需要反覆進行如下製程:經由接著劑一邊接著半導體晶片一邊進行積層,並且藉由引線接合將半導體晶片連接於基板上。藉此,半導體晶片被多段積層。然後,完全結束藉由引線接合進行連接的製程後,對半導體晶片進行樹脂密封。 However, when a semiconductor device is manufactured using a low-viscosity adhesive film, in order to suppress foaming during wire bonding, it is necessary to perform an after curing process for heating the adhesive. A semiconductor device using a low-viscosity bonding film can be generally manufactured in the following manner. First, a bonding sheet is attached to a semiconductor wafer, and then dicing is performed to singulate the semiconductor wafer. Next, the obtained semiconductor wafer is peeled off from the adhesive sheet (pick-up process), and pressed against a substrate or the like via an adhesive (die attach process). Next, after the above-described post-hardening (film cure process), the semiconductor wafer is bonded to the substrate by wire bonding. Further, if necessary, the process is repeated by laminating the semiconductor wafer via the adhesive, and the semiconductor wafer is bonded to the substrate by wire bonding. Thereby, the semiconductor wafer is laminated in multiple stages. Then, after the process of joining by wire bonding is completely completed, the semiconductor wafer is resin-sealed.

但是,對於上述專利文獻1~5中所記載的接著膜而言,僅以晶片黏著製程在低溫、低負荷下的壓著安裝,難以將接著劑充分埋入基板或半導體晶片或引線中。而且,由於是低黏度的膜,所以產生膜的黏著力強而黏性高,從而在拾取製程中無法拾取的問題,或者為了抑制起泡而必需反覆進行膜硬化製程,從而製程時間需要非常長的問題。 However, in the adhesive film described in the above Patent Documents 1 to 5, it is difficult to sufficiently embed the adhesive in the substrate, the semiconductor wafer or the lead by merely pressing the wafer bonding process under low temperature and low load. Moreover, since it is a low-viscosity film, the adhesion of the film is strong and the viscosity is high, so that the film cannot be picked up in the picking process, or the film hardening process must be repeated in order to suppress the foaming, so that the process time needs to be very long. The problem.

本發明是為了解決上述問題而成,其目的在於提供一種接著片,該接著片能夠一邊提高生產效率,一邊實現埋入性及拾取性良好且具備高可靠性的半導體裝置。 The present invention has been made to solve the above problems, and an object of the invention is to provide a semiconductor sheet which is excellent in embedding property and pick-up property and has high reliability while improving production efficiency.

為了解決上述課題,本發明的一觀點的接著片的特徵在於:包括樹脂組成物,所述樹脂組成物包含:(A)高分子量成分、(B1)軟化點不足50℃的熱硬化性成分、(B2)軟化點為50℃以上且100℃以下的熱硬化性成分、以及(C)軟化點為100℃以下的苯酚樹脂,該接著片中,以100質量%的該樹脂組成物為基準,含有11質量%~22質量%的(A)高分子量成分、10質量%~20質量%的(B1)軟化點不足50℃的熱硬化性成分、10質量%~20質量%的(B2)軟化點為50℃以上且100℃以下的熱硬化性成分、以及15質量%~30質量%的(C)軟化點為100℃以下的苯酚樹脂(phenol resin)。 In order to solve the above problems, the adhesive sheet according to an aspect of the present invention includes a resin composition comprising: (A) a high molecular weight component; (B1) a thermosetting component having a softening point of less than 50 ° C, (B2) a thermosetting component having a softening point of 50° C. or more and 100° C. or less and (C) a phenol resin having a softening point of 100° C. or less, and the sealing sheet is based on 100% by mass of the resin composition. 11% by mass to 22% by mass of (A) high molecular weight component, 10% by mass to 20% by mass of (B1) thermosetting component having a softening point of less than 50 ° C, and (B2) softening of 10% by mass to 20% by mass The point is a thermosetting component of 50° C. or more and 100° C. or less, and a phenol resin having a softening point of 15°% to 30% by mass of 100° C. or less.

本發明的一觀點的接著片,藉由特定出接著劑組成物中所含的(A)、(B1)、(B2)及(C)成分以及其含量,可以使這些成分相輔相成,而降低黏性強度或80℃下的熔融黏度。因此,可以提供良好的拾取性或晶片接合(die bonding)性,並且可以提高所得的半導體裝置的可靠性。此外,若使用該接著片製造半導體裝置,則即使在縮短了後硬化時間的情況下,也可以抑制引線接合時的起泡。因此,藉由本發明的一觀點的接著片,可以一邊提高生產效率,一邊提供具備高可靠性的半導體裝置。 In the adhesive sheet of one aspect of the present invention, by specifically specifying the components (A), (B1), (B2) and (C) contained in the adhesive composition and the content thereof, these components can be complemented and reduced in viscosity. Sexual strength or melt viscosity at 80 °C. Therefore, good pickup property or die bonding property can be provided, and the reliability of the resulting semiconductor device can be improved. Further, when the semiconductor device is manufactured using the adhesive sheet, even when the post-hardening time is shortened, foaming at the time of wire bonding can be suppressed. Therefore, the semiconductor wafer having high reliability can be provided while improving production efficiency by the adhesive sheet of one aspect of the present invention.

此外,本發明的一觀點的接著片即使接著劑層在80℃下的熔融黏度為300Pa.s~3000Pa.s亦可。此時,在晶片接合製程中,可以對形成於基板等的表面的凹凸之凹部充分良好地填充接著劑。因此,可提高基板與半導體晶片之間的接著性,並且可進一步提高半導體裝置的可靠性。 Further, the adhesive sheet of one aspect of the present invention has a melt viscosity of 300 Pa at 80 ° C even if the adhesive layer is at 80 ° C. s~3000Pa. s can also. At this time, in the wafer bonding process, the adhesive which is formed on the surface of the substrate or the like can be sufficiently filled with the adhesive. Therefore, the adhesion between the substrate and the semiconductor wafer can be improved, and the reliability of the semiconductor device can be further improved.

本發明的一觀點的半導體裝置的製造方法是包括使用了上述接著片的帶有接著劑層的半導體晶片的半導體裝置的製造方法,其特徵在於:將帶有接著劑層的半導體晶片壓著在電路基板上後,對接著劑層進行在110℃~125℃下且0.5小時~1小時的加熱的膜硬化製程;以及將帶有接著劑層的半導體晶片與電路基板經由接合引線而在230℃以下電性連接的引線接合製程。 A method of manufacturing a semiconductor device according to an aspect of the present invention is a method of manufacturing a semiconductor device including a semiconductor wafer with an adhesive layer using the above-described adhesive sheet, wherein a semiconductor wafer with an adhesive layer is pressed against a film hardening process of heating the adhesive layer at 110 ° C to 125 ° C for 0.5 hour to 1 hour after the circuit substrate; and bonding the semiconductor wafer with the adhesive layer to the circuit substrate via the bonding wire at 230 ° C The following wire bonding process for electrical connections.

根據上述製造方法,與使用習知的接著片的情況相比,後硬化時間短,並且可提高半導體裝置的生產效率。 According to the above manufacturing method, the post-hardening time is shorter than that in the case of using a conventional one, and the production efficiency of the semiconductor device can be improved.

根據本發明,可以提供一種接著片,該接著片可以一邊提高生產效率,一邊實現埋入性及拾取性良好且具備高可靠性的半導體裝置。 According to the present invention, it is possible to provide a semiconductor sheet which is excellent in embedding property and pick-up property and has high reliability while improving production efficiency.

1‧‧‧接著片 1‧‧‧Next film

2、8‧‧‧基材 2, 8‧‧‧ substrate

4、40‧‧‧接著劑層 4, 40‧‧‧ adhesive layer

10‧‧‧黏著層 10‧‧‧Adhesive layer

12‧‧‧切割片 12‧‧‧Cut slices

14‧‧‧支撐構件 14‧‧‧Support members

14a‧‧‧支撐構件的表面 14a‧‧‧Surface of the support member

18‧‧‧帶有接著劑層的半導體元件 18‧‧‧Semiconductor components with adhesive layer

41‧‧‧接著劑 41‧‧‧Adhesive

70、90‧‧‧基板 70, 90‧‧‧ substrate

74、84、94、104‧‧‧電路圖案 74, 84, 94, 104‧‧‧ circuit patterns

76‧‧‧端子 76‧‧‧terminal

78、88、98‧‧‧引線 78, 88, 98‧‧‧ leads

80‧‧‧密封材料 80‧‧‧ Sealing material

100、200、400‧‧‧半導體裝置 100, 200, 400‧‧‧ semiconductor devices

300‧‧‧評價用基板 300‧‧‧ Evaluation substrate

W‧‧‧半導體晶圓 W‧‧‧Semiconductor Wafer

Wa、Waa、Wb、Wbb‧‧‧半導體元件 Wa, Waa, Wb, Wbb‧‧‧ semiconductor components

Ws‧‧‧半導體晶圓的主面 The main surface of the Ws‧‧ semiconductor wafer

圖1是第1實施方式所涉及的接著片的概略剖面圖。 FIG. 1 is a schematic cross-sectional view of a sheet according to a first embodiment.

圖2是表示第1實施方式所涉及的半導體裝置的製造方法中的一製程的剖面圖。 2 is a cross-sectional view showing a process in the method of manufacturing the semiconductor device according to the first embodiment.

圖3是表示圖2的後續製程的剖面圖。 Figure 3 is a cross-sectional view showing the subsequent process of Figure 2;

圖4是表示圖3的後續製程的剖面圖。 Figure 4 is a cross-sectional view showing the subsequent process of Figure 3.

圖5是本實施方式所涉及的半導體裝置的概略剖面圖。 FIG. 5 is a schematic cross-sectional view of the semiconductor device according to the embodiment.

圖6是本實施方式所涉及的其他半導體裝置的概略剖面圖。 FIG. 6 is a schematic cross-sectional view of another semiconductor device according to the embodiment.

圖7是本實施方式所涉及的其他半導體裝置的概略剖面圖。 FIG. 7 is a schematic cross-sectional view of another semiconductor device according to the embodiment.

以下,一邊參照圖示一邊對實施方式進行詳細說明。然而,在下述說明中,對相同或相當部分賦予相同符號,並省略重複的說明。此外,只要沒有特別說明,則上下左右等位置關係是根據圖面所示的位置關係。而且,圖面的尺寸比例並不限於圖示比例。 Hereinafter, the embodiment will be described in detail with reference to the drawings. In the following description, the same or corresponding portions will be denoted by the same reference numerals, and the repeated description will be omitted. Further, unless otherwise specified, the positional relationship such as up, down, left, and right is based on the positional relationship shown in the drawing. Moreover, the dimensional ratio of the drawings is not limited to the illustrated scale.

<接著片> <Next piece>

圖1是第1實施方式所涉及的接著片的概略剖面圖。如圖1所示,接著片1具有於基材2上積層有接著劑層4的構成。如下所述,設想接著片1在製造半導體裝置時,在積層製程中,貼附在半導體晶圓的電路面的背面。 FIG. 1 is a schematic cross-sectional view of a sheet according to a first embodiment. As shown in FIG. 1, the succeeding sheet 1 has a structure in which an adhesive layer 4 is laminated on a substrate 2. As described below, it is assumed that the succeeding sheet 1 is attached to the back surface of the circuit surface of the semiconductor wafer in the lamination process when manufacturing the semiconductor device.

接著劑層4的80℃下的熔融黏度為300Pa.s~3000Pa.s,較佳為500Pa.s~2900Pa.s,更佳為1000Pa.s~2800Pa.s,進一步較佳為1000Pa.s~2000Pa.s,最佳為1000Pa.s~1500Pa.s。熔融黏度例如可以使用旋轉式黏彈性測定裝置來測定。 The melt viscosity of the agent layer 4 at 80 ° C is 300 Pa. s~3000Pa. s, preferably 500 Pa. s~2900Pa. s, more preferably 1000Pa. s~2800Pa. s, further preferably 1000 Pa. s~2000Pa. s, the best is 1000Pa. s~1500Pa. s. The melt viscosity can be measured, for example, using a rotary viscoelasticity measuring device.

接著劑層4的黏性強度在30℃下較佳為0~1000gf,更佳為0~500gf。黏性強度是利用探針(probe)法測定所得的值。具體而言,黏性強度是使用雙面膠帶將接著片的接著劑層張貼在平行的玻璃板上,並自接著片剝離基材膜。然後,將其放在30℃的 熱板上,並以下述條件將探針按壓在接著劑層的表面,並且測定從接著劑層拉離探針時的強度所得的值。此外,黏性強度是在試驗速度:5mm/分鐘、初期荷重(初載):100gf/cm2、加壓時間:1.0秒的條件下測定出。 The adhesive strength of the layer 4 is preferably 0 to 1000 gf, more preferably 0 to 500 gf at 30 °C. The viscous strength is a value measured by a probe method. Specifically, the adhesive strength is that the adhesive layer of the adhesive sheet is attached to a parallel glass plate using a double-sided tape, and the base film is peeled off from the adhesive sheet. Then, it was placed on a hot plate at 30 ° C, and the probe was pressed against the surface of the adhesive layer under the following conditions, and the value obtained by pulling the probe from the strength of the adhesive layer was measured. Further, the viscous strength was measured under the conditions of a test speed: 5 mm/min, an initial load (initial load): 100 gf/cm 2 , and a pressurization time: 1.0 second.

若接著劑層4的黏性強度超過500gf,則所得的接著劑層的室溫下的表面黏著性變高,操作性有變差的傾向。 When the adhesive strength of the adhesive layer 4 exceeds 500 gf, the surface adhesiveness of the obtained adhesive layer at room temperature becomes high, and workability tends to be deteriorated.

接著劑層4的厚度較佳為5μm~150μm,更佳為20μm~60μm。若該厚度不足5μm,則存在著應力緩和效果或接著性變得不足的傾向;若該厚度超過150μm,則不夠經濟。 The thickness of the subsequent agent layer 4 is preferably from 5 μm to 150 μm, more preferably from 20 μm to 60 μm. When the thickness is less than 5 μm, the stress relaxation effect or the adhesion tends to be insufficient, and if the thickness exceeds 150 μm, it is not economical.

接著劑層4包括樹脂組成物,所述樹脂組成物包含:(A)高分子量成分、(B1)軟化點不足50℃的熱硬化性成分、(B2)軟化點為50℃以上且100℃以下的熱硬化性成分、以及(C)軟化點為100℃以下的苯酚樹脂。以下,對樹脂組成物之各成分的具體例及各成分的含量進行敘述。 The adhesive layer 4 includes a resin composition containing (A) a high molecular weight component, (B1) a thermosetting component having a softening point of less than 50 ° C, and (B2) a softening point of 50 ° C or more and 100 ° C or less. The thermosetting component and (C) a phenol resin having a softening point of 100 ° C or less. Hereinafter, specific examples of the respective components of the resin composition and the contents of the respective components will be described.

(A)高分子量成分 (A) high molecular weight components

(A)高分子量成分(以下僅記作「(A)成分」。)是具有交聯性官能基的成分,例如可以列舉:具有交聯性官能基的聚醯亞胺樹脂、(甲基)丙烯酸系共聚物、胺基甲酸樹脂、聚苯醚(polyphenylene ether)樹脂、聚醚醯亞胺(polyetherimide)樹脂、苯氧樹脂、改質聚苯醚樹脂等,其中,較佳為具有交聯性官能基的(甲基)丙烯酸系共聚物。這些(A)成分可以單獨使用一種,也可以兩種以上組合使用。上述交聯性官能基可以存在於聚合物鏈中,也可以 存在於聚合物鏈末端。作為交聯性官能基的具體例子,可以列舉:環氧基、醇性羥基、酚性羥基、羧基等,其中,較佳為環氧基,可藉由使用(甲基)丙烯酸縮水甘油酯等含環氧基的單體將交聯性官能基導入至聚合物鏈。 (A) a high molecular weight component (hereinafter simply referred to as "(A) component") is a component having a crosslinkable functional group, and examples thereof include a polyimine resin having a crosslinkable functional group, and (meth) Acrylic copolymer, urethane resin, polyphenylene ether resin, polyetherimide resin, phenoxy resin, modified polyphenylene ether resin, etc., among which crosslinkability is preferred A functional (meth)acrylic copolymer. These (A) components may be used alone or in combination of two or more. The above crosslinkable functional group may be present in the polymer chain or Present at the end of the polymer chain. Specific examples of the crosslinkable functional group include an epoxy group, an alcoholic hydroxyl group, a phenolic hydroxyl group, and a carboxyl group. Among them, an epoxy group is preferred, and glycidyl (meth)acrylate can be used. The epoxy group-containing monomer introduces a crosslinkable functional group to the polymer chain.

作為(A)成分,較佳為含環氧基的(甲基)丙烯酸系共聚物,例如可以列舉:含環氧基的(甲基)丙烯酸酯共聚物、含環氧基的丙烯酸系橡膠等,更佳為含環氧基的(甲基)丙烯酸酯共聚物。丙烯酸系橡膠是以丙烯酸酯作為主要成分的橡膠,例如包含丙烯酸丁酯或丙烯酸乙酯和丙烯腈的共聚物等的橡膠。對聚合方法沒有特別限定,可以採用珠狀聚合(pearl polymerization)、溶液聚合等。 The (A) component is preferably an epoxy group-containing (meth)acrylic copolymer, and examples thereof include an epoxy group-containing (meth)acrylate copolymer and an epoxy group-containing acrylic rubber. More preferably, it is an epoxy group-containing (meth) acrylate copolymer. The acrylic rubber is a rubber containing acrylate as a main component, and for example, a rubber containing butyl acrylate or a copolymer of ethyl acrylate and acrylonitrile. The polymerization method is not particularly limited, and pearl polymerization, solution polymerization, or the like can be employed.

(A)成分的玻璃轉變溫度較佳為-50℃~50℃,更佳為-30℃~20℃。若高分子量成分的玻璃轉變溫度為-50℃以上,則成形為片狀膜(sheet film)後的黏性變低,因此操作性提高。而且,若高分子量成分的玻璃轉變溫度為50℃以下,則可以確保流動性。 The glass transition temperature of the component (A) is preferably -50 ° C to 50 ° C, more preferably -30 ° C to 20 ° C. When the glass transition temperature of the high molecular weight component is -50 ° C or more, the viscosity after molding into a sheet film becomes low, and workability is improved. Further, when the glass transition temperature of the high molecular weight component is 50 ° C or lower, fluidity can be ensured.

對(A)成分的重量平均分子量(以下記作「Mw」。)沒有特別限定,但較佳為5萬~120萬,更佳為10萬~120萬,進一步較佳為30萬~90萬。若(A)成分的Mw為5萬以上,則成膜性變得良好;反之,若(A)成分的Mw為120萬以內,則流動性提高。此外,Mw是藉由凝膠滲透層析儀(gel permeation chromatography,GPC)進行測定,並使用根據標準聚苯乙烯的校準曲線進行換算而得到的值,泵使用株式會社日立製作所製、產 品名:L-6000,柱使用將日立化成工業株式會社製、產品名:Gelpack GL-R440、Gelpack GL-R450以及Gelpack GL-R400M(各自為10.7mm(直徑)×300mm)依序連接而成的柱,溶離液使用四氫呋喃(以下記作「THF」。),對於將120mg試樣溶解於5ml的THF中所得到的樣品,可以1.75mL/分鐘的流速進行測定。 The weight average molecular weight of the component (A) (hereinafter referred to as "Mw") is not particularly limited, but is preferably 50,000 to 1.2 million, more preferably 100,000 to 1,200,000, still more preferably 300,000 to 900,000. . When the Mw of the component (A) is 50,000 or more, the film formability is good. On the other hand, when the Mw of the component (A) is within 1.2 million, the fluidity is improved. In addition, Mw is measured by gel permeation chromatography (GPC) and converted to a value obtained by conversion from a calibration curve of standard polystyrene, and the pump is manufactured by Hitachi, Ltd. Product name: L-6000, the column is connected by Hitachi Chemical Co., Ltd., product name: Gelpack GL-R440, Gelpack GL-R450, and Gelpack GL-R400M (each 10.7 mm (diameter) × 300 mm). For the column and the dissolving solution, tetrahydrofuran (hereinafter referred to as "THF") was used, and a sample obtained by dissolving 120 mg of the sample in 5 ml of THF was measured at a flow rate of 1.75 mL/min.

以100質量%的樹脂組成物為基準,(A)成分的含量為11質量%~12質量%。此外,以100質量%的樹脂組成物為基準,(A)成分的含量較佳為13質量%~20質量%,更佳為15質量%~18質量%,進一步較佳為15質量%~17質量%。 The content of the component (A) is from 11% by mass to 12% by mass based on 100% by mass of the resin composition. Further, the content of the component (A) is preferably from 13% by mass to 20% by mass, more preferably from 15% by mass to 18% by mass, even more preferably from 15% by mass to 17% based on 100% by mass of the resin composition. quality%.

(B)熱硬化性成分 (B) thermosetting component

(B)熱硬化性成分可以較佳地使用在150℃以上反應而高分子量化的環氧樹脂,將(B1)軟化點不足50℃的熱硬化性成分(以下僅記作「(B1)成分」。)和(B2)軟化點為50℃以上且100℃以下的熱硬化性成分(以下僅記作「(B2)成分」。)混合使用。 (B) The thermosetting component can be preferably an epoxy resin having a high molecular weight reaction at 150 ° C or higher, and a thermosetting component having a softening point of (B1) of less than 50 ° C (hereinafter referred to simply as "(B1) component) (B2) A thermosetting component having a softening point of 50 ° C or more and 100 ° C or less (hereinafter simply referred to as "(B2) component") is used in combination.

環氧樹脂只要是硬化而具有接著作用的樹脂,則沒有特別限定。可以使用:雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂等二官能環氧樹脂;苯酚酚醛清漆型環氧樹脂或甲酚酚醛清漆型環氧樹脂等酚醛清漆型環氧樹脂等。此外,還可以使用多官能環氧樹脂、縮水甘油胺型環氧樹脂、含雜環的環氧樹脂或脂環式環氧樹脂等通常已知的環氧樹脂。 The epoxy resin is not particularly limited as long as it is a resin which is cured and has a function of adhesion. It can be used: bifunctional epoxy resin such as bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol S epoxy resin; phenol novolak epoxy resin or cresol novolak epoxy resin A novolak type epoxy resin or the like. Further, a generally known epoxy resin such as a polyfunctional epoxy resin, a glycidylamine type epoxy resin, a hetero ring-containing epoxy resin or an alicyclic epoxy resin can also be used.

作為(B1)成分,例如可以較佳地使用酚醛清漆型環氧樹脂。作為(B2)成分,例如可以較佳地使用雙酚F型環氧樹脂。 As the component (B1), for example, a novolac type epoxy resin can be preferably used. As the component (B2), for example, a bisphenol F-type epoxy resin can be preferably used.

以100質量%的樹脂組成物為基準,(B1)成分的含量為10質量%~20質量%。 The content of the component (B1) is from 10% by mass to 20% by mass based on 100% by mass of the resin composition.

以100質量%的樹脂組成物為基準,(B2)成分的含量為10質量%~20質量%。 The content of the component (B2) is from 10% by mass to 20% by mass based on 100% by mass of the resin composition.

(C)軟化點為100℃以下的苯酚樹脂 (C) Phenolic resin having a softening point of 100 ° C or less

(C)軟化點為100℃以下的苯酚樹脂(以下僅記作「(C)成分」。)作為硬化劑而發揮作用。藉由將軟化點設為100℃以下,可以降低接著劑組成物的熔融黏度,而提高對基板或半導體晶片之凹凸部或引線的埋入性。此外,軟化點較佳為50℃~100℃。若使用的苯酚樹脂的軟化點低於50℃,則存在室溫下的作業性降低的傾向。 (C) A phenol resin having a softening point of 100 ° C or less (hereinafter simply referred to as "(C) component") functions as a curing agent. By setting the softening point to 100 ° C or lower, the melt viscosity of the adhesive composition can be lowered, and the embedding property to the uneven portion or the lead of the substrate or the semiconductor wafer can be improved. Further, the softening point is preferably from 50 ° C to 100 ° C. When the softening point of the phenol resin to be used is less than 50 ° C, the workability at room temperature tends to be lowered.

此外,作為(C)成分,較佳為使用如下樹脂:投入至85℃、85%RH的恒溫恒濕槽中48小時後的吸水率為2質量%以下,使用熱重量分析儀(TGA)測定出的350℃下的加熱質量減少率(升溫速率:5℃/分鐘,環境氣體:氮)不足5質量%的苯酚樹脂。 Further, as the component (C), it is preferred to use a resin which has a water absorption rate of 2% by mass or less after 48 hours in a constant temperature and humidity chamber of 85 ° C and 85% RH, and is measured by a thermogravimetric analyzer (TGA). The phenol resin having a heating mass reduction rate (heating rate: 5 ° C / min, ambient gas: nitrogen) at 350 ° C was less than 5% by mass.

在本實施方式中,可以適合用作硬化劑的苯酚樹脂還可以市售品的形式獲取。例如,可以列舉:三井化學(株)製的商品名「MIREX XLC-系列」及「MIREX XL-系列」、大日本油墨化學工業(株)製的商品名「Phenolite LF-4871」。其中,就可將硬化時的交聯密度控制得較低的觀點而言,較佳為具有較低的軟化點的「MIREX XLC-系列」(軟化點為70℃)。此外,在本發明中, 作為環氧樹脂硬化劑的苯酚樹脂也包括在硬化劑中。 In the present embodiment, a phenol resin which can be suitably used as a curing agent can also be obtained in the form of a commercially available product. For example, the product name "MIREX XLC-series" and "MIREX XL-series" manufactured by Mitsui Chemicals Co., Ltd., and the product name "Phenolite LF-4871" manufactured by Dainippon Ink Chemical Industry Co., Ltd. Among them, from the viewpoint of controlling the crosslinking density at the time of curing to be low, it is preferably a "MIREX XLC-series" having a low softening point (softening point of 70 ° C). Further, in the present invention, A phenol resin as an epoxy resin hardener is also included in the hardener.

以100質量%的樹脂組成物為基準,(C)成分的含量為15質量%~30質量%。 The content of the component (C) is 15% by mass to 30% by mass based on 100% by mass of the resin composition.

(D)填料 (D) filler

對(D)填料沒有特別限定,較佳為無機填料,例如可以使用:氫氧化鋁、氫氧化鎂、碳酸鈣、碳酸鎂、矽酸鋁、矽酸鎂、氧化鈣、氧化鎂、氧化鋁、氮化鋁、硼酸鋁鬚晶、氮化硼、結晶性氧化矽及非晶質氧化矽。上述填料可以單獨使用一種或是將兩種以上混合使用,特別是若沒有問題則可以不添加。以100質量%的樹脂組成物為基準,(D)填料的含量較佳為0~0.15質量%。 The (D) filler is not particularly limited, and is preferably an inorganic filler. For example, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, aluminum niobate, magnesium niobate, calcium oxide, magnesium oxide, or aluminum oxide may be used. Aluminum nitride, aluminum borate whisker, boron nitride, crystalline cerium oxide, and amorphous cerium oxide. These fillers may be used singly or in combination of two or more kinds, and in particular, may be omitted if there is no problem. The content of the (D) filler is preferably from 0 to 0.15% by mass based on 100% by mass of the resin composition.

就導熱性提高的觀點而言,較佳為使用氧化鋁、氮化鋁、氮化硼、結晶性氧化矽及非晶質氧化矽。此外,就溶液濃度的調整以及觸變(thixotropic)性的賦予的觀點而言,較佳為使用氫氧化鋁、氫氧化鎂、碳酸鈣、碳酸鎂、矽酸鈣、矽酸鎂、氧化鈣、氧化鎂、氧化鋁、結晶性氧化矽及非晶質氧化矽。此外,就切割性提高的觀點而言,較佳為使用氧化鋁或氧化矽。 From the viewpoint of improving thermal conductivity, alumina, aluminum nitride, boron nitride, crystalline cerium oxide, and amorphous cerium oxide are preferably used. Further, from the viewpoint of adjustment of the solution concentration and imparting of thixotropic properties, it is preferred to use aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium citrate, magnesium citrate, calcium oxide, or the like. Magnesium oxide, aluminum oxide, crystalline cerium oxide, and amorphous cerium oxide. Further, from the viewpoint of improving the cutting property, alumina or cerium oxide is preferably used.

(D)填料的平均粒徑較佳為0.005μm~2.0μm。若平均粒徑小於0.005μm或超過2.0μm,則存在接著片的接著性降低的可能性。為了得到良好的成膜性和高接著力,(D)填料的平均粒徑更佳為0.005μm~1.5μm,進一步較佳為0.005μm~1.0μm。 The average particle diameter of the (D) filler is preferably from 0.005 μm to 2.0 μm. When the average particle diameter is less than 0.005 μm or exceeds 2.0 μm, there is a possibility that the adhesion of the sheet is lowered. In order to obtain good film formability and high adhesion, the average particle diameter of the (D) filler is more preferably from 0.005 μm to 1.5 μm, still more preferably from 0.005 μm to 1.0 μm.

此外,有關本實施方式的接著片1,藉由更包含(E)硬化促進劑或(F)偶合劑(coupling agent),而成為接著性及連接 可靠性更加優異者。 Further, the adhesive sheet 1 according to the present embodiment is further provided with an adhesive (E) hardening accelerator or (F) coupling agent to be adhesive and connected. More reliable.

(E)硬化促進劑 (E) hardening accelerator

(E)硬化促進劑並沒有特別限定,例如可以列舉:1,8-二氮雜雙環[5.4.0]十一烯-7、1,5-二氮雜雙環[4.3.0]壬烯-5、5,6-二丁基胺基-1,8-二氮雜雙環[5.4.0]十一烯-7等環脒化合物以及對這些化合物加成馬來酸酐、1,4-苯醌、2,5-甲苯醌、1,4-萘醌、2,3-二甲基苯醌、2,6-二甲基苯醌、2,3-二甲氧基-5-甲基-1,4-苯醌、2,3-二甲氧基-1,4-苯醌、苯基-1,4-苯醌等醌化合物、重氮苯基甲烷、苯酚樹脂等具有π鍵的化合物而形成的具有分子內分極的化合物;苄基二甲基胺、三乙醇胺、二甲基胺基乙醇、三(二甲基胺基甲基)苯酚等三級胺類以及這些的衍生物;1-氰基乙基-2-苯基咪唑、2-甲基咪唑、2-苯基咪唑、2-苯基-4-甲基咪唑、2-十七烷基咪唑等咪唑類以及這些的衍生物;三丁基膦、甲基二苯基膦、三苯基膦、三(4-甲基苯基)膦、二苯基膦、苯基膦等有機膦類以及對這些膦類加成馬來酸酐、上述醌化合物、重氮苯基甲烷、苯酚樹脂等具有π鍵的化合物而形成的具有分子內分極的磷化合物;四苯基鏻四苯基硼酸鹽、四苯基鏻乙基三苯基硼酸鹽、四丁基鏻四丁基硼酸鹽等四取代鏻.四取代硼酸鹽、2-乙基-4-甲基咪唑.四苯基硼酸鹽、N-甲基嗎啉.四苯基硼酸鹽等四苯基硼鹽以及這些的衍生物。這些硬化促進劑可以單獨使用一種或是將兩種以上組合使用。其中,作為硬化促進劑,較佳為包含咪唑類。以100質量%的樹脂組成物為基準,(E)硬化促進劑的含量較佳為28質量%~38質量%。 (E) The hardening accelerator is not particularly limited, and examples thereof include 1,8-diazabicyclo[5.4.0]undecene-7, 1,5-diazabicyclo[4.3.0]nonene- 5,6-Di-butylamino-1,8-diazabicyclo[5.4.0]undecene-7 and other cyclic oxime compounds and addition of maleic anhydride, 1,4-benzoquinone to these compounds , 2,5-toluene, 1,4-naphthoquinone, 2,3-dimethylphenylhydrazine, 2,6-dimethylphenylhydrazine, 2,3-dimethoxy-5-methyl-1 a compound having a π bond such as an anthracene compound such as 4-benzoquinone, 2,3-dimethoxy-1,4-benzoquinone or phenyl-1,4-benzoquinone, or a diazophenylmethane or a phenol resin; a compound having an intramolecular polarization; a tertiary amine such as benzyldimethylamine, triethanolamine, dimethylaminoethanol, or tris(dimethylaminomethyl)phenol; and derivatives thereof; Imidazoles such as cyanoethyl-2-phenylimidazole, 2-methylimidazole, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 2-heptadecylimidazole, and derivatives thereof; Organophosphines such as tributylphosphine, methyldiphenylphosphine, triphenylphosphine, tris(4-methylphenyl)phosphine, diphenylphosphine, phenylphosphine, and the addition of maleic anhydride to these phosphines , a phosphorus compound having an intramolecular polarization formed by a compound having a π bond such as a ruthenium compound, a diazophenylmethane or a phenol resin; tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium ethyltriphenylborate , tetrabutyl phosphonium tetrabutyl borate, etc. Tetrasubstituted borate, 2-ethyl-4-methylimidazole. Tetraphenylborate, N-methylmorpholine. Tetraphenylboron salts such as tetraphenylborate and derivatives thereof. These hardening accelerators may be used alone or in combination of two or more. Among them, as the curing accelerator, it is preferred to contain an imidazole. The content of the (E) hardening accelerator is preferably 28% by mass to 38% by mass based on 100% by mass of the resin composition.

(F)偶合劑 (F) coupling agent

藉由含有(F)偶合劑,可以提高樹脂組成物中的異種材料間的界面結合。作為偶合劑,可以列舉:矽烷系偶合劑、鈦酸酯系偶合劑、鋁系偶合劑,其中,較佳為矽烷系偶合劑。 By containing the (F) coupling agent, the interfacial bonding between the dissimilar materials in the resin composition can be improved. The coupling agent may, for example, be a decane coupling agent, a titanate coupling agent or an aluminum coupling agent. Among them, a decane coupling agent is preferred.

作為矽烷系偶合劑的具體例,可以列舉:乙烯基三氯矽烷、乙烯基三乙氧基矽烷、乙烯基三(β-甲氧基乙氧基)矽烷、γ-甲基丙烯醯氧基丙基三甲氧基矽烷、β-(3,4-環氧基環己基)乙基三甲氧基矽烷、γ-縮水甘油氧基丙基三甲氧基矽烷、γ-縮水甘油氧基丙基甲基二甲氧基矽烷、乙烯基三乙醯氧基矽烷、γ-巰基丙基三甲氧基矽烷、γ-胺基丙基三甲氧基矽烷、γ-胺基丙基甲基二甲氧基矽烷、γ-胺基丙基三乙氧基矽烷、γ-胺基丙基甲基二乙氧基矽烷、γ-苯胺基丙基三甲氧基矽烷、γ-苯胺基丙基三乙氧基矽烷、γ-(N,N-二甲基)胺基丙基三甲氧基矽烷、γ-(N,N-二乙基)胺基丙基三甲氧基矽烷、γ-(N,N-二丁基)胺基丙基三甲氧基矽烷、γ-(N-甲基)苯胺基丙基三甲氧基矽烷、γ-(N-乙基)苯胺基丙基三甲氧基矽烷、γ-(N,N-二甲基)胺基丙基三乙氧基矽烷、γ-(N,N-二乙基)胺基丙基三乙氧基矽烷、γ-(N,N-二丁基)胺基丙基三乙氧基矽烷、γ-(N-甲基)苯胺基丙基三乙氧基矽烷、γ-(N-乙基)苯胺基丙基三乙氧基矽烷、γ-(N,N-二甲基)胺基丙基甲基二甲氧基矽烷、γ-(N,N-二乙基)胺基丙基甲基二甲氧基矽烷、γ-(N,N-二丁基)胺基丙基甲基二甲氧基矽烷、γ-(N-甲基)苯胺基丙基甲基二甲氧基矽烷、γ-(N-乙基)苯胺基丙基甲基二甲氧基矽烷、N-(三 甲氧基甲矽烷基丙基)乙二胺、N-(二甲氧基甲基甲矽烷基異丙基)乙二胺、甲基三甲氧基矽烷、二甲基二甲氧基矽烷、甲基三乙氧基矽烷、γ-氯丙基三甲氧基矽烷、六甲基二矽烷、乙烯基三甲氧基矽烷、γ-巰基丙基甲基二甲氧基矽烷等。 Specific examples of the decane coupling agent include vinyltrichloromethane, vinyltriethoxydecane, vinyltris(β-methoxyethoxy)decane, and γ-methylpropenyloxypropane Trimethoxy decane, β-(3,4-epoxycyclohexyl)ethyltrimethoxydecane, γ-glycidoxypropyltrimethoxydecane, γ-glycidoxypropylmethyldi Methoxy decane, vinyl triethoxy decane, γ-mercaptopropyl trimethoxy decane, γ-aminopropyl trimethoxy decane, γ-aminopropyl methyl dimethoxy decane, γ -Aminopropyltriethoxydecane, γ-aminopropylmethyldiethoxydecane, γ-anilinopropyltrimethoxydecane, γ-anilinopropyltriethoxydecane, γ- (N,N-dimethyl)aminopropyltrimethoxydecane, γ-(N,N-diethyl)aminopropyltrimethoxydecane, γ-(N,N-dibutyl)amine Propyltrimethoxydecane, γ-(N-methyl)anilinopropyltrimethoxydecane, γ-(N-ethyl)anilinopropyltrimethoxydecane, γ-(N,N-di Methyl)aminopropyltriethoxydecane, γ-(N,N-diethyl)aminopropyltriethyl Oxydecane, γ-(N,N-dibutyl)aminopropyltriethoxydecane, γ-(N-methyl)anilinopropyltriethoxydecane, γ-(N-ethyl Anilinopropyltriethoxydecane, γ-(N,N-dimethyl)aminopropylmethyldimethoxydecane, γ-(N,N-diethyl)aminopropyl Dimethoxy decane, γ-(N,N-dibutyl)aminopropylmethyldimethoxydecane, γ-(N-methyl)anilinopropylmethyldimethoxydecane, Γ-(N-ethyl)anilinopropylmethyldimethoxydecane, N-(three Methoxymethylmercaptopropyl)ethylenediamine, N-(dimethoxymethylmethanealkylisopropyl)ethylenediamine, methyltrimethoxydecane, dimethyldimethoxydecane, A Triethoxy decane, γ-chloropropyltrimethoxydecane, hexamethyldioxane, vinyltrimethoxydecane, γ-mercaptopropylmethyldimethoxydecane, and the like.

接著,對有關本實施方式的接著片1的製造方法進行說明。首先,製備包括樹脂組成物的清漆(varnish)。清漆是藉由將構成樹脂組成物的各成分分別在有機溶劑中進行混合、混練而製備。上述混合、混練可適宜組合普通的攪拌機、擂潰機、三輥研磨機、球磨機等分散機來進行。 Next, a method of manufacturing the back sheet 1 according to the present embodiment will be described. First, a varnish including a resin composition was prepared. The varnish is prepared by mixing and kneading each component constituting the resin composition in an organic solvent. The above mixing and kneading can be carried out by suitably combining a dispersing machine such as a general mixer, a kneader, a three-roll mill, or a ball mill.

用於製備清漆的有機溶劑只要能夠均勻地溶解、混練或分散構成樹脂組成物的成分即可,並無限制,可以使用先前公知的有機溶劑。作為上述溶劑,例如可以列舉:二甲基甲醯胺、二甲基乙醯胺、N-甲基吡咯烷酮等醯胺系溶劑;丙酮、甲基乙基酮、環己酮等酮系溶劑;甲苯、二甲苯等烴系溶劑。就乾燥速度快、價格便宜的觀點而言,較佳為使用甲基乙基酮、環己酮。 The organic solvent used for the preparation of the varnish is not particularly limited as long as it can uniformly dissolve, knead or disperse the components constituting the resin composition, and a conventionally known organic solvent can be used. Examples of the solvent include a guanamine solvent such as dimethylformamide, dimethylacetamide or N-methylpyrrolidone; a ketone solvent such as acetone, methyl ethyl ketone or cyclohexanone; and toluene; A hydrocarbon solvent such as xylene. From the viewpoint of a fast drying speed and a low price, methyl ethyl ketone or cyclohexanone is preferably used.

有機溶劑較佳為在以所形成的樹脂組成物中的殘留揮發成分以總質量基準計成為0~1.0質量%的範圍中使用,由於擔心接著劑層4的起泡等引起的可靠性的降低,較佳為,以總質量基準計成為0~0.8質量%的範圍中使用。 The organic solvent is preferably used in a range of from 0 to 1.0% by mass based on the total mass of the residual volatile component in the formed resin composition, and that reliability is lowered due to foaming of the adhesive layer 4 or the like. Preferably, it is used in the range of 0 to 0.8% by mass based on the total mass.

接著,將在上述得到的各清漆分別均勻塗佈於基材膜上,形成清漆層。基材膜並無特別限定,例如可以使用聚酯膜、聚丙烯膜、聚對苯二甲酸乙二酯膜、聚醯亞胺膜、聚醚醯亞胺膜、 聚醚萘二甲酸膜、甲基戊烯膜等。對這些基材膜視需要亦可進行底漆(primer)塗佈、UV處理、電暈放電處理、研磨處理、蝕刻處理等表面處理。基材膜的厚度並無特別限定,可根據接著劑層4的厚度或接著片1的用途而適當選擇。 Next, each of the varnishes obtained above was uniformly applied onto a base film to form a varnish layer. The base film is not particularly limited, and for example, a polyester film, a polypropylene film, a polyethylene terephthalate film, a polyimide film, a polyether quinone film, or the like may be used. A polyether naphthalene dicarboxylic acid film, a methyl pentene film, or the like. These base film may be subjected to surface treatment such as primer coating, UV treatment, corona discharge treatment, polishing treatment, etching treatment, or the like as needed. The thickness of the base film is not particularly limited, and may be appropriately selected depending on the thickness of the adhesive layer 4 or the use of the sheet 1 .

藉由塗佈各清漆並進行加熱乾燥,而得到包含第1接著劑層4a、第2接著劑層4b的各片材。此外,在接著劑層乾燥後去除基材膜,可以形成只由各接著劑層構成的接著片。對加熱乾燥的條件沒有特別限定,只要所使用的有機溶劑充分揮散即可,但通常在60~200℃下加熱0.1~90分鐘。經由上述製程,可以製作接著片1。 Each of the varnishes is applied and dried by heating to obtain each of the sheets including the first adhesive layer 4a and the second adhesive layer 4b. Further, after the adhesive layer is dried, the base film is removed, and a continuous sheet composed of only the respective adhesive layers can be formed. The conditions for the heat drying are not particularly limited as long as the organic solvent to be used is sufficiently volatilized, but it is usually heated at 60 to 200 ° C for 0.1 to 90 minutes. Through the above process, the back sheet 1 can be produced.

<半導體裝置的製造方法> <Method of Manufacturing Semiconductor Device>

接下來,對使用上述接著片1製造半導體裝置的方法進行說明。圖2之(a)~圖2之(c)、圖3之(a)~圖3之(c)以及圖4之(a)~圖4之(c)是表示本實施方式所涉及的半導體裝置的製造方法中的一製程的製程剖面圖。 Next, a method of manufacturing a semiconductor device using the above-described succeeding sheet 1 will be described. 2(a) to 2(c), 3(a) to 3(c), and 4(a) to 4(c) show the semiconductor according to the embodiment. A process profile view of a process in a method of manufacturing a device.

首先,如圖2之(a)及圖2之(b)所示,一邊對接著片1進行加熱加壓,一邊將其經由接著劑層4貼附在半導體晶圓W的主面Ws上(積層製程)。此外,半導體晶圓W的電路面是與主面S的相反側的面。貼附接著片1後,如圖2之(c)所示,剝離去除基材2。剝離去除基材2後,如圖3之(a)及圖3之(b)所示,在設置於半導體晶圓W的主面Ws上的接著劑層4上,經由黏著層10貼附切割片12,所述切割片12具有依序積層有基材 8和紫外線硬化型或壓敏型的黏著層10的構成。貼附切割片12後,如圖3之(c)所示,切割半導體晶圓W和接著劑層4。此時,可以連同黏著層10一起切割,也可以連同基材8一起切割至其途中。 First, as shown in FIG. 2(a) and FIG. 2(b), the adhesive sheet 1 is attached to the main surface Ws of the semiconductor wafer W via the adhesive layer 4 while being heated and pressurized ( Laminated process). Further, the circuit surface of the semiconductor wafer W is a surface opposite to the main surface S. After the adhesive sheet 1 is attached, as shown in FIG. 2(c), the substrate 2 is peeled off. After the base material 2 is peeled off, as shown in FIG. 3(a) and FIG. 3(b), the adhesive layer 10 is attached to the adhesive layer 4 provided on the main surface Ws of the semiconductor wafer W. a sheet 12 having the substrate laminated in sequence 8 and the composition of the ultraviolet-curable or pressure-sensitive adhesive layer 10. After the dicing sheet 12 is attached, as shown in FIG. 3(c), the semiconductor wafer W and the adhesive layer 4 are diced. At this time, it may be cut together with the adhesive layer 10, or may be cut along with the substrate 8 to the middle thereof.

切割後,如圖4之(a)所示,藉由對黏著層10照射紫外線(當為壓敏型時則不需要),使黏著層10硬化,使接著劑層4與黏著層10之間的接著力降低。如圖4之(b)所示,從接著劑層4上剝離去除黏著層10和基材8,得到帶有接著劑層的半導體元件18(拾取製程)。帶有接著劑層的半導體元件18具有半導體元件Wa和接著劑層40。此外,半導體元件Wa是分割半導體晶圓W而得到的,接著劑層40是分別分割接著劑層4而得到的。得到帶有接著劑層的半導體元件18後,如圖4之(c)所示,藉由熱壓著將帶有接著劑層的半導體元件18經由接著劑層40接著於半導體元件搭載用的支撐構件14上(晶片黏著製程)。 After the dicing, as shown in FIG. 4(a), the adhesive layer 10 is cured by irradiating ultraviolet rays (when it is not required for the pressure sensitive type) to harden the adhesive layer 10 between the adhesive layer 4 and the adhesive layer 10. The adhesion is reduced. As shown in FIG. 4(b), the adhesive layer 10 and the substrate 8 are peeled off from the adhesive layer 4 to obtain a semiconductor element 18 with an adhesive layer (pickup process). The semiconductor element 18 with an adhesive layer has a semiconductor element Wa and an adhesive layer 40. Further, the semiconductor element Wa is obtained by dividing the semiconductor wafer W, and the adhesive layer 40 is obtained by dividing the adhesive layer 4, respectively. After the semiconductor element 18 having the adhesive layer is obtained, as shown in FIG. 4(c), the semiconductor element 18 with the adhesive layer is bonded to the support for mounting the semiconductor element via the adhesive layer 40 by thermal pressing. On the member 14 (wafer bonding process).

於支撐構件14上搭載半導體元件Wa後,於110~125℃下對接著劑層40進行0.5~1小時的加熱(膜硬化製程)。接著,將半導體元件Wa和支撐構件14藉由引線接合在230℃下電性連接。此時,將半導體元件Wa、接著劑層40及支撐構件14例如在170℃下加熱15分鐘左右(引線接合製程)。此處,當多段積層半導體元件18時,重複進行上述製程。 After the semiconductor element Wa is mounted on the support member 14, the adhesive layer 40 is heated at 110 to 125 ° C for 0.5 to 1 hour (film hardening process). Next, the semiconductor element Wa and the support member 14 were electrically connected at 230 ° C by wire bonding. At this time, the semiconductor element Wa, the adhesive layer 40, and the support member 14 are heated, for example, at 170 ° C for about 15 minutes (wire bonding process). Here, when the semiconductor element 18 is laminated in a plurality of stages, the above process is repeated.

即,再次藉由熱壓著將帶有接著劑層的半導體元件18經由接著劑層40接著於半導體元件Wa上。藉此,可以將多個半導 體元件Wa搭載於支撐構件14上。之後,反覆進行膜硬化、引線接合。如此一來,越是形成為多段,越是必須每次夾雜後硬化時間,因此當後硬化時間長時,生產效率大幅降低。 That is, the semiconductor element 18 with the adhesive layer is again bonded to the semiconductor element Wa via the adhesive layer 40 by heat pressing. Thereby, multiple semi-conductors can be used The body element Wa is mounted on the support member 14. Thereafter, film hardening and wire bonding are repeated. As a result, the more the formation is in multiple stages, the more it is necessary to harden the time after each inclusion, so that when the post-hardening time is long, the production efficiency is greatly reduced.

而且,雖然於支撐構件14的表面14a上形成樹脂密封材料,但也可以在與支撐構件14之表面14a相反側的面上形成樹脂密封材料。 Further, although the resin sealing material is formed on the surface 14a of the support member 14, a resin sealing material may be formed on the surface opposite to the surface 14a of the support member 14.

藉由經過上述製程,可以使用接著片1製造半導體裝置。 By the above process, the semiconductor device can be manufactured using the bonding sheet 1.

本實施方式所涉及的接著片1藉由特定出接著劑組成物中所含的(A)、(B1)、(B2)及(C)成分以及其含量,可以使這些成分相輔相成,降低黏性強度或80℃下的熔融黏度。因此,可以提供良好的拾取性或晶片接合性,並且可以提高所得的半導體裝置的可靠性。此外,若使用本實施方式所涉及的接著片1製造半導體裝置,則即使在縮短了後硬化時間的情況下,也可以抑制引線接合時的起泡。因此,藉由使用本發明所涉及的接著片,可以一邊提高生產效率,一邊提供具備高可靠性的半導體裝置。 In the adhesive sheet 1 according to the present embodiment, the components (A), (B1), (B2), and (C) contained in the specific adhesive composition and the content thereof can be used to complement each other and reduce the viscosity. Strength or melt viscosity at 80 °C. Therefore, good pickup property or wafer bonding property can be provided, and the reliability of the resulting semiconductor device can be improved. Further, when the semiconductor device is manufactured using the bonding sheet 1 according to the present embodiment, even when the post-hardening time is shortened, foaming at the time of wire bonding can be suppressed. Therefore, by using the bonding sheet according to the present invention, it is possible to provide a semiconductor device having high reliability while improving production efficiency.

本實施方式所涉及的接著片1中,接著劑層在80℃下的熔融黏度為300Pa.s~3000Pa.s。此時,在晶片接合製程中,可以對形成於基板等的表面的凹凸之凹部充分良好地填充接著劑。因此,可以提高基板與半導體晶片之間的接著性,並可以進一步提高半導體裝置的可靠性。 In the adhesive sheet 1 according to the present embodiment, the adhesive layer has a melt viscosity of 300 Pa at 80 ° C. s~3000Pa. s. At this time, in the wafer bonding process, the adhesive which is formed on the surface of the substrate or the like can be sufficiently filled with the adhesive. Therefore, the adhesion between the substrate and the semiconductor wafer can be improved, and the reliability of the semiconductor device can be further improved.

使用了本實施方式所涉及的接著片1且包括帶有接著劑層的半導體晶片的半導體裝置的製造方法的特徵在於包括:將帶 有接著劑層的半導體晶片18壓著在支撐構件14上,之後在110℃~125℃下對接著劑層40進行0.5小時~1小時的加熱的膜硬化製程;以及將帶有接著劑層的半導體晶片與支撐構件14經由接合引線而在230℃以下電性連接的引線接合製程。根據該製造方法,與使用了習知的接著片的情況相比,後硬化時間短,從而可以提高半導體裝置的生產效率。 A method of manufacturing a semiconductor device using the bonding sheet 1 according to the present embodiment and including a semiconductor wafer with an adhesive layer is characterized by comprising: a tape a semiconductor wafer 18 having an adhesive layer pressed against the support member 14, followed by a film hardening process for heating the adhesive layer 40 at 110 ° C to 125 ° C for 0.5 hours to 1 hour; and a layer with an adhesive layer A wire bonding process in which a semiconductor wafer and a support member 14 are electrically connected at 230 ° C or lower via a bonding wire. According to this manufacturing method, the post-hardening time is shorter than in the case of using a conventional one, and the production efficiency of the semiconductor device can be improved.

<半導體裝置> <semiconductor device>

接下來,對藉由上述半導體裝置的製造方法所製造的半導體裝置100進行說明。圖5是本實施方式所涉及的半導體裝置的概略剖面圖。圖5所示的半導體裝置100具備:半導體元件搭載用的支撐構件14、以及設在支撐構件14上的多個(例如兩個)半導體元件Wa。支撐構件14與半導體元件Wa經由接著劑層40接著著。此外,半導體元件Wa、Wa彼此之間也經由接著劑層40接著著。支撐構件14包括形成有電路圖案74及端子76的基板70。該電路圖案74與半導體元件Wa藉由金引線等引線78分別電連接著。而且,樹脂製的密封材料80設置在支撐構件14的表面14a上,藉此將半導體元件Wa、接著劑層4、電路圖案74及引線78密封。此外,密封材料80還可以設置在與支撐構件14之表面14a相反側的面上。 Next, a description will be given of a semiconductor device 100 manufactured by the above-described method of manufacturing a semiconductor device. FIG. 5 is a schematic cross-sectional view of the semiconductor device according to the embodiment. The semiconductor device 100 shown in FIG. 5 includes a support member 14 for mounting a semiconductor element, and a plurality of (for example, two) semiconductor elements Wa provided on the support member 14. The support member 14 and the semiconductor element Wa are followed by the adhesive layer 40. Further, the semiconductor elements Wa and Wa are also connected to each other via the adhesive layer 40. The support member 14 includes a substrate 70 on which a circuit pattern 74 and terminals 76 are formed. The circuit pattern 74 and the semiconductor element Wa are electrically connected to each other by a lead 78 such as a gold lead. Further, a resin sealing material 80 is provided on the surface 14a of the support member 14, whereby the semiconductor element Wa, the adhesive layer 4, the circuit pattern 74, and the leads 78 are sealed. Further, the sealing material 80 may also be disposed on a face opposite to the surface 14a of the support member 14.

半導體裝置100是藉由上述之本實施方式所涉及的半導體裝置的製造方法,並使用接著片1製造而成。因此,對起因於形成於支撐構件14之表面14a上的電路圖案74的凹凸之凹部充 分良好地填充有接著劑層4。因此,可以提高半導體裝置100的可靠性。 The semiconductor device 100 is manufactured by using the bonding sheet 1 by the method of manufacturing the semiconductor device according to the above-described embodiment. Therefore, the concave portion of the unevenness of the circuit pattern 74 resulting from the surface 14a formed on the support member 14 is charged. The adhesive layer 4 is well filled. Therefore, the reliability of the semiconductor device 100 can be improved.

以上,對實施方式進行了詳細說明,但本發明並不受上述實施方式的限定。 The embodiments have been described in detail above, but the present invention is not limited to the above embodiments.

例如,在上述實施方式中,可以使用不具備基材2、8的接著片1。即,接著片可以設為包括第1接著劑層4a及第1接著劑層4b的片,也可以是包括第1接著劑層4a、第1接著劑層4b以及黏著層10組成的片,亦可設為包括單層的黏接著劑層的片。 For example, in the above embodiment, the back sheet 1 not including the base materials 2 and 8 can be used. In other words, the adhesive sheet may be a sheet including the first adhesive layer 4a and the first adhesive layer 4b, or may be a sheet including the first adhesive layer 4a, the first adhesive layer 4b, and the adhesive layer 10. A sheet comprising a single layer of an adhesive layer can be provided.

使用本實施方式所涉及的接著片1所製造的半導體裝置並不限於半導體裝置100。圖6是另一實施方式所涉及的半導體裝置的概略剖面圖。圖6所示的半導體裝置200具備:半導體元件搭載用的支撐構件14、設在支撐構件14上的半導體元件Waa、經由接著劑層40與半導體元件Waa接著的半導體元件Wa。支撐構件14與半導體元件Waa經由接著劑41接著著。作為接著劑41,只要是由能夠將半導體元件Waa與支撐構件14接著的物質構成即可。支撐構件14包括形成有電路圖案84、電路圖案94的基板90。電路圖案84與半導體元件Waa藉由金引線等引線88電連接著,半導體元件Waa及引線78藉由接著劑層40密封著。 The semiconductor device manufactured using the bonding sheet 1 according to the present embodiment is not limited to the semiconductor device 100. FIG. 6 is a schematic cross-sectional view of a semiconductor device according to another embodiment. The semiconductor device 200 shown in FIG. 6 includes a support member 14 for mounting a semiconductor element, a semiconductor element Waa provided on the support member 14, and a semiconductor element Wa following the semiconductor element Waa via the adhesive layer 40. The support member 14 and the semiconductor element Waa are followed by the adhesive 41. The adhesive 41 may be formed of a material capable of adhering the semiconductor element Waa to the support member 14. The support member 14 includes a substrate 90 on which a circuit pattern 84 and a circuit pattern 94 are formed. The circuit pattern 84 and the semiconductor element Waa are electrically connected by a lead 88 such as a gold lead, and the semiconductor element Waa and the lead 78 are sealed by the adhesive layer 40.

在半導體裝置200中,對起因於引線88及電路圖案84的凹凸之凹部充分良好地埋入有接著劑層40。此外,藉由接著劑層40可以防止半導體元件Wa與引線88接觸。藉此,可以提高半導體裝置的可靠性。此外,在半導體裝置200中,藉由接著劑層 40可以將半導體元件Waa與引線88一次性密封。 In the semiconductor device 200, the adhesive layer 40 is sufficiently buried in the concave portion due to the unevenness of the lead 88 and the circuit pattern 84. Further, the semiconductor element Wa can be prevented from coming into contact with the lead 88 by the adhesive layer 40. Thereby, the reliability of the semiconductor device can be improved. Further, in the semiconductor device 200, the adhesive layer is used The semiconductor element Waa and the lead 88 can be sealed at one time.

此外,作為使用本實施方式所涉及的接著片1所製造的半導體裝置,還可以列舉以下所示的半導體裝置400。圖7之(b)所示的半導體裝置400是於評價用基板30上壓著有經個片化的晶片(第二段的半導體元件Wb+接著劑層40)的裝置,而且是按照以下步驟所製造。首先,在70℃下將上述接著片1的接著劑層40(厚度為60μm)貼在厚度為50μm的半導體晶圓(尺寸:8英寸)上。接下來,將這些切割成7.5mm見方,從而得到接著有接著劑層40的半導體元件(晶片)Wb(參照圖7之(a))。 In addition, as the semiconductor device manufactured by using the bonding sheet 1 according to the present embodiment, the semiconductor device 400 described below can be also mentioned. The semiconductor device 400 shown in FIG. 7(b) is a device in which a wafer (a second-stage semiconductor device Wb+adhesive layer 40) is pressed against the evaluation substrate 30, and the following steps are performed. Manufacturing. First, the adhesive layer 40 (thickness: 60 μm) of the above-mentioned succeeding sheet 1 was attached to a semiconductor wafer (size: 8 inches) having a thickness of 50 μm at 70 °C. Next, these were cut into 7.5 mm squares to obtain a semiconductor element (wafer) Wb followed by the adhesive layer 40 (see FIG. 7(a)).

然後,如圖7之(a)所示,在120℃、0.10MPa、1秒鐘的條件下將經個片化的半導體元件Wb的接著劑層40壓著在評價用基板300上,藉此得到半導體裝置400。此外,在圖7所示的評價用基板300中,第一段的半導體元件Wbb藉由接著劑41與支撐構件14接著。支撐構件14包括形成有電路圖案104的基板90。作為接著劑41,只要由可以將半導體元件Wbb與支撐構件14接著的物質構成即可。例如可以使用日立化成工業(株)製的膜狀接著劑FH-900-20。此外,半導體元件Wbb上連接有引線98。引線98連接在相對的兩邊,例如在各邊上以225μm的間隔配置有32根。 Then, as shown in FIG. 7(a), the adhesive layer 40 of the diced semiconductor element Wb is pressed against the evaluation substrate 300 under the conditions of 120 ° C and 0.10 MPa for 1 second. A semiconductor device 400 is obtained. Further, in the evaluation substrate 300 shown in FIG. 7, the first-stage semiconductor element Wbb is followed by the support member 14 by the adhesive 41. The support member 14 includes a substrate 90 on which the circuit pattern 104 is formed. The adhesive 41 may be formed of a material that can connect the semiconductor element Wbb to the support member 14. For example, a film-like adhesive FH-900-20 manufactured by Hitachi Chemical Co., Ltd. can be used. Further, a lead wire 98 is connected to the semiconductor element Wbb. The lead wires 98 are connected to the opposite sides, for example, 32 pieces are arranged on each side at intervals of 225 μm.

以下,藉由實施例來詳細說明本發明,但本發明並不受這些實施例的限定。 Hereinafter, the present invention will be described in detail by way of examples, but the invention should not be construed as limited.

<接著片的製作> <Next film production>

在實施例1、實施例2及比較例1~3中,使用表1所示的成分,按照以下步驟製備包括接著劑組成物的清漆。首先,調配(B1)成分、(B2)成分及(D)填料後,加入環己酮進行攪拌,接著加入(A)成分、(E)硬化促進劑及(F)偶合劑,並攪拌至各成分達到均勻為止,藉此得到接著劑組成物的清漆。 In Example 1, Example 2, and Comparative Examples 1 to 3, using the components shown in Table 1, a varnish including an adhesive composition was prepared in the following procedure. First, after blending the (B1) component, the (B2) component, and the (D) filler, cyclohexanone is added and stirred, and then (A) component, (E) hardening accelerator, and (F) coupling agent are added, and stirred until each The varnish of the adhesive composition was obtained until the ingredients were homogeneous.

(A)高分子量成分(A) (A) High molecular weight component (A)

丙烯酸系橡膠:長瀨精細化工(Nagase chemteX)株式會社製商品名,商品名「HTR-860P-3」,重量平均分子量為80萬,玻璃轉變溫度:-13℃ Acrylic rubber: trade name of Nagase chemteX Co., Ltd., trade name "HTR-860P-3", weight average molecular weight of 800,000, glass transition temperature: -13 °C

(B)熱硬化性成分(B1) (B) Thermosetting component (B1)

甲酚酚醛清漆型環氧樹脂:東都化成株式會社(株)製,商品名「YDCN-700-10」,環氧當量:210 Cresol novolac type epoxy resin: manufactured by Tohto Kasei Co., Ltd., trade name "YDCN-700-10", epoxy equivalent: 210

(B)熱硬化性成分(B2) (B) Thermosetting component (B2)

雙酚F型環氧樹脂:DIC株式會社,商品名「EXA-830CRP」,環氧當量:159 Bisphenol F type epoxy resin: DIC Corporation, trade name "EXA-830CRP", epoxy equivalent: 159

(C)軟化點為100℃以下的苯酚樹脂(硬化劑) (C) Phenolic resin (hardener) having a softening point of 100 ° C or less

苯酚樹脂:三井化學株式會社(株)製,商品名「MIREX XLC-LL」,軟化點:75℃,羥基當量:175 Phenol resin: manufactured by Mitsui Chemicals, Inc., trade name "MIREX XLC-LL", softening point: 75 ° C, hydroxyl equivalent: 175

苯酚樹脂:大日本油墨化學工業(株)製,商品名「Phenolite LF-4871」,軟化點:130℃,羥基當量:118 Phenol resin: manufactured by Dainippon Ink Chemical Industry Co., Ltd., trade name "Phenolite LF-4871", softening point: 130 ° C, hydroxyl equivalent: 118

(D)填料 (D) filler

氧化矽填料:Adomatex株式會社製,商品名「SC2050-HLG」,平 均粒徑為0.500μm Cerium oxide filler: manufactured by Adomatex Co., Ltd., trade name "SC2050-HLG", flat The average particle size is 0.500μm

(E)硬化促進劑 (E) hardening accelerator

1-氰基乙基-2-苯基咪唑Curezol:四國化成工業株式會社(株)製,商品名「2PZ-CN」 1-Cyanoethyl-2-phenylimidazole Curezol: manufactured by Shikoku Chemicals Co., Ltd., trade name "2PZ-CN"

(F)偶合劑 (F) coupling agent

γ-巰基丙基三甲氧基矽烷:日本UNIKA株式會社製,商品名「NUC A-189」 γ-Mercaptopropyltrimethoxydecane: manufactured by UNIKA CORPORATION, Japan under the trade name "NUC A-189"

γ-脲基丙基三乙氧基矽烷:日本UNIKA株式會社製,商品名「NUC A-1160」 Γ-ureidopropyl triethoxy decane: manufactured by UNIKA CORPORATION, Japan under the trade name "NUC A-1160"

接著,將上述清漆塗佈於基材膜上、即厚38μm的經脫模處理的聚對苯二甲酸乙二酯膜上,於140℃下在基材膜上加熱乾燥5分鐘,製作接著片(厚40μm)。 Next, the varnish was applied onto a substrate film, that is, a release-treated polyethylene terephthalate film having a thickness of 38 μm, and dried by heating on a substrate film at 140 ° C for 5 minutes to prepare a film. (thickness 40 μm).

<接著片的評價> <Evaluation of the film>

以如下方式評價在實施例1、實施例2及比較例1~3所製作的接著片的特性。 The characteristics of the succeeding sheets produced in Example 1, Example 2, and Comparative Examples 1 to 3 were evaluated as follows.

(1)熔融黏度的測定 (1) Determination of melt viscosity

使用旋轉式黏彈性測定裝置(TA INSTRUMENT JAPAN株式會社(株),ARES-RDA)測定實施例1、實施例2及比較例1~3的接著片的接著劑層的熔融黏度。具體步驟如下所示。首先,從接著片1上剝離基材膜2,之後將接著劑層4在70℃下多枚層壓而貼合,以使膜厚達到100μm以上,並沖出成直徑為8mm的圓形。用兩片同樣為8mm的治具夾住所製作的圓形膜,從而製作樣品,並進行了測定(以測定條件:頻率:1Hz、測定開始溫度:35℃、測定結束溫度:150℃、升溫速度:5℃/分鐘的測定條件下進行測定,讀取80℃的值)。將結果示於表2。 The melt viscosity of the adhesive layer of the succeeding sheets of Example 1, Example 2, and Comparative Examples 1 to 3 was measured using a rotary viscoelasticity measuring apparatus (TA INSTRUMENT JAPAN Co., Ltd., ARES-RDA). The specific steps are as follows. First, the base film 2 was peeled off from the back sheet 1, and then the adhesive layer 4 was laminated and laminated at 70 ° C to have a film thickness of 100 μm or more, and was punched out into a circular shape having a diameter of 8 mm. A circular film prepared by sandwiching two pieces of the same 8 mm was used to prepare a sample, and the measurement was performed (measurement conditions: frequency: 1 Hz, measurement start temperature: 35 ° C, measurement end temperature: 150 ° C, temperature increase rate) : Measurement was carried out under the measurement conditions of 5 ° C / min, and the value of 80 ° C was read). The results are shown in Table 2.

(2)引線埋入性 (2) Lead embedding

於表面塗布有Al的150μm厚的半導體晶圓的背面貼附FH-900-25(日立化成工業製),並使用切割機(DISCO製DFD-6361)將其切割成7.5mm×7.5mm。使用可撓式晶片接合機((株)Lunesass東日本Semiconductor製DB730SP)在150℃/0.04MPa/1秒鐘下進行熱壓著。使用引線接合機((株)新川製UTC-230BI)形成柱凸塊(Stud Bump),使用彈性體貼附機((株)Lunesass東日本Semiconductor製,商品名「ES-10」),在r.t./3.2kgf(50g/凸塊)/3秒下使凸塊調平(leveling)。使用引線接合機進行接合,製成引線埋入性評價用基板。在70℃下於100μm厚的半導體晶圓上積層接著片1,並使用切割機切割成7.5mm×7.5mm。接著,使用可撓式晶片接合機在120℃/0.1MPa/1秒下進行熱壓著,而製作評價用樣品。使用真空蒸鍍機((株)真空device製VE2030)對上述評價 用樣品進行碳蒸鍍。使用環境控制型掃描電子顯微鏡((株)飛利浦製,商品名「LC30」),從傾斜15°的角度觀察引線埋入部分,並評價埋入性。埋入性良好的樣品判斷為「○」,埋入性差的樣品判斷為「×」。測定結果示於表2。 FH-900-25 (manufactured by Hitachi Chemical Co., Ltd.) was attached to the back surface of a 150 μm thick semiconductor wafer coated with Al on the surface thereof, and was cut into 7.5 mm × 7.5 mm using a cutter (DFD-6361 manufactured by DISCO). The film was heat-pressed at 150 ° C / 0.04 MPa / 1 second using a flexible wafer bonding machine (DB730SP manufactured by Lunesass Co., Ltd., Japan). In order to form a stud bump using a wire bonding machine (UTC-230BI, manufactured by Shinagawa Co., Ltd.), an elastomer-attached machine (manufactured by Lunesass East Japan Semiconductor Co., Ltd., trade name "ES-10") was used at rt/3.2. Kgf (50g / bump) / 3 seconds to level the bump. Bonding was performed using a wire bonding machine to prepare a substrate for evaluation of the embedding adhesion. The sheet 1 was laminated on a 100 μm thick semiconductor wafer at 70 ° C and cut into 7.5 mm × 7.5 mm using a cutter. Next, it was heat-pressed at 120 ° C / 0.1 MPa / 1 second using a flexible wafer bonding machine to prepare a sample for evaluation. The above evaluation was performed using a vacuum vapor deposition machine (VE2030 manufactured by Vacuum Equipment Co., Ltd.) The sample was subjected to carbon evaporation. The embedding property was observed from the angle of inclination of 15° using an environmentally controlled scanning electron microscope (product name "LC30" manufactured by Philips). The sample having good embedding property was judged as "○", and the sample having poor embedding property was judged as "x". The measurement results are shown in Table 2.

(3)接著強度的測定 (3) Determination of the strength

利用下述方法測定接著劑層的模具剪切(die shear)強度(接著強度)。首先,在70℃下將接著片的接著劑層貼附在厚度為400μm的半導體晶圓上。接下來,將這些切割成5mm見方,而得到帶有接著劑層的半導體晶片。在120℃/0.1MPa/5秒的條件下將經個片化的帶有接著劑層的半導體晶片的接著劑層側熱壓著在引線框架(大日本印刷(株)製,商品名「42alloy LF810TR」)上。接下來,在烘箱中進行110℃/1小時+170℃/3小時的階段式硬化,以使晶片接合膜完全硬化。使用萬能接合測試機(Dage公司製,4000系列),在6.7MPa/秒、250℃的溫度條件下測定模具剪切強度,將其作為接著強度。測定結果如表2所示。 The die shear strength (adequate strength) of the adhesive layer was measured by the following method. First, the adhesive layer of the adhesive sheet was attached to a semiconductor wafer having a thickness of 400 μm at 70 °C. Next, these were cut into 5 mm squares to obtain a semiconductor wafer with an adhesive layer. The adhesive layer side of the sheet-formed semiconductor wafer with an adhesive layer was heat-pressed on the lead frame (manufactured by Dainippon Printing Co., Ltd. under the trade name "42alloy" at 120 ° C / 0.1 MPa / 5 sec. LF810TR"). Next, step hardening at 110 ° C / 1 hour + 170 ° C / 3 hours was carried out in an oven to completely harden the wafer bonding film. The mold shear strength was measured at a temperature of 6.7 MPa/sec and 250 ° C using a universal joint tester (manufactured by Dage Co., Ltd., 4000 series), and this was used as the adhesion strength. The measurement results are shown in Table 2.

(4)絕緣可靠性試驗(HAST:highly Accelerated Storage Test)使用壓著機在100℃、壓力為2kgf、貼附時間為10秒的條件下將切出的膜(5mm×12mm)貼在電蝕試驗用基板(蝕刻ESPANEX上的銅箔所形成的梳形圖案(未鍍金,線長30μm,間隔70μm))上。將其在170℃下硬化5小時而成者作為樣品。硬化後,將樣品放在加速壽命試驗裝置(HIRAYAMA製,商品名+「PL-422R8」,條件:130℃/85%/100小時)中,測定絕緣電阻。 作為評價方法,在20小時以內變成106Ω以下的樣品記作「×」,在50小時以上且100小時以內變成106Ω以下的樣品記作「△」,保持106Ω以上100小時以上的樣品記作「○」,測定結果示於表2。 (4) Insulation reliability test (HAST: highly accelerated Storage Test) The film (5 mm × 12 mm) was cut into the electrolytic corrosion using a crimping machine at 100 ° C, a pressure of 2 kgf, and a bonding time of 10 seconds. Test substrate (a comb pattern (not gold plated, line length 30 μm, interval 70 μm) formed by etching a copper foil on ESPANEX). It was cured at 170 ° C for 5 hours as a sample. After hardening, the sample was placed in an accelerated life tester (manufactured by HIRAYAMA, trade name: "PL-422R8", condition: 130 ° C / 85% / 100 hours), and the insulation resistance was measured. As a method of evaluation, a sample which becomes 106 Ω or less within 20 hours is referred to as “×”, and a sample which becomes 106 Ω or less within 50 hours or more and 100 Ω or less is referred to as “Δ”, and a sample which is maintained at 106 Ω or more and 100 hours or longer is referred to as “○”. The measurement results are shown in Table 2.

(5)黏性強度力的測定試驗 (5) Determination test of viscous strength

利用探針法測定實施例1、實施例2及比較例1~3的接著劑層片的黏性強度,具體而言,首先,使用雙面膠帶將接著片的接著劑層張貼在平行的玻璃板上。接著,自接著片剝離基材膜,並放置在30℃的熱板上,並且在下述條件下將探針按壓在接著劑層的表面,測定自接著劑層拉離探針時的強度作為黏性強度。測定結果示於表2。 The adhesive strength of the adhesive layer sheets of Example 1, Example 2, and Comparative Examples 1 to 3 was measured by a probe method. Specifically, first, the adhesive layer of the adhesive sheet was attached to the parallel glass using a double-sided tape. On the board. Next, the substrate film was peeled off from the adhesive sheet, and placed on a hot plate at 30 ° C, and the probe was pressed against the surface of the adhesive layer under the following conditions, and the strength when the adhesive layer was pulled away from the probe was measured as a viscosity. Sexual strength. The measurement results are shown in Table 2.

試驗速度:5mm/分鐘 Test speed: 5mm/min

加壓時間:1.0秒 Pressurization time: 1.0 second

初期荷重(初載):200gf Initial load (first load): 200gf

(6)起泡試驗 (6) Foaming test

首先,在70℃下將接著片積層在厚度為100μm的半導體晶圓上,並小片化成10mm×10mm。將帶有該經小片化的接著片的晶片在120℃/0.1MPa/1秒的條件下壓著在厚度為625μm的半導體晶圓上,在110℃下進行1小時的熱硬化後,在200℃下在熱板上施加與引線接合熱相當的熱達10分鐘。之後,使用超聲波探查裝置(SAT)(日立建機(株)製,商品名「HYE-FOCUS」)評價是否起泡。將沒有起泡的樣品記作「○」,將發現起泡的樣品記作「×」。將如上述般進行了測定的結果示於表2。 First, a laminate was placed on a semiconductor wafer having a thickness of 100 μm at 70 ° C and sliced into 10 mm × 10 mm. The wafer with the diced tab was pressed on a semiconductor wafer having a thickness of 625 μm at 120 ° C / 0.1 MPa / 1 sec, and thermally cured at 110 ° C for 1 hour, at 200 ° A heat equivalent to the wire bonding heat was applied to the hot plate at ° C for 10 minutes. Then, it was evaluated whether or not foaming was performed using an ultrasonic probe device (SAT) (trade name "HYE-FOCUS", manufactured by Hitachi Construction Machinery Co., Ltd.). A sample without foaming was recorded as "○", and a sample in which foaming was found was recorded as "x". The results of the measurement as described above are shown in Table 2.

根據本發明,可以提供如下接著片:能夠一邊提高生產效率,一邊實現埋入性及拾取性良好且具有高可靠性的半導體裝置。 According to the present invention, it is possible to provide a semiconductor wafer which is excellent in embedding property and pickup property and has high reliability while improving production efficiency.

1‧‧‧接著片 1‧‧‧Next film

2‧‧‧基材 2‧‧‧Substrate

4‧‧‧接著劑層 4‧‧‧ adhesive layer

Claims (3)

一種接著片,其特徵在於:包括樹脂組成物,所述樹脂組成物包含:(A)高分子量成分、(B1)軟化點不足50℃的熱硬化性成分、(B2)軟化點為50℃以上且100℃以下的熱硬化性成分、以及(C)軟化點為100℃以下的苯酚樹脂,該接著片以100質量%的該樹脂組成物為基準,含有11質量%~22質量%的上述(A)高分子量成分、10質量%~20質量%的上述(B1)軟化點不足50℃的熱硬化性成分、10質量%~20質量%的上述(B2)軟化點為50℃以上且100℃以下的熱硬化性成分、以及15質量%~30質量%的上述(C)軟化點為100℃以下的苯酚樹脂。 An adhesive sheet comprising: a resin composition comprising: (A) a high molecular weight component; (B1) a thermosetting component having a softening point of less than 50 ° C; and (B2) a softening point of 50 ° C or more And a thermosetting component of 100 ° C or less and (C) a phenol resin having a softening point of 100 ° C or less, and the backing sheet contains 11% by mass to 22% by mass based on 100% by mass of the resin composition. A) a high molecular weight component, 10% by mass to 20% by mass of the above (B1) thermosetting component having a softening point of less than 50 ° C, and 10% by mass to 20% by mass of the above (B2) softening point of 50 ° C or more and 100 ° C The following thermosetting component and 15% by mass to 30% by mass of the above (C) softening point are phenol resins of 100 ° C or less. 如申請專利範圍第1項所述的接著片,其在80℃下的熔融黏度為300Pa.s~3000Pa.s。 The adhesive sheet according to claim 1, wherein the melt viscosity at 80 ° C is 300 Pa. s~3000Pa. s. 一種半導體裝置的製造方法,其特徵在於:其是使用了如申請專利範圍第1項或第2項所述的接著片且包括帶有接著劑層的半導體晶片的半導體裝置的製造方法,其中包括:膜硬化製程,將上述帶有接著劑層的半導體晶片壓著在電路基板上,之後在110℃~125℃下對上述接著劑層進行0.5小時~1小時的加熱;以及引線接合製程,將上述帶有接著劑層的半導體晶片與電路基板經由接合引線而在230℃以下電性連接。 A method of manufacturing a semiconductor device, which is a method of fabricating a semiconductor device using a semiconductor wafer as described in claim 1 or 2 and comprising a semiconductor wafer with an adhesive layer, including : a film hardening process, pressing the semiconductor wafer with the adhesive layer on the circuit substrate, and then heating the adhesive layer at 110 ° C to 125 ° C for 0.5 hour to 1 hour; and a wire bonding process The semiconductor wafer with the adhesive layer and the circuit board are electrically connected to each other at 230 ° C or lower via a bonding wire.
TW102108050A 2012-03-08 2013-03-07 Substrate and method of manufacturing semiconductor device TWI485225B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012052156 2012-03-08
JP2012288113 2012-12-28

Publications (2)

Publication Number Publication Date
TW201346003A true TW201346003A (en) 2013-11-16
TWI485225B TWI485225B (en) 2015-05-21

Family

ID=49116750

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102108050A TWI485225B (en) 2012-03-08 2013-03-07 Substrate and method of manufacturing semiconductor device

Country Status (6)

Country Link
US (1) US9212298B2 (en)
JP (3) JPWO2013133275A1 (en)
KR (5) KR101953052B1 (en)
CN (2) CN106024654B (en)
TW (1) TWI485225B (en)
WO (1) WO2013133275A1 (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102344987B1 (en) * 2013-12-24 2021-12-30 닛토덴코 가부시키가이샤 Dicing·die bond film, manufacturing method for semiconductor device, and semiconductor device
KR102310226B1 (en) * 2013-12-24 2021-10-08 닛토덴코 가부시키가이샤 Adhesive film, dicing·die bond film, manufacturing method for semiconductor device, and semiconductor device
JP6312422B2 (en) * 2013-12-24 2018-04-18 日東電工株式会社 Dicing die bond film, semiconductor device manufacturing method, and semiconductor device
JP2015145489A (en) * 2014-01-06 2015-08-13 Dic株式会社 Thermoadhesive sheet and article
CN106459719A (en) 2015-04-29 2017-02-22 株式会社Lg化学 Resin composition for bonding semiconductor, adhesive film for semiconductor, and dicing die bonding film
JP6536177B2 (en) * 2015-05-27 2019-07-03 日立化成株式会社 Semiconductor device
JP6768188B2 (en) * 2016-01-06 2020-10-14 日立化成株式会社 Adhesive composition for adhesive film and its manufacturing method
CN110546232B (en) * 2017-04-28 2022-05-31 昭和电工材料株式会社 Sealing film, sealing structure, and method for producing sealing structure
CN109266270B (en) * 2017-07-17 2021-08-03 中国石油天然气股份有限公司 Adhesive, preparation method and application
JP2019127501A (en) * 2018-01-22 2019-08-01 藤森工業株式会社 Thermosetting adhesive composition, adhesive film, coverlay film, and flexible printed wiring board
KR102491831B1 (en) * 2018-01-30 2023-01-27 쇼와덴코머티리얼즈가부시끼가이샤 Film adhesive and its manufacturing method, semiconductor device and its manufacturing method
CN111630641B (en) * 2018-01-30 2023-05-02 昭和电工材料株式会社 Method for manufacturing semiconductor device and film-like adhesive
JP6977588B2 (en) * 2018-01-30 2021-12-08 昭和電工マテリアルズ株式会社 Manufacturing method of semiconductor devices and adhesive film
WO2019220540A1 (en) * 2018-05-15 2019-11-21 日立化成株式会社 Semiconductor device, thermosetting resin composition used for production thereof, and dicing die bonding integrated tape
CN109654388A (en) * 2018-12-06 2019-04-19 安徽皇广实业有限公司 A kind of integrated high thermal conductivity substrate LED lamp
WO2020217404A1 (en) * 2019-04-25 2020-10-29 日立化成株式会社 Semiconductor device having dolmen structure and method for manufacturing same
WO2022149277A1 (en) 2021-01-08 2022-07-14 昭和電工マテリアルズ株式会社 Adhesive composition, film adhesive, dicing/die-bonding all-in-one film, semiconductor device, and production method for semiconductor device
JPWO2022149582A1 (en) 2021-01-08 2022-07-14

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5366933A (en) * 1993-10-13 1994-11-22 Intel Corporation Method for constructing a dual sided, wire bonded integrated circuit chip package
US6245841B1 (en) * 1998-03-23 2001-06-12 General Electric Company Cyanate ester based thermoset compositions
KR100928104B1 (en) * 2000-02-15 2009-11-24 히다치 가세고교 가부시끼가이샤 adhesive film
KR100894208B1 (en) * 2000-03-31 2009-04-22 히다치 가세고교 가부시끼가이샤 Adhesive Composition, Method for Preparing the Same, Adhesive Film Using the Same, Substrate for Carrying Semiconductor and Semiconductor Device
JP4505769B2 (en) 2000-03-31 2010-07-21 日立化成工業株式会社 Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof
KR100454375B1 (en) * 2000-07-26 2004-10-26 마츠시다 덴코 가부시키가이샤 Epoxy Resin Composition, Prepreg and Metal-Clad Laminate
JP2002072009A (en) 2000-08-25 2002-03-12 Shinko Electric Ind Co Ltd Optical branching filter/coupler
JP3913481B2 (en) 2001-01-24 2007-05-09 シャープ株式会社 Semiconductor device and manufacturing method of semiconductor device
JP5236134B2 (en) 2001-01-26 2013-07-17 日立化成株式会社 Adhesive composition, adhesive member, semiconductor mounting support member, semiconductor device, etc.
JP3912223B2 (en) 2002-08-09 2007-05-09 富士通株式会社 Semiconductor device and manufacturing method thereof
JP2005327789A (en) * 2004-05-12 2005-11-24 Sharp Corp Pressure-sensitive adhesive sheet for both dicing and die-bonding, and method of manufacturing semiconductor device using the same
JP4954569B2 (en) * 2006-02-16 2012-06-20 日東電工株式会社 Manufacturing method of semiconductor device
JP2007270125A (en) * 2006-03-08 2007-10-18 Hitachi Chem Co Ltd Adhesive sheet, integrated sheet, semiconductor device, and method for producing the semiconductor device
JP5157229B2 (en) * 2006-04-11 2013-03-06 日立化成株式会社 Adhesive sheet
JP2007311395A (en) * 2006-05-16 2007-11-29 Toppan Printing Co Ltd Semiconductor device and its manufacturing process
JP2008074928A (en) * 2006-09-20 2008-04-03 Hitachi Chem Co Ltd Adhesive film for semiconductor and semiconductor device by using the same
KR101101526B1 (en) * 2007-03-16 2012-01-04 히다치 가세고교 가부시끼가이샤 Adhesive composition for optical waveguide, adhesive film for optical waveguide and adhesive sheet for optical waveguide each using the same, and optical device using any of them
JP5476673B2 (en) * 2007-04-02 2014-04-23 日立化成株式会社 Adhesive sheet
KR100959746B1 (en) * 2007-10-23 2010-05-25 제일모직주식회사 Adhesive film composition using phenoxy resin and ester-based thermoplastic resin for semiconductor assembly and bonding film therefrom
JP5524465B2 (en) * 2007-10-24 2014-06-18 日立化成株式会社 Adhesive sheet, semiconductor device using the same, and manufacturing method thereof
US7723852B1 (en) * 2008-01-21 2010-05-25 Amkor Technology, Inc. Stacked semiconductor package and method of making same
KR101284978B1 (en) * 2008-04-21 2013-07-10 주식회사 엘지화학 Adhesive compositons, adhesive films, dicing die bonding films, semiconductor wafers and semiconductor devices comprising the same
JP5428423B2 (en) * 2008-04-21 2014-02-26 日立化成株式会社 Semiconductor device and film adhesive
JP5805925B2 (en) * 2008-10-02 2015-11-10 日立化成株式会社 Die bonding film and semiconductor device using the same
JP5549182B2 (en) * 2008-10-28 2014-07-16 日立化成株式会社 Adhesive sheet and method of manufacturing semiconductor device using the same
JP2010118554A (en) * 2008-11-13 2010-05-27 Nec Electronics Corp Semiconductor device and method of manufacturing the same
JP2011018806A (en) * 2009-07-09 2011-01-27 Sumitomo Bakelite Co Ltd Film for semiconductor, and method of manufacturing semiconductor device

Also Published As

Publication number Publication date
JP2016021585A (en) 2016-02-04
CN106024654B (en) 2019-07-02
KR20170105640A (en) 2017-09-19
KR101953052B1 (en) 2019-02-27
JP2017204656A (en) 2017-11-16
KR20160139043A (en) 2016-12-06
JP6414296B2 (en) 2018-10-31
TWI485225B (en) 2015-05-21
KR20200006197A (en) 2020-01-17
KR20190020191A (en) 2019-02-27
KR20140126736A (en) 2014-10-31
US20150050780A1 (en) 2015-02-19
WO2013133275A1 (en) 2013-09-12
CN106024654A (en) 2016-10-12
CN104169383A (en) 2014-11-26
JPWO2013133275A1 (en) 2015-07-30
CN104169383B (en) 2016-11-09
US9212298B2 (en) 2015-12-15
KR102067945B1 (en) 2020-01-17

Similar Documents

Publication Publication Date Title
TWI485225B (en) Substrate and method of manufacturing semiconductor device
JP6133542B2 (en) Film adhesive, adhesive sheet and semiconductor device
JP5736899B2 (en) Film adhesive, adhesive sheet and semiconductor device
JP5428423B2 (en) Semiconductor device and film adhesive
JP2013127014A (en) Adhesive sheet
TWI759375B (en) Tape for semiconductor processing
TWI431093B (en) Then the sheet
JP2009124115A (en) Adhesive sheet
JP6094031B2 (en) Adhesive composition, adhesive sheet, and semiconductor device
JP5754072B2 (en) Adhesive composition, adhesive member sheet for connecting circuit members, and method for manufacturing semiconductor device
JP2012153851A (en) Semiconductor device and film-shaped adhesive
JP2010132890A (en) Adhesive sheet and method for manufacturing semiconductor device using the same
WO2019150446A1 (en) Adhesive composition, filmy adhesive, adhesive sheet, and production method for semiconductor device
JP7322897B2 (en) Adhesive film, dicing/die bonding integrated film, and method for manufacturing semiconductor package
JP5805925B2 (en) Die bonding film and semiconductor device using the same
CN113874456A (en) Die-cut die-bonding film, semiconductor package using the die-cut die-bonding film, and method for manufacturing the semiconductor package
JP6213618B2 (en) Film adhesive, adhesive sheet and semiconductor device
WO2019171544A1 (en) Method for producing semiconductor device and film-like adhesive
TW202401588A (en) Adhesive film for semiconductors, dicing die bonding film, and method for manufacturing semiconductor device
TW202342672A (en) Adhesive film for semiconductors, integrated dicing/die bonding film and method for producing semiconductor device
JPWO2020136903A1 (en) Manufacturing method of semiconductor devices, film-like adhesives and dicing / die bonding integrated film