TW200941579A - Method for forming silicon oxide film, storage medium, and plasma processing apparatus - Google Patents

Method for forming silicon oxide film, storage medium, and plasma processing apparatus Download PDF

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Publication number
TW200941579A
TW200941579A TW098103133A TW98103133A TW200941579A TW 200941579 A TW200941579 A TW 200941579A TW 098103133 A TW098103133 A TW 098103133A TW 98103133 A TW98103133 A TW 98103133A TW 200941579 A TW200941579 A TW 200941579A
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TW
Taiwan
Prior art keywords
oxide film
film thickness
plasma
less
ruthenium oxide
Prior art date
Application number
TW098103133A
Other languages
English (en)
Chinese (zh)
Inventor
Hideo Nakamura
Yoshiro Kabe
Junichi Kitagawa
Original Assignee
Tokyo Electron Ltd
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Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200941579A publication Critical patent/TW200941579A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H01J37/32211—Means for coupling power to the plasma
    • H01J37/3222—Antennas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01346—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a gaseous ambient using an oxygen or a water vapour, e.g. oxidation through a layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H10W10/0147—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape the shapes being altered by a local oxidation of silicon process, e.g. trench corner rounding by LOCOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0147—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6319—Formation by plasma treatments, e.g. plasma oxidation of the substrate

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
TW098103133A 2008-01-24 2009-01-23 Method for forming silicon oxide film, storage medium, and plasma processing apparatus TW200941579A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008013564 2008-01-24

Publications (1)

Publication Number Publication Date
TW200941579A true TW200941579A (en) 2009-10-01

Family

ID=40901251

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098103133A TW200941579A (en) 2008-01-24 2009-01-23 Method for forming silicon oxide film, storage medium, and plasma processing apparatus

Country Status (5)

Country Link
US (1) US20110017586A1 (https=)
JP (1) JP2009200483A (https=)
KR (1) KR101249611B1 (https=)
TW (1) TW200941579A (https=)
WO (1) WO2009093760A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI456690B (zh) * 2011-07-14 2014-10-11 南亞科技股份有限公司 半導體裝置內開口之形成方法
TWI476832B (zh) * 2011-09-28 2015-03-11 東京威力科創股份有限公司 蝕刻方法及裝置

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4845917B2 (ja) 2008-03-28 2011-12-28 株式会社東芝 半導体装置の製造方法
JP2011077321A (ja) * 2009-09-30 2011-04-14 Tokyo Electron Ltd 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
JP2011097029A (ja) * 2009-09-30 2011-05-12 Tokyo Electron Ltd 半導体装置の製造方法
JP2012216667A (ja) * 2011-03-31 2012-11-08 Tokyo Electron Ltd プラズマ処理方法
KR101854609B1 (ko) 2011-12-27 2018-05-08 삼성전자주식회사 게이트 절연층의 형성 방법
US20130320453A1 (en) * 2012-06-01 2013-12-05 Abhijit Jayant Pethe Area scaling on trigate transistors
JP2014209515A (ja) * 2013-04-16 2014-11-06 東京エレクトロン株式会社 エッチング方法
JP6125467B2 (ja) * 2014-06-16 2017-05-10 富士フイルム株式会社 プリント注文受付機とその作動方法および作動プログラム
JP6748779B2 (ja) * 2017-03-27 2020-09-02 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、プログラム及び基板処理装置
US20240177990A1 (en) * 2022-11-29 2024-05-30 Applied Materials, Inc. Oxidation conformality improvement with in-situ integrated processing
CN116844939B (zh) * 2023-07-06 2024-08-13 北京屹唐半导体科技股份有限公司 用于半导体工件的低压氧化处理方法和装置

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JPH0519296A (ja) * 1991-07-12 1993-01-29 Matsushita Electric Ind Co Ltd 絶縁膜の形成方法及び絶縁膜形成装置
JPH11219950A (ja) * 1998-02-03 1999-08-10 Hitachi Ltd 半導体集積回路の製造方法並びにその製造装置
JP3505493B2 (ja) * 1999-09-16 2004-03-08 松下電器産業株式会社 半導体装置の製造方法
JP2002033381A (ja) * 2000-07-19 2002-01-31 Mitsubishi Electric Corp 素子分離絶縁膜の形成方法及び、半導体装置の製造方法
KR20070116696A (ko) * 2001-01-22 2007-12-10 동경 엘렉트론 주식회사 전자 디바이스 재료의 제조 방법 및 플라즈마 처리 방법
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JP4694108B2 (ja) * 2003-05-23 2011-06-08 東京エレクトロン株式会社 酸化膜形成方法、酸化膜形成装置および電子デバイス材料
JP2005286339A (ja) * 2004-03-29 2005-10-13 Sharp Corp シリコンカーバイド基板上に二酸化シリコンを生成する高密度プラズマプロセス
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US20060105114A1 (en) * 2004-11-16 2006-05-18 White John M Multi-layer high quality gate dielectric for low-temperature poly-silicon TFTs
JP2006286662A (ja) * 2005-03-31 2006-10-19 Toshiba Corp シリコン系被処理物の酸化処理方法、酸化処理装置および半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI456690B (zh) * 2011-07-14 2014-10-11 南亞科技股份有限公司 半導體裝置內開口之形成方法
TWI476832B (zh) * 2011-09-28 2015-03-11 東京威力科創股份有限公司 蝕刻方法及裝置
US9263283B2 (en) 2011-09-28 2016-02-16 Tokyo Electron Limited Etching method and apparatus

Also Published As

Publication number Publication date
US20110017586A1 (en) 2011-01-27
KR20100119547A (ko) 2010-11-09
KR101249611B1 (ko) 2013-04-01
WO2009093760A1 (ja) 2009-07-30
JP2009200483A (ja) 2009-09-03

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