TW200723548A - A hybrid BULK-SOI 6T-SRAM cell for improved CELL stability and performance - Google Patents
A hybrid BULK-SOI 6T-SRAM cell for improved CELL stability and performanceInfo
- Publication number
- TW200723548A TW200723548A TW095112004A TW95112004A TW200723548A TW 200723548 A TW200723548 A TW 200723548A TW 095112004 A TW095112004 A TW 095112004A TW 95112004 A TW95112004 A TW 95112004A TW 200723548 A TW200723548 A TW 200723548A
- Authority
- TW
- Taiwan
- Prior art keywords
- region
- bulk
- soi
- performance
- sram
- Prior art date
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/108,012 US7274072B2 (en) | 2005-04-15 | 2005-04-15 | Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200723548A true TW200723548A (en) | 2007-06-16 |
Family
ID=37107697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095112004A TW200723548A (en) | 2005-04-15 | 2006-04-04 | A hybrid BULK-SOI 6T-SRAM cell for improved CELL stability and performance |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7274072B2 (enExample) |
| EP (1) | EP1875516A4 (enExample) |
| JP (1) | JP2008536334A (enExample) |
| CN (1) | CN101160667B (enExample) |
| TW (1) | TW200723548A (enExample) |
| WO (1) | WO2006113061A2 (enExample) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100539243B1 (ko) * | 2003-10-04 | 2005-12-27 | 삼성전자주식회사 | 부분 에스오아이 기판에 구현된 에스램 소자 |
| US7087965B2 (en) * | 2004-04-22 | 2006-08-08 | International Business Machines Corporation | Strained silicon CMOS on hybrid crystal orientations |
| JP2007158295A (ja) * | 2005-11-10 | 2007-06-21 | Seiko Epson Corp | 半導体装置および半導体装置の製造方法 |
| JP2007234793A (ja) * | 2006-02-28 | 2007-09-13 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| JP2007251005A (ja) * | 2006-03-17 | 2007-09-27 | Toshiba Corp | 半導体装置及びその製造方法 |
| DE102006015076B4 (de) * | 2006-03-31 | 2014-03-20 | Advanced Micro Devices, Inc. | Halbleiterbauelement mit SOI-Transistoren und Vollsubstrattransistoren und ein Verfahren zur Herstellung |
| US20090026524A1 (en) * | 2007-07-27 | 2009-01-29 | Franz Kreupl | Stacked Circuits |
| US7948008B2 (en) | 2007-10-26 | 2011-05-24 | Micron Technology, Inc. | Floating body field-effect transistors, and methods of forming floating body field-effect transistors |
| US7718496B2 (en) * | 2007-10-30 | 2010-05-18 | International Business Machines Corporation | Techniques for enabling multiple Vt devices using high-K metal gate stacks |
| US7985633B2 (en) * | 2007-10-30 | 2011-07-26 | International Business Machines Corporation | Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors |
| US20090200635A1 (en) * | 2008-02-12 | 2009-08-13 | Viktor Koldiaev | Integrated Circuit Having Electrical Isolation Regions, Mask Technology and Method of Manufacturing Same |
| US20100200918A1 (en) * | 2009-02-10 | 2010-08-12 | Honeywell International Inc. | Heavy Ion Upset Hardened Floating Body SRAM Cells |
| US8294485B2 (en) | 2009-02-12 | 2012-10-23 | International Business Machines Corporation | Detecting asymmetrical transistor leakage defects |
| US8324665B2 (en) * | 2009-04-21 | 2012-12-04 | Texas Instruments Incorporated | SRAM cell with different crystal orientation than associated logic |
| US8080456B2 (en) * | 2009-05-20 | 2011-12-20 | International Business Machines Corporation | Robust top-down silicon nanowire structure using a conformal nitride |
| US8018007B2 (en) | 2009-07-20 | 2011-09-13 | International Business Machines Corporation | Selective floating body SRAM cell |
| US8643107B2 (en) * | 2010-01-07 | 2014-02-04 | International Business Machines Corporation | Body-tied asymmetric N-type field effect transistor |
| US8426917B2 (en) * | 2010-01-07 | 2013-04-23 | International Business Machines Corporation | Body-tied asymmetric P-type field effect transistor |
| US8299519B2 (en) * | 2010-01-11 | 2012-10-30 | International Business Machines Corporation | Read transistor for single poly non-volatile memory using body contacted SOI device |
| US8212294B2 (en) * | 2010-01-28 | 2012-07-03 | Raytheon Company | Structure having silicon CMOS transistors with column III-V transistors on a common substrate |
| US8372725B2 (en) * | 2010-02-23 | 2013-02-12 | International Business Machines Corporation | Structures and methods of forming pre fabricated deep trench capacitors for SOI substrates |
| CN103295951A (zh) * | 2012-02-27 | 2013-09-11 | 中国科学院上海微系统与信息技术研究所 | 基于混合晶向soi的器件系统结构及制备方法 |
| US8822295B2 (en) | 2012-04-03 | 2014-09-02 | International Business Machines Corporation | Low extension dose implants in SRAM fabrication |
| CN103579191B (zh) * | 2012-07-20 | 2016-06-15 | 无锡华润上华半导体有限公司 | 用于测试六管sram的漏电流的半导体测试结构 |
| US9041105B2 (en) | 2012-07-20 | 2015-05-26 | International Business Machines Corporation | Integrated circuit including transistor structure on depleted silicon-on-insulator, related method and design structure |
| US8963208B2 (en) * | 2012-11-15 | 2015-02-24 | GlobalFoundries, Inc. | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof |
| JP6178118B2 (ja) * | 2013-05-31 | 2017-08-09 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US10109638B1 (en) * | 2017-10-23 | 2018-10-23 | Globalfoundries Singapore Pte. Ltd. | Embedded non-volatile memory (NVM) on fully depleted silicon-on-insulator (FD-SOI) substrate |
| US11749671B2 (en) * | 2020-10-09 | 2023-09-05 | Globalfoundries U.S. Inc. | Integrated circuit structures with well boundary distal to substrate midpoint and methods to form the same |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03129777A (ja) * | 1989-07-13 | 1991-06-03 | Mitsubishi Electric Corp | 電界効果型トランジスタを備えた半導体装置およびその製造方法 |
| JP3836166B2 (ja) * | 1993-11-22 | 2006-10-18 | 株式会社半導体エネルギー研究所 | 2層構造のトランジスタおよびその作製方法 |
| WO2000048245A1 (en) * | 1999-02-12 | 2000-08-17 | Ibis Technology Corporation | Patterned silicon-on-insulator devices |
| US6624459B1 (en) * | 2000-04-12 | 2003-09-23 | International Business Machines Corp. | Silicon on insulator field effect transistors having shared body contact |
| JP2004079705A (ja) * | 2002-08-14 | 2004-03-11 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
| JP4850387B2 (ja) * | 2002-12-09 | 2012-01-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4290457B2 (ja) * | 2003-03-31 | 2009-07-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US7329923B2 (en) * | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
| KR100539243B1 (ko) * | 2003-10-04 | 2005-12-27 | 삼성전자주식회사 | 부분 에스오아이 기판에 구현된 에스램 소자 |
-
2005
- 2005-04-15 US US11/108,012 patent/US7274072B2/en not_active Expired - Lifetime
-
2006
- 2006-03-27 JP JP2008506486A patent/JP2008536334A/ja active Pending
- 2006-03-27 EP EP06739771A patent/EP1875516A4/en not_active Withdrawn
- 2006-03-27 WO PCT/US2006/011167 patent/WO2006113061A2/en not_active Ceased
- 2006-03-27 CN CN2006800119743A patent/CN101160667B/zh active Active
- 2006-04-04 TW TW095112004A patent/TW200723548A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US20060231899A1 (en) | 2006-10-19 |
| EP1875516A4 (en) | 2008-08-13 |
| CN101160667B (zh) | 2010-06-16 |
| JP2008536334A (ja) | 2008-09-04 |
| CN101160667A (zh) | 2008-04-09 |
| US7274072B2 (en) | 2007-09-25 |
| WO2006113061A3 (en) | 2007-05-24 |
| WO2006113061A2 (en) | 2006-10-26 |
| EP1875516A2 (en) | 2008-01-09 |
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