WO2011151681A3 - 半導体装置およびこれを用いた半導体リレー - Google Patents

半導体装置およびこれを用いた半導体リレー Download PDF

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WO2011151681A3
WO2011151681A3 PCT/IB2011/000350 IB2011000350W WO2011151681A3 WO 2011151681 A3 WO2011151681 A3 WO 2011151681A3 IB 2011000350 W IB2011000350 W IB 2011000350W WO 2011151681 A3 WO2011151681 A3 WO 2011151681A3
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semiconductor device
conductivity type
same
electrode
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PCT/IB2011/000350
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French (fr)
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WO2011151681A2 (ja
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岡田 洋
砂田 卓也
猛司 大森
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パナソニック株式会社
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Priority to DE112011101874.6T priority Critical patent/DE112011101874T9/de
Priority to US13/642,153 priority patent/US8933394B2/en
Priority to CN201180022055.7A priority patent/CN102884626B/zh
Publication of WO2011151681A2 publication Critical patent/WO2011151681A2/ja
Publication of WO2011151681A3 publication Critical patent/WO2011151681A3/ja

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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Abstract

第1導電型のSiC(シリコンカーバイド)基板1内に、少なくとも一つのトランジスタセルを備える。それぞれのトランジスタセルは、上記SiC基板1の第1面に形成された第2導電型のウェル領域3と、上記ウェル領域3内に形成された第1導電型の領域からなるソース領域4と、ゲート絶縁膜6を介して形成されたゲート電極7と、前記ソース領域4にコンタクトするように形成されたソース電極5と、上記SiC基板1の第2の面側に形成されたドレイン電極9とを具備しており、上記トランジスタセルのうちの最外セルの外側に、隣接して上記ウェル領域3を囲み、上記ゲート電極7および上記ソース電極5のいずれに対しても絶縁された第2導電型領域3pを具備している。 この構成により、高電圧印加時のリーク電流を低減することができる。
PCT/IB2011/000350 2010-06-03 2011-02-23 半導体装置およびこれを用いた半導体リレー WO2011151681A2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE112011101874.6T DE112011101874T9 (de) 2010-06-03 2011-02-23 Halbleiteranordnung und Festkörperrelais, das diese verwendet
US13/642,153 US8933394B2 (en) 2010-06-03 2011-02-23 Semiconductor device having at least a transistor cell with a second conductive type region surrounding a wall region and being insulated from both gate electrode and source electrode and solid state relay using same
CN201180022055.7A CN102884626B (zh) 2010-06-03 2011-02-23 半导体装置和使用该半导体装置的半导体继电器

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Application Number Priority Date Filing Date Title
JP2010128094A JP5861081B2 (ja) 2010-06-03 2010-06-03 半導体装置およびこれを用いた半導体リレー
JP2010-128094 2010-06-03

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WO2011151681A2 WO2011151681A2 (ja) 2011-12-08
WO2011151681A3 true WO2011151681A3 (ja) 2012-04-19

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US (1) US8933394B2 (ja)
JP (1) JP5861081B2 (ja)
CN (1) CN102884626B (ja)
DE (1) DE112011101874T9 (ja)
WO (1) WO2011151681A2 (ja)

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JP6083464B2 (ja) * 2013-03-14 2017-02-22 富士電機株式会社 半導体装置
DE102014005879B4 (de) * 2014-04-16 2021-12-16 Infineon Technologies Ag Vertikale Halbleitervorrichtung
US11355627B2 (en) 2017-12-19 2022-06-07 Mitsubishi Electric Corporation Silicon carbide semiconductor device and power converter
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CN113257916B (zh) * 2021-03-29 2023-04-14 重庆中科渝芯电子有限公司 一种集成整流器的平面场效应晶体管及其制造方法

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JP5861081B2 (ja) 2016-02-16
US20130033300A1 (en) 2013-02-07
JP2011254012A (ja) 2011-12-15
DE112011101874T5 (de) 2013-03-21
US8933394B2 (en) 2015-01-13

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