TW200715440A - Method for manufacturing semiconductor integrated circuit device - Google Patents

Method for manufacturing semiconductor integrated circuit device

Info

Publication number
TW200715440A
TW200715440A TW095121210A TW95121210A TW200715440A TW 200715440 A TW200715440 A TW 200715440A TW 095121210 A TW095121210 A TW 095121210A TW 95121210 A TW95121210 A TW 95121210A TW 200715440 A TW200715440 A TW 200715440A
Authority
TW
Taiwan
Prior art keywords
probe
press tool
major surface
sheet
integrated circuit
Prior art date
Application number
TW095121210A
Other languages
English (en)
Inventor
Akio Hasebe
Masayoshi Okamoto
Yasunori Narizuka
Shingo Yorisaki
Yasuhiro Motoyama
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200715440A publication Critical patent/TW200715440A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/0735Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card arranged on a flexible frame or film
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889Interfaces, e.g. between probe and tester

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
TW095121210A 2005-06-21 2006-06-14 Method for manufacturing semiconductor integrated circuit device TW200715440A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005181085A JP4825457B2 (ja) 2005-06-21 2005-06-21 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
TW200715440A true TW200715440A (en) 2007-04-16

Family

ID=37573902

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095121210A TW200715440A (en) 2005-06-21 2006-06-14 Method for manufacturing semiconductor integrated circuit device

Country Status (5)

Country Link
US (1) US7407823B2 (zh)
JP (1) JP4825457B2 (zh)
KR (1) KR20060133910A (zh)
CN (1) CN100589235C (zh)
TW (1) TW200715440A (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4825457B2 (ja) * 2005-06-21 2011-11-30 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP4800007B2 (ja) 2005-11-11 2011-10-26 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法およびプローブカード
JP5343278B2 (ja) * 2007-05-15 2013-11-13 日本電子材料株式会社 半導体試験装置
US8525168B2 (en) * 2011-07-11 2013-09-03 International Business Machines Corporation Integrated circuit (IC) test probe
US20130214388A1 (en) * 2012-02-20 2013-08-22 Texas Instruments Incorporated Semiconductor Wafer Adapted to Support Transparency in Partial Wafer Processing
EP2813858B1 (en) * 2013-06-14 2016-06-08 Rasco GmbH Method of contacting integrated circuit components in a test system
JP6306389B2 (ja) 2013-09-17 2018-04-04 東京エレクトロン株式会社 基板検査装置
KR102398163B1 (ko) * 2014-12-24 2022-05-17 삼성전자주식회사 도전성 필름이 코팅된 포고 핀을 구비한 반도체 검사장치
WO2021072603A1 (zh) * 2019-10-14 2021-04-22 重庆康佳光电技术研究院有限公司 一种led检测装置和方法
TWI719895B (zh) * 2020-05-11 2021-02-21 中華精測科技股份有限公司 陣列式薄膜探針卡及其測試模組

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3198135B2 (ja) * 1991-12-28 2001-08-13 ホーヤ株式会社 回路検査素子における探針付き絶縁性有機樹脂膜の製造方法、絶縁性有機樹脂膜および探針付き回路検査素子
JP3658029B2 (ja) * 1994-02-21 2005-06-08 株式会社ルネサステクノロジ 接続装置およびその製造方法
JP3502874B2 (ja) * 1994-06-03 2004-03-02 株式会社ルネサステクノロジ 接続装置およびその製造方法
JP3394620B2 (ja) * 1995-01-20 2003-04-07 株式会社日立製作所 探針組立体および検査装置
JP3315339B2 (ja) * 1997-05-09 2002-08-19 株式会社日立製作所 半導体素子の製造方法並びに半導体素子へのプロービング方法およびその装置
JPH1123615A (ja) * 1997-05-09 1999-01-29 Hitachi Ltd 接続装置および検査システム
JP3458715B2 (ja) * 1997-07-15 2003-10-20 株式会社日立製作所 半導体デバイスおよびその実装構造体並びにその製造方法
JPH1197494A (ja) * 1997-09-18 1999-04-09 Hitachi Ltd 半導体装置およびその製造方法
JP2000150594A (ja) * 1998-11-05 2000-05-30 Hitachi Ltd 接続装置および押さえ部材付配線フィルムの製造方法並びに検査システムおよび半導体素子の製造方法
US6882045B2 (en) * 1999-10-28 2005-04-19 Thomas J. Massingill Multi-chip module and method for forming and method for deplating defective capacitors
JP3715160B2 (ja) * 1999-12-02 2005-11-09 株式会社ルネサステクノロジ プロービング装置及び半導体素子の製造方法
JP4825457B2 (ja) * 2005-06-21 2011-11-30 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP2007048958A (ja) * 2005-08-10 2007-02-22 Renesas Technology Corp 半導体装置の製造方法および半導体装置

Also Published As

Publication number Publication date
JP2007005405A (ja) 2007-01-11
KR20060133910A (ko) 2006-12-27
CN100589235C (zh) 2010-02-10
US7407823B2 (en) 2008-08-05
US20060286715A1 (en) 2006-12-21
CN1885518A (zh) 2006-12-27
JP4825457B2 (ja) 2011-11-30

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