TW200705537A - Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device - Google Patents

Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device

Info

Publication number
TW200705537A
TW200705537A TW095108154A TW95108154A TW200705537A TW 200705537 A TW200705537 A TW 200705537A TW 095108154 A TW095108154 A TW 095108154A TW 95108154 A TW95108154 A TW 95108154A TW 200705537 A TW200705537 A TW 200705537A
Authority
TW
Taiwan
Prior art keywords
semiconductor device
implementing
electrode
manufacturing
manufacturing semiconductor
Prior art date
Application number
TW095108154A
Other languages
English (en)
Other versions
TWI336097B (en
Inventor
Shuichi Tanaka
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of TW200705537A publication Critical patent/TW200705537A/zh
Application granted granted Critical
Publication of TWI336097B publication Critical patent/TWI336097B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23CMILLING
    • B23C3/00Milling particular work; Special milling operations; Machines therefor
    • B23C3/12Trimming or finishing edges, e.g. deburring welded corners
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23CMILLING
    • B23C9/00Details or accessories so far as specially adapted to milling machines or cutter
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23CMILLING
    • B23C2270/00Details of milling machines, milling processes or milling tools not otherwise provided for
    • B23C2270/02Use of a particular power source
    • B23C2270/022Electricity
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23CMILLING
    • B23C2270/00Details of milling machines, milling processes or milling tools not otherwise provided for
    • B23C2270/20Milling external areas of components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0237Disposition of the redistribution layers
    • H01L2224/02377Fan-in arrangement
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/0502Disposition
    • H01L2224/05023Disposition the whole internal layer protruding from the surface
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05541Structure
    • H01L2224/05548Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
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    • H01L2924/01006Carbon [C]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
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    • H01L2924/01024Chromium [Cr]
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    • H01L2924/01029Copper [Cu]
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    • H01L2924/01079Gold [Au]
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
TW095108154A 2005-03-23 2006-03-10 Method for manufacturing semiconductor device TWI336097B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005084584 2005-03-23
JP2005084583 2005-03-23
JP2005344647A JP4142041B2 (ja) 2005-03-23 2005-11-29 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW200705537A true TW200705537A (en) 2007-02-01
TWI336097B TWI336097B (en) 2011-01-11

Family

ID=37035768

Family Applications (2)

Application Number Title Priority Date Filing Date
TW095108154A TWI336097B (en) 2005-03-23 2006-03-10 Method for manufacturing semiconductor device
TW097132409A TWI450315B (zh) 2005-03-23 2006-03-10 半導體裝置之安裝方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW097132409A TWI450315B (zh) 2005-03-23 2006-03-10 半導體裝置之安裝方法

Country Status (4)

Country Link
US (3) US7524700B2 (zh)
JP (1) JP4142041B2 (zh)
KR (1) KR100730848B1 (zh)
TW (2) TWI336097B (zh)

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JP4572376B2 (ja) * 2007-07-30 2010-11-04 セイコーエプソン株式会社 半導体装置の製造方法および電子デバイスの製造方法
JP5077540B2 (ja) * 2007-08-10 2012-11-21 セイコーエプソン株式会社 半導体装置の製造方法
JP5088488B2 (ja) * 2008-03-03 2012-12-05 セイコーエプソン株式会社 半導体モジュール及びその製造方法
JP4936010B2 (ja) * 2008-03-03 2012-05-23 セイコーエプソン株式会社 半導体モジュール及びその製造方法
JP4737466B2 (ja) 2009-02-09 2011-08-03 セイコーエプソン株式会社 半導体装置及びその製造方法
CN102299122A (zh) * 2011-05-20 2011-12-28 电子科技大学 一种光电子器件的封装方法
CN102299120A (zh) * 2011-05-20 2011-12-28 电子科技大学 一种光电子器件的封装方法
CN102299119A (zh) * 2011-05-20 2011-12-28 电子科技大学 一种光电子器件的封装方法
CN102299118A (zh) * 2011-05-20 2011-12-28 电子科技大学 一种光电子器件的封装方法
CN102299121A (zh) * 2011-05-20 2011-12-28 电子科技大学 一种光电子器件的封装方法
US11316086B2 (en) * 2020-07-10 2022-04-26 X Display Company Technology Limited Printed structures with electrical contact having reflowable polymer core

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JP4061506B2 (ja) * 2005-06-21 2008-03-19 セイコーエプソン株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
TWI450315B (zh) 2014-08-21
TWI336097B (en) 2011-01-11
TW200903577A (en) 2009-01-16
US20060216919A1 (en) 2006-09-28
US8207056B2 (en) 2012-06-26
KR100730848B1 (ko) 2007-06-20
US7524700B2 (en) 2009-04-28
US7601626B2 (en) 2009-10-13
US20080206980A1 (en) 2008-08-28
JP4142041B2 (ja) 2008-08-27
KR20060103138A (ko) 2006-09-28
JP2006303420A (ja) 2006-11-02
US20090317969A1 (en) 2009-12-24

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