TW200705537A - Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device - Google Patents
Method for manufacturing semiconductor device, and method and structure for implementing semiconductor deviceInfo
- Publication number
- TW200705537A TW200705537A TW095108154A TW95108154A TW200705537A TW 200705537 A TW200705537 A TW 200705537A TW 095108154 A TW095108154 A TW 095108154A TW 95108154 A TW95108154 A TW 95108154A TW 200705537 A TW200705537 A TW 200705537A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- implementing
- electrode
- manufacturing
- manufacturing semiconductor
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C3/00—Milling particular work; Special milling operations; Machines therefor
- B23C3/12—Trimming or finishing edges, e.g. deburring welded corners
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C9/00—Details or accessories so far as specially adapted to milling machines or cutter
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C2270/00—Details of milling machines, milling processes or milling tools not otherwise provided for
- B23C2270/02—Use of a particular power source
- B23C2270/022—Electricity
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23C—MILLING
- B23C2270/00—Details of milling machines, milling processes or milling tools not otherwise provided for
- B23C2270/20—Milling external areas of components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02377—Fan-in arrangement
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05023—Disposition the whole internal layer protruding from the surface
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/01022—Titanium [Ti]
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- H—ELECTRICITY
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- H01L2924/01024—Chromium [Cr]
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005084584 | 2005-03-23 | ||
JP2005084583 | 2005-03-23 | ||
JP2005344647A JP4142041B2 (ja) | 2005-03-23 | 2005-11-29 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200705537A true TW200705537A (en) | 2007-02-01 |
TWI336097B TWI336097B (en) | 2011-01-11 |
Family
ID=37035768
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095108154A TWI336097B (en) | 2005-03-23 | 2006-03-10 | Method for manufacturing semiconductor device |
TW097132409A TWI450315B (zh) | 2005-03-23 | 2006-03-10 | 半導體裝置之安裝方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW097132409A TWI450315B (zh) | 2005-03-23 | 2006-03-10 | 半導體裝置之安裝方法 |
Country Status (4)
Country | Link |
---|---|
US (3) | US7524700B2 (zh) |
JP (1) | JP4142041B2 (zh) |
KR (1) | KR100730848B1 (zh) |
TW (2) | TWI336097B (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4572376B2 (ja) * | 2007-07-30 | 2010-11-04 | セイコーエプソン株式会社 | 半導体装置の製造方法および電子デバイスの製造方法 |
JP5077540B2 (ja) * | 2007-08-10 | 2012-11-21 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP5088488B2 (ja) * | 2008-03-03 | 2012-12-05 | セイコーエプソン株式会社 | 半導体モジュール及びその製造方法 |
JP4936010B2 (ja) * | 2008-03-03 | 2012-05-23 | セイコーエプソン株式会社 | 半導体モジュール及びその製造方法 |
JP4737466B2 (ja) | 2009-02-09 | 2011-08-03 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
CN102299122A (zh) * | 2011-05-20 | 2011-12-28 | 电子科技大学 | 一种光电子器件的封装方法 |
CN102299120A (zh) * | 2011-05-20 | 2011-12-28 | 电子科技大学 | 一种光电子器件的封装方法 |
CN102299119A (zh) * | 2011-05-20 | 2011-12-28 | 电子科技大学 | 一种光电子器件的封装方法 |
CN102299118A (zh) * | 2011-05-20 | 2011-12-28 | 电子科技大学 | 一种光电子器件的封装方法 |
CN102299121A (zh) * | 2011-05-20 | 2011-12-28 | 电子科技大学 | 一种光电子器件的封装方法 |
US11316086B2 (en) * | 2020-07-10 | 2022-04-26 | X Display Company Technology Limited | Printed structures with electrical contact having reflowable polymer core |
Family Cites Families (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4813129A (en) | 1987-06-19 | 1989-03-21 | Hewlett-Packard Company | Interconnect structure for PC boards and integrated circuits |
JPH0621257Y2 (ja) | 1987-07-16 | 1994-06-01 | 三洋電機株式会社 | 固体撮像装置 |
FR2676920B1 (fr) * | 1991-05-31 | 1998-11-20 | Vanraes Pierre | Batonnet avec a chaque extremite une demi sphere evidee pour nettoyer les conduits auditifs, soit un cure oreille, matiere plastique souple. |
JP2833326B2 (ja) * | 1992-03-03 | 1998-12-09 | 松下電器産業株式会社 | 電子部品実装接続体およびその製造方法 |
US5359768A (en) * | 1992-07-30 | 1994-11-01 | Intel Corporation | Method for mounting very small integrated circuit package on PCB |
JP3297144B2 (ja) * | 1993-05-11 | 2002-07-02 | シチズン時計株式会社 | 突起電極およびその製造方法 |
US5508228A (en) | 1994-02-14 | 1996-04-16 | Microelectronics And Computer Technology Corporation | Compliant electrically connective bumps for an adhesive flip chip integrated circuit device and methods for forming same |
JPH07263493A (ja) | 1994-03-18 | 1995-10-13 | World Metal:Kk | チップマウント方法 |
JPH1027824A (ja) | 1996-02-23 | 1998-01-27 | Matsushita Electric Ind Co Ltd | 突起電極を有する半導体装置及びその製造方法 |
US6515370B2 (en) * | 1997-03-10 | 2003-02-04 | Seiko Epson Corporation | Electronic component and semiconductor device, method for manufacturing the same, circuit board have the same mounted thereon, and electronic equipment having the circuit board |
JP3632882B2 (ja) | 1997-06-27 | 2005-03-23 | ソニー株式会社 | 半導体装置及びその製造方法 |
US6627154B1 (en) * | 1998-04-09 | 2003-09-30 | Cyrano Sciences Inc. | Electronic techniques for analyte detection |
US6277669B1 (en) * | 1999-09-15 | 2001-08-21 | Industrial Technology Research Institute | Wafer level packaging method and packages formed |
JP2001110831A (ja) | 1999-10-07 | 2001-04-20 | Seiko Epson Corp | 外部接続突起およびその形成方法、半導体チップ、回路基板ならびに電子機器 |
TW498468B (en) * | 1999-10-29 | 2002-08-11 | Hitachi Ltd | Semiconductor device |
US6770547B1 (en) * | 1999-10-29 | 2004-08-03 | Renesas Technology Corporation | Method for producing a semiconductor device |
US6710446B2 (en) * | 1999-12-30 | 2004-03-23 | Renesas Technology Corporation | Semiconductor device comprising stress relaxation layers and method for manufacturing the same |
JP2002162652A (ja) | 2000-01-31 | 2002-06-07 | Fujitsu Ltd | シート状表示装置、樹脂球状体、及びマイクロカプセル |
MY131961A (en) * | 2000-03-06 | 2007-09-28 | Hitachi Chemical Co Ltd | Resin composition, heat-resistant resin paste and semiconductor device using them and method for manufacture thereof |
DE10014300A1 (de) * | 2000-03-23 | 2001-10-04 | Infineon Technologies Ag | Halbleiterbauelement und Verfahren zu dessen Herstellung |
DE10016132A1 (de) | 2000-03-31 | 2001-10-18 | Infineon Technologies Ag | Elektronisches Bauelement mit flexiblen Kontaktierungsstellen und Verfahren zu dessen Herstellung |
JP4174174B2 (ja) * | 2000-09-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法並びに半導体装置実装構造体 |
JP3642414B2 (ja) * | 2001-02-08 | 2005-04-27 | シャープ株式会社 | 半導体装置およびその製造方法 |
JP2003124244A (ja) | 2001-10-11 | 2003-04-25 | Fujikura Ltd | 半導体装置の製造方法 |
TW517360B (en) * | 2001-12-19 | 2003-01-11 | Ind Tech Res Inst | Enhanced type wafer level package structure and its manufacture method |
JP3969295B2 (ja) | 2002-12-02 | 2007-09-05 | セイコーエプソン株式会社 | 半導体装置及びその製造方法と回路基板及び電気光学装置、並びに電子機器 |
JP3906921B2 (ja) * | 2003-06-13 | 2007-04-18 | セイコーエプソン株式会社 | バンプ構造体およびその製造方法 |
JP2005101527A (ja) | 2003-08-21 | 2005-04-14 | Seiko Epson Corp | 電子部品の実装構造、電気光学装置、電子機器及び電子部品の実装方法 |
JP4218622B2 (ja) | 2003-10-09 | 2009-02-04 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP4281656B2 (ja) * | 2004-09-22 | 2009-06-17 | セイコーエプソン株式会社 | 電子部品の実装構造、電子部品の実装方法、電気光学装置および電子機器 |
JP4061506B2 (ja) * | 2005-06-21 | 2008-03-19 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
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2005
- 2005-11-29 JP JP2005344647A patent/JP4142041B2/ja not_active Expired - Fee Related
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2006
- 2006-03-10 TW TW095108154A patent/TWI336097B/zh not_active IP Right Cessation
- 2006-03-10 TW TW097132409A patent/TWI450315B/zh not_active IP Right Cessation
- 2006-03-21 US US11/386,019 patent/US7524700B2/en not_active Expired - Fee Related
- 2006-03-22 KR KR1020060026054A patent/KR100730848B1/ko active IP Right Grant
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2008
- 2008-04-14 US US12/102,416 patent/US7601626B2/en not_active Expired - Fee Related
-
2009
- 2009-09-02 US US12/552,728 patent/US8207056B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
TWI450315B (zh) | 2014-08-21 |
TWI336097B (en) | 2011-01-11 |
TW200903577A (en) | 2009-01-16 |
US20060216919A1 (en) | 2006-09-28 |
US8207056B2 (en) | 2012-06-26 |
KR100730848B1 (ko) | 2007-06-20 |
US7524700B2 (en) | 2009-04-28 |
US7601626B2 (en) | 2009-10-13 |
US20080206980A1 (en) | 2008-08-28 |
JP4142041B2 (ja) | 2008-08-27 |
KR20060103138A (ko) | 2006-09-28 |
JP2006303420A (ja) | 2006-11-02 |
US20090317969A1 (en) | 2009-12-24 |
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