TW200640327A - Method of manufacturing circuit forming board - Google Patents

Method of manufacturing circuit forming board

Info

Publication number
TW200640327A
TW200640327A TW095108967A TW95108967A TW200640327A TW 200640327 A TW200640327 A TW 200640327A TW 095108967 A TW095108967 A TW 095108967A TW 95108967 A TW95108967 A TW 95108967A TW 200640327 A TW200640327 A TW 200640327A
Authority
TW
Taiwan
Prior art keywords
stage
circuit forming
board
conditioned
laminated
Prior art date
Application number
TW095108967A
Other languages
English (en)
Chinese (zh)
Other versions
TWI372010B (enExample
Inventor
Toshihiro Nishii
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of TW200640327A publication Critical patent/TW200640327A/zh
Application granted granted Critical
Publication of TWI372010B publication Critical patent/TWI372010B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0169—Using a temporary frame during processing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49149—Assembling terminal to base by metal fusion bonding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
TW095108967A 2005-03-17 2006-03-16 Method of manufacturing circuit forming board TW200640327A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005076815A JP4617941B2 (ja) 2005-03-17 2005-03-17 回路形成基板の製造方法

Publications (2)

Publication Number Publication Date
TW200640327A true TW200640327A (en) 2006-11-16
TWI372010B TWI372010B (enExample) 2012-09-01

Family

ID=36991747

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095108967A TW200640327A (en) 2005-03-17 2006-03-16 Method of manufacturing circuit forming board

Country Status (5)

Country Link
US (1) US7685707B2 (enExample)
JP (1) JP4617941B2 (enExample)
CN (1) CN101142863B (enExample)
TW (1) TW200640327A (enExample)
WO (1) WO2006098406A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5061673B2 (ja) * 2007-03-19 2012-10-31 パナソニック株式会社 回路基板と回路基板の製造方法
JP5041291B2 (ja) * 2007-11-05 2012-10-03 大日本印刷株式会社 非接触ｉｃカードの製造方法
US20120090883A1 (en) * 2010-10-13 2012-04-19 Qualcomm Incorporated Method and Apparatus for Improving Substrate Warpage
CN102595809A (zh) * 2012-03-14 2012-07-18 柏承科技(昆山)股份有限公司 高密度互联印刷电路板的制作方法
CN102625604B (zh) * 2012-03-20 2014-10-01 柏承科技(昆山)股份有限公司 高密度互联印制板的制造方法
CN103369872A (zh) * 2012-03-30 2013-10-23 北大方正集团有限公司 多层印刷电路板的压合方法
CN103338600A (zh) * 2013-05-10 2013-10-02 华为技术有限公司 Pcb结构及其制造方法，以及埋入器件pcb的制造方法
US10433413B2 (en) * 2014-08-15 2019-10-01 Unimicron Technology Corp. Manufacturing method of circuit structure embedded with heat-dissipation block
EP4040926A1 (en) 2021-02-09 2022-08-10 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carriers connected by staggered interconnect elements

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2003A (en) * 1841-03-12 Improvement in horizontal windivhlls
US4A (en) * 1836-08-10 Thomas Blanchard Stock shaving or rounding machine for edges ends etc of ships' tackle-blocks
US6A (en) * 1836-08-10 Thomas Blanchard Machine for forming end pieces of plank blocks for ships
US2001A (en) * 1841-03-12 Sawmill
US5A (en) * 1836-08-10 Thomas Blanchard Machine for mortising solid wooden shells of ships' tackle-blocks
US2000A (en) * 1841-03-12 Improvement in the manufacture of starch
US3795047A (en) * 1972-06-15 1974-03-05 Ibm Electrical interconnect structuring for laminate assemblies and fabricating methods therefor
US5502889A (en) * 1988-06-10 1996-04-02 Sheldahl, Inc. Method for electrically and mechanically connecting at least two conductive layers
US5175047A (en) * 1990-08-09 1992-12-29 Teledyne Industries, Inc. Rigid-flex printed circuit
JPH05251865A (ja) 1991-02-28 1993-09-28 Toppan Printing Co Ltd プリント配線板の製造方法
JP2858978B2 (ja) * 1991-03-15 1999-02-17 松下電工株式会社 多層配線板の製造方法
JP2601128B2 (ja) 1992-05-06 1997-04-16 松下電器産業株式会社 回路形成用基板の製造方法および回路形成用基板
US5527998A (en) * 1993-10-22 1996-06-18 Sheldahl, Inc. Flexible multilayer printed circuit boards and methods of manufacture
JP3153715B2 (ja) * 1994-10-18 2001-04-09 松下電器産業株式会社 プリント配線板の多面取りの製造用フィルムおよびそれを用いた製造方法
JP2937933B2 (ja) * 1997-03-24 1999-08-23 富山日本電気株式会社 多層プリント配線板の製造方法
JP2000133912A (ja) * 1998-10-27 2000-05-12 Matsushita Electric Works Ltd 樹脂付き金属箔及びその製造方法
JP2000151102A (ja) * 1998-11-16 2000-05-30 Matsushita Electric Ind Co Ltd 多層回路基板の製造方法
JP2000216518A (ja) * 1999-01-21 2000-08-04 Ibiden Co Ltd プリント配線板の製造方法
JP2000307246A (ja) * 1999-04-26 2000-11-02 Matsushita Electric Ind Co Ltd 回路形成基板の製造方法および回路形成基板材料
JP2001024326A (ja) * 1999-07-08 2001-01-26 Hitachi Chem Co Ltd 多層プリント配線板の製造方法
US6753483B2 (en) * 2000-06-14 2004-06-22 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method of manufacturing the same
JP2003249753A (ja) 2002-02-25 2003-09-05 Matsushita Electric Works Ltd 多層プリント配線板の製造方法

Also Published As

Publication number Publication date
CN101142863A (zh) 2008-03-12
CN101142863B (zh) 2012-08-29
US7685707B2 (en) 2010-03-30
WO2006098406A1 (ja) 2006-09-21
US20090183366A1 (en) 2009-07-23
JP2006261390A (ja) 2006-09-28
TWI372010B (enExample) 2012-09-01
JP4617941B2 (ja) 2011-01-26

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees