TW200621098A - Multi-patterned-layer substrate and manufacturing method thereof - Google Patents
Multi-patterned-layer substrate and manufacturing method thereofInfo
- Publication number
- TW200621098A TW200621098A TW094137947A TW94137947A TW200621098A TW 200621098 A TW200621098 A TW 200621098A TW 094137947 A TW094137947 A TW 094137947A TW 94137947 A TW94137947 A TW 94137947A TW 200621098 A TW200621098 A TW 200621098A
- Authority
- TW
- Taiwan
- Prior art keywords
- copper film
- bump
- oxidized portion
- patterned
- insulator
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004352057A JP4509757B2 (ja) | 2004-12-03 | 2004-12-03 | 多層配線基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200621098A true TW200621098A (en) | 2006-06-16 |
TWI342169B TWI342169B (zh) | 2011-05-11 |
Family
ID=36564867
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094137947A TW200621098A (en) | 2004-12-03 | 2005-10-28 | Multi-patterned-layer substrate and manufacturing method thereof |
Country Status (6)
Country | Link |
---|---|
US (1) | US7963030B2 (zh) |
JP (1) | JP4509757B2 (zh) |
KR (1) | KR20070085952A (zh) |
CN (1) | CN101084703B (zh) |
TW (1) | TW200621098A (zh) |
WO (1) | WO2006059427A1 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101048597B1 (ko) * | 2010-05-25 | 2011-07-12 | 주식회사 코리아써키트 | 범프가 형성된 인쇄회로기판의 제조방법 |
JP5824844B2 (ja) * | 2011-04-18 | 2015-12-02 | 大日本印刷株式会社 | 電子ペーパー用背面電極基材および電子ペーパー |
CN104703399A (zh) * | 2013-12-06 | 2015-06-10 | 富葵精密组件(深圳)有限公司 | 电路板及其制作方法 |
CN106735922B (zh) * | 2017-01-16 | 2018-10-09 | 深圳顺络电子股份有限公司 | 一种叠层电子元件及其制备方法 |
CN111819077B (zh) * | 2018-03-09 | 2023-07-07 | 株式会社有泽制作所 | 层叠体及其制造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07116640B2 (ja) * | 1991-04-12 | 1995-12-13 | 株式会社日立製作所 | 金属銅箔、及びその製造方法 |
JP3345961B2 (ja) * | 1992-06-05 | 2002-11-18 | 松下電器産業株式会社 | 銅または銅合金の低温拡散接合方法およびそれを用いた導電ペーストおよび多層配線基板の製造方法 |
JP3070027B2 (ja) * | 1993-04-21 | 2000-07-24 | 富士通株式会社 | 配線基板の製造方法 |
JPH0946041A (ja) * | 1995-07-26 | 1997-02-14 | Toshiba Corp | 印刷配線板の製造方法 |
EP1013650B1 (en) * | 1998-10-30 | 2007-01-24 | Hitachi Chemical DuPont MicroSystems Ltd. | Tetracarboxylic dianhydride, derivative and production thereof, polyimide precursor, polyimide, resin composition, photosensitive resin composition, method of forming relief pattern, and electronic part |
US6787462B2 (en) * | 2001-03-28 | 2004-09-07 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device having buried metal wiring |
JP2003309368A (ja) * | 2002-02-13 | 2003-10-31 | North:Kk | 多層配線回路基板と、その製造方法 |
JP3526838B2 (ja) | 2001-10-22 | 2004-05-17 | 株式会社ノース | 銅膜又は銅系膜に対する選択的エッチング方法と、選択的エッチング装置。 |
JP4294967B2 (ja) * | 2003-02-13 | 2009-07-15 | デンカAgsp株式会社 | 多層配線基板及びその製造方法 |
JP3954984B2 (ja) * | 2003-05-12 | 2007-08-08 | デプト株式会社 | 配線回路基板とその製造方法 |
-
2004
- 2004-12-03 JP JP2004352057A patent/JP4509757B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-29 US US11/720,810 patent/US7963030B2/en not_active Expired - Fee Related
- 2005-09-29 KR KR1020077013004A patent/KR20070085952A/ko not_active Application Discontinuation
- 2005-09-29 CN CN2005800415526A patent/CN101084703B/zh not_active Expired - Fee Related
- 2005-09-29 WO PCT/JP2005/017925 patent/WO2006059427A1/ja active Application Filing
- 2005-10-28 TW TW094137947A patent/TW200621098A/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2006059427A1 (ja) | 2006-06-08 |
CN101084703A (zh) | 2007-12-05 |
KR20070085952A (ko) | 2007-08-27 |
US7963030B2 (en) | 2011-06-21 |
CN101084703B (zh) | 2010-09-08 |
US20090288857A1 (en) | 2009-11-26 |
TWI342169B (zh) | 2011-05-11 |
JP2006165130A (ja) | 2006-06-22 |
JP4509757B2 (ja) | 2010-07-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |