TW200620289A - Voltage generation control circuit in semiconductor memory device and method thereof - Google Patents

Voltage generation control circuit in semiconductor memory device and method thereof

Info

Publication number
TW200620289A
TW200620289A TW094113050A TW94113050A TW200620289A TW 200620289 A TW200620289 A TW 200620289A TW 094113050 A TW094113050 A TW 094113050A TW 94113050 A TW94113050 A TW 94113050A TW 200620289 A TW200620289 A TW 200620289A
Authority
TW
Taiwan
Prior art keywords
period
control circuit
memory device
semiconductor memory
generation control
Prior art date
Application number
TW094113050A
Other languages
English (en)
Other versions
TWI296804B (en
Inventor
Sang-Hee Kang
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200620289A publication Critical patent/TW200620289A/zh
Application granted granted Critical
Publication of TWI296804B publication Critical patent/TWI296804B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
TW094113050A 2004-12-06 2005-04-25 Voltage generation control circuit in semiconductor memory device and method thereof TWI296804B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040101785A KR100616199B1 (ko) 2004-12-06 2004-12-06 반도체 메모리 장치의 전압 발생 제어회로 및 방법

Publications (2)

Publication Number Publication Date
TW200620289A true TW200620289A (en) 2006-06-16
TWI296804B TWI296804B (en) 2008-05-11

Family

ID=36574025

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094113050A TWI296804B (en) 2004-12-06 2005-04-25 Voltage generation control circuit in semiconductor memory device and method thereof

Country Status (3)

Country Link
US (1) US7123536B2 (zh)
KR (1) KR100616199B1 (zh)
TW (1) TWI296804B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100689817B1 (ko) * 2004-11-05 2007-03-08 삼성전자주식회사 전압 발생 회로 및 이 회로를 구비하는 반도체 메모리 장치
KR100886628B1 (ko) * 2006-05-10 2009-03-04 주식회사 하이닉스반도체 반도체 장치의 내부전압 생성회로
KR100718046B1 (ko) * 2006-06-08 2007-05-14 주식회사 하이닉스반도체 반도체 메모리 장치
JP2008159145A (ja) * 2006-12-22 2008-07-10 Elpida Memory Inc 半導体記憶装置
JP2008159128A (ja) * 2006-12-22 2008-07-10 Elpida Memory Inc 半導体記憶装置
KR100834394B1 (ko) * 2007-01-03 2008-06-04 주식회사 하이닉스반도체 반도체 메모리 소자의 리프레쉬신호 공급장치
KR100943115B1 (ko) * 2007-07-25 2010-02-18 주식회사 하이닉스반도체 전압 변환 회로 및 이를 구비한 플래시 메모리 소자
US7768817B2 (en) * 2008-03-20 2010-08-03 Intel Corporation VCC control inside data register of memory device
KR100924017B1 (ko) * 2008-06-30 2009-10-28 주식회사 하이닉스반도체 오토 프리차지 회로 및 오토 프리차지 방법
KR101008987B1 (ko) * 2008-12-02 2011-01-17 주식회사 하이닉스반도체 전원 제어 회로 및 이를 이용한 반도체 메모리 장치
KR101608218B1 (ko) * 2009-05-29 2016-04-01 삼성전자주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
CN103378833B (zh) * 2012-04-30 2016-02-10 台湾积体电路制造股份有限公司 开关电路
US8953405B2 (en) 2012-04-30 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Switching circuit
KR20140093855A (ko) 2013-01-18 2014-07-29 삼성전자주식회사 불휘발성 메모리 장치를 포함하는 메모리 시스템 및 그것의 제어 방법
KR20210102607A (ko) * 2020-02-12 2021-08-20 에스케이하이닉스 주식회사 반도체장치

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4198201B2 (ja) * 1995-06-02 2008-12-17 株式会社ルネサステクノロジ 半導体装置
JPH10228773A (ja) * 1997-02-14 1998-08-25 Hitachi Ltd ダイナミック型ｒａｍ
EP0884735B1 (en) * 1997-05-30 2004-03-17 Fujitsu Limited Semiconductor memory device capable of multiple word-line selection and method of testing same
KR100272163B1 (ko) * 1997-12-30 2000-11-15 윤종용 대기용어레이전압발생기를갖는반도체메모리장치
JP3895925B2 (ja) * 1998-11-05 2007-03-22 エルピーダメモリ株式会社 半導体記憶装置とテストシステム
EP1026595B1 (en) * 1999-01-11 2008-07-23 STMicroelectronics Limited Memory interface device and method for accessing memories
KR100324821B1 (ko) 1999-06-29 2002-02-28 박종섭 반도체 메모리 소자의 자동 리프레쉬 방법 및 장치
JP3836279B2 (ja) * 1999-11-08 2006-10-25 株式会社東芝 半導体記憶装置及びその制御方法
KR100347067B1 (ko) 1999-12-06 2002-08-03 삼성전자 주식회사 안정된 읽기 동작을 수행하는 반도체 메모리 장치
JP4707803B2 (ja) * 2000-07-10 2011-06-22 エルピーダメモリ株式会社 エラーレート判定方法と半導体集積回路装置
KR100396897B1 (ko) 2001-08-14 2003-09-02 삼성전자주식회사 페리(ｐｅｒｉ)용 전압 발생 회로와 이를 구비하는 반도체메모리 장치 및 전압 발생 방법
KR100640780B1 (ko) * 2003-12-29 2006-10-31 주식회사 하이닉스반도체 반도체 메모리 소자

Also Published As

Publication number Publication date
KR20060062816A (ko) 2006-06-12
TWI296804B (en) 2008-05-11
KR100616199B1 (ko) 2006-08-25
US7123536B2 (en) 2006-10-17
US20060120195A1 (en) 2006-06-08

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees