TW200617410A - Semiconductor wafer and inspection method thereof - Google Patents
Semiconductor wafer and inspection method thereofInfo
- Publication number
- TW200617410A TW200617410A TW094139264A TW94139264A TW200617410A TW 200617410 A TW200617410 A TW 200617410A TW 094139264 A TW094139264 A TW 094139264A TW 94139264 A TW94139264 A TW 94139264A TW 200617410 A TW200617410 A TW 200617410A
- Authority
- TW
- Taiwan
- Prior art keywords
- electrode terminal
- semiconductor wafer
- inspection method
- damage
- portion electrode
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2891—Features relating to contacting the IC under test, e.g. probe heads; chucks related to sensing or controlling of force, position, temperature
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004331293A JP4570446B2 (ja) | 2004-11-16 | 2004-11-16 | 半導体ウェハーおよびその検査方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200617410A true TW200617410A (en) | 2006-06-01 |
Family
ID=36385617
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094139264A TW200617410A (en) | 2004-11-16 | 2005-11-09 | Semiconductor wafer and inspection method thereof |
Country Status (4)
Country | Link |
---|---|
US (1) | US7170189B2 (zh) |
JP (1) | JP4570446B2 (zh) |
CN (1) | CN100461381C (zh) |
TW (1) | TW200617410A (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI400606B (zh) * | 2007-06-27 | 2013-07-01 | Semes Co Ltd | 用於探針檢測器操作比率之計算系統及其計算方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100593647B1 (ko) * | 2004-05-18 | 2006-06-28 | 삼성전자주식회사 | 프로브 센싱용 패드, 반도체 소자가 탑재된 기판 및 반도체 소자 검사 방법 |
KR100739629B1 (ko) * | 2005-12-02 | 2007-07-16 | 삼성전자주식회사 | 프로브 센싱용 패드 및 이를 이용한 프로브 니들 접촉 위치검사 방법. |
JP2007335550A (ja) * | 2006-06-14 | 2007-12-27 | Seiko Instruments Inc | 半導体装置 |
JP4995495B2 (ja) * | 2006-06-16 | 2012-08-08 | セイコーインスツル株式会社 | 半導体装置 |
TWI307406B (en) * | 2006-07-06 | 2009-03-11 | Au Optronics Corp | Misalignment detection devices |
JP4712641B2 (ja) * | 2006-08-09 | 2011-06-29 | 富士通セミコンダクター株式会社 | 半導体ウエハとその試験方法 |
EP2246708A1 (de) * | 2009-04-30 | 2010-11-03 | Micronas GmbH | Verfahren zur Erstellung einer Defektkarte von auf einem Träger, insbesondere einem Halbleiter-Wafer, befindliche Einzelkomponenten, insbesondere Halbleiter-Bauelementen |
IT1397222B1 (it) * | 2009-12-30 | 2013-01-04 | St Microelectronics Srl | Metodo per controllare il corretto posizionamento di sonde di test su terminazioni di dispositivi elettronici integrati su semiconduttore e relativo dispositivo elettronico. |
US8838408B2 (en) | 2010-11-11 | 2014-09-16 | Optimal Plus Ltd | Misalignment indication decision system and method |
CN104181448A (zh) * | 2014-08-13 | 2014-12-03 | 华进半导体封装先导技术研发中心有限公司 | 一种硅通孔转接板晶圆测试系统和硅通孔转接板晶圆测试方法 |
JP7101577B2 (ja) * | 2018-09-21 | 2022-07-15 | 株式会社日本マイクロニクス | 検査方法及び検査システム |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114349A (en) * | 1980-02-15 | 1981-09-08 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Detecting method for displacement in testing stage of wafer |
JPS63128636A (ja) * | 1986-11-18 | 1988-06-01 | Nec Corp | 半導体集積回路装置 |
CA2034702A1 (en) * | 1990-01-23 | 1991-07-24 | Masanori Nishiguchi | Method for packaging semiconductor device |
US5321277A (en) * | 1990-12-31 | 1994-06-14 | Texas Instruments Incorporated | Multi-chip module testing |
JPH05343487A (ja) | 1992-06-04 | 1993-12-24 | Nec Corp | 半導体集積回路装置 |
JPH0645419A (ja) * | 1992-07-21 | 1994-02-18 | Hitachi Ltd | 半導体装置 |
JPH09213759A (ja) * | 1996-01-30 | 1997-08-15 | Sony Corp | 半導体装置 |
JP3920399B2 (ja) * | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
US6133582A (en) * | 1998-05-14 | 2000-10-17 | Lightspeed Semiconductor Corporation | Methods and apparatuses for binning partially completed integrated circuits based upon test results |
US6329670B1 (en) * | 1999-04-06 | 2001-12-11 | Micron Technology, Inc. | Conductive material for integrated circuit fabrication |
US6133054A (en) * | 1999-08-02 | 2000-10-17 | Motorola, Inc. | Method and apparatus for testing an integrated circuit |
US6380555B1 (en) * | 1999-12-24 | 2002-04-30 | Micron Technology, Inc. | Bumped semiconductor component having test pads, and method and system for testing bumped semiconductor components |
JP2002217258A (ja) * | 2001-01-22 | 2002-08-02 | Hitachi Ltd | 半導体装置およびその測定方法、ならびに半導体装置の製造方法 |
US6605525B2 (en) * | 2001-05-01 | 2003-08-12 | Industrial Technologies Research Institute | Method for forming a wafer level package incorporating a multiplicity of elastomeric blocks and package formed |
TW503496B (en) * | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
US6781150B2 (en) * | 2002-08-28 | 2004-08-24 | Lsi Logic Corporation | Test structure for detecting bonding-induced cracks |
-
2004
- 2004-11-16 JP JP2004331293A patent/JP4570446B2/ja not_active Expired - Fee Related
-
2005
- 2005-10-07 US US11/245,091 patent/US7170189B2/en active Active
- 2005-11-09 TW TW094139264A patent/TW200617410A/zh unknown
- 2005-11-11 CN CNB2005101250113A patent/CN100461381C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI400606B (zh) * | 2007-06-27 | 2013-07-01 | Semes Co Ltd | 用於探針檢測器操作比率之計算系統及其計算方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4570446B2 (ja) | 2010-10-27 |
US20060103408A1 (en) | 2006-05-18 |
JP2006147601A (ja) | 2006-06-08 |
CN1776898A (zh) | 2006-05-24 |
US7170189B2 (en) | 2007-01-30 |
CN100461381C (zh) | 2009-02-11 |
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