TW200610066A - A strained silicon device manufacture method - Google Patents

A strained silicon device manufacture method

Info

Publication number
TW200610066A
TW200610066A TW094131080A TW94131080A TW200610066A TW 200610066 A TW200610066 A TW 200610066A TW 094131080 A TW094131080 A TW 094131080A TW 94131080 A TW94131080 A TW 94131080A TW 200610066 A TW200610066 A TW 200610066A
Authority
TW
Taiwan
Prior art keywords
gate structure
substrate
poly gate
oxide liner
source
Prior art date
Application number
TW094131080A
Other languages
English (en)
Other versions
TWI328843B (zh
Inventor
Chien-Chao Huang
Cheng-Chuan Huang
Fu-Liang Yang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200610066A publication Critical patent/TW200610066A/zh
Application granted granted Critical
Publication of TWI328843B publication Critical patent/TWI328843B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66636Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7843Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
TW094131080A 2004-09-09 2005-09-09 A strained silicon device manufacture method TW200610066A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/937,722 US7135372B2 (en) 2004-09-09 2004-09-09 Strained silicon device manufacturing method

Publications (2)

Publication Number Publication Date
TW200610066A true TW200610066A (en) 2006-03-16
TWI328843B TWI328843B (zh) 2010-08-11

Family

ID=35996797

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094131080A TW200610066A (en) 2004-09-09 2005-09-09 A strained silicon device manufacture method

Country Status (3)

Country Link
US (2) US7135372B2 (zh)
CN (1) CN100428427C (zh)
TW (1) TW200610066A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI421949B (zh) * 2006-09-20 2014-01-01 Samsung Electronics Co Ltd 包含場效電晶體的半導體裝置以及其製造方法
TWI648841B (zh) * 2014-06-04 2019-01-21 日商瑞薩電子股份有限公司 半導體裝置之製造方法

Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100543472B1 (ko) 2004-02-11 2006-01-20 삼성전자주식회사 소오스/드레인 영역에 디플리션 방지막을 구비하는 반도체소자 및 그 형성 방법
US7238985B2 (en) * 2003-08-13 2007-07-03 International Rectifier Corporation Trench type mosgated device with strained layer on trench sidewall
US20050090082A1 (en) * 2003-10-28 2005-04-28 Texas Instruments Incorporated Method and system for improving performance of MOSFETs
US7244654B2 (en) * 2003-12-31 2007-07-17 Texas Instruments Incorporated Drive current improvement from recessed SiGe incorporation close to gate
US7247535B2 (en) * 2004-09-30 2007-07-24 Texas Instruments Incorporated Source/drain extensions having highly activated and extremely abrupt junctions
JP2006173538A (ja) * 2004-12-20 2006-06-29 Oki Electric Ind Co Ltd 半導体装置
US7320921B2 (en) * 2005-03-22 2008-01-22 Taiwan Semiconductor Manufacturing Company, Ltd. Smart grading implant with diffusion retarding implant for making integrated circuit chips
US7545004B2 (en) * 2005-04-12 2009-06-09 International Business Machines Corporation Method and structure for forming strained devices
US7498642B2 (en) * 2005-04-25 2009-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Profile confinement to improve transistor performance
US20060286730A1 (en) * 2005-06-15 2006-12-21 Liu Alex Liu Yi-Cheng Semiconductor structure and method for forming thereof
US20060284249A1 (en) * 2005-06-21 2006-12-21 Chien-Hao Chen Impurity co-implantation to improve transistor performance
JP2007157870A (ja) * 2005-12-02 2007-06-21 Renesas Technology Corp 半導体装置及びその製造方法
US7741699B2 (en) * 2006-06-09 2010-06-22 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having ultra-shallow and highly activated source/drain extensions
US7473594B2 (en) * 2006-07-25 2009-01-06 International Business Machines Corporation Raised STI structure and superdamascene technique for NMOSFET performance enhancement with embedded silicon carbon
KR100764058B1 (ko) * 2006-09-20 2007-10-09 삼성전자주식회사 전계 효과 트랜지스터를 포함하는 반도체 소자 및 그 형성방법
US7622344B2 (en) * 2007-07-17 2009-11-24 United Microelectronics Corp. Method of manufacturing complementary metal oxide semiconductor transistors
US20090186475A1 (en) * 2008-01-21 2009-07-23 Shyh-Fann Ting Method of manufacturing a MOS transistor
US7927963B2 (en) * 2008-08-07 2011-04-19 International Business Machines Corporation Integrated circuit structure, design structure, and method having improved isolation and harmonics
US7804151B2 (en) * 2008-08-07 2010-09-28 International Business Machines Corporation Integrated circuit structure, design structure, and method having improved isolation and harmonics
DE102008049725B4 (de) * 2008-09-30 2012-11-22 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg CMOS-Bauelement mit NMOS-Transistoren und PMOS-Transistoren mit stärkeren verformungsinduzierenden Quellen und Metallsilizidgebieten mit geringem Abstand und Verfahren zur Herstellung des Bauelements
US8361847B2 (en) 2011-01-19 2013-01-29 International Business Machines Corporation Stressed channel FET with source/drain buffers
US8466502B2 (en) 2011-03-24 2013-06-18 United Microelectronics Corp. Metal-gate CMOS device
US8445363B2 (en) 2011-04-21 2013-05-21 United Microelectronics Corp. Method of fabricating an epitaxial layer
US8324059B2 (en) 2011-04-25 2012-12-04 United Microelectronics Corp. Method of fabricating a semiconductor structure
US8426284B2 (en) 2011-05-11 2013-04-23 United Microelectronics Corp. Manufacturing method for semiconductor structure
US8481391B2 (en) 2011-05-18 2013-07-09 United Microelectronics Corp. Process for manufacturing stress-providing structure and semiconductor device with such stress-providing structure
US8431460B2 (en) 2011-05-27 2013-04-30 United Microelectronics Corp. Method for fabricating semiconductor device
US8716750B2 (en) 2011-07-25 2014-05-06 United Microelectronics Corp. Semiconductor device having epitaxial structures
US8575043B2 (en) 2011-07-26 2013-11-05 United Microelectronics Corp. Semiconductor device and manufacturing method thereof
US8647941B2 (en) 2011-08-17 2014-02-11 United Microelectronics Corp. Method of forming semiconductor device
US8674433B2 (en) 2011-08-24 2014-03-18 United Microelectronics Corp. Semiconductor process
US8476169B2 (en) 2011-10-17 2013-07-02 United Microelectronics Corp. Method of making strained silicon channel semiconductor structure
US8691659B2 (en) 2011-10-26 2014-04-08 United Microelectronics Corp. Method for forming void-free dielectric layer
US8754448B2 (en) 2011-11-01 2014-06-17 United Microelectronics Corp. Semiconductor device having epitaxial layer
US8647953B2 (en) 2011-11-17 2014-02-11 United Microelectronics Corp. Method for fabricating first and second epitaxial cap layers
US8709930B2 (en) 2011-11-25 2014-04-29 United Microelectronics Corp. Semiconductor process
US9136348B2 (en) 2012-03-12 2015-09-15 United Microelectronics Corp. Semiconductor structure and fabrication method thereof
US9202914B2 (en) 2012-03-14 2015-12-01 United Microelectronics Corporation Semiconductor device and method for fabricating the same
US8664069B2 (en) 2012-04-05 2014-03-04 United Microelectronics Corp. Semiconductor structure and process thereof
US8866230B2 (en) 2012-04-26 2014-10-21 United Microelectronics Corp. Semiconductor devices
US8835243B2 (en) 2012-05-04 2014-09-16 United Microelectronics Corp. Semiconductor process
KR101908451B1 (ko) 2012-06-04 2018-10-16 삼성전자주식회사 반도체 소자 및 그 제조 방법
US8951876B2 (en) 2012-06-20 2015-02-10 United Microelectronics Corp. Semiconductor device and manufacturing method thereof
US8796695B2 (en) 2012-06-22 2014-08-05 United Microelectronics Corp. Multi-gate field-effect transistor and process thereof
US8710632B2 (en) 2012-09-07 2014-04-29 United Microelectronics Corp. Compound semiconductor epitaxial structure and method for fabricating the same
US9117925B2 (en) 2013-01-31 2015-08-25 United Microelectronics Corp. Epitaxial process
US8753902B1 (en) 2013-03-13 2014-06-17 United Microelectronics Corp. Method of controlling etching process for forming epitaxial structure
US9034705B2 (en) 2013-03-26 2015-05-19 United Microelectronics Corp. Method of forming semiconductor device
US9064893B2 (en) 2013-05-13 2015-06-23 United Microelectronics Corp. Gradient dopant of strained substrate manufacturing method of semiconductor device
US8853060B1 (en) 2013-05-27 2014-10-07 United Microelectronics Corp. Epitaxial process
US9076652B2 (en) 2013-05-27 2015-07-07 United Microelectronics Corp. Semiconductor process for modifying shape of recess
US8765546B1 (en) 2013-06-24 2014-07-01 United Microelectronics Corp. Method for fabricating fin-shaped field-effect transistor
US8895396B1 (en) 2013-07-11 2014-11-25 United Microelectronics Corp. Epitaxial Process of forming stress inducing epitaxial layers in source and drain regions of PMOS and NMOS structures
US8981487B2 (en) 2013-07-31 2015-03-17 United Microelectronics Corp. Fin-shaped field-effect transistor (FinFET)
CN104835737B (zh) * 2014-02-07 2018-09-04 无锡华润上华科技有限公司 半导体器件及其制作方法
TWI548039B (zh) * 2015-03-17 2016-09-01 力晶科技股份有限公司 半導體裝置的製作方法
US9989462B2 (en) * 2015-04-02 2018-06-05 Particle Measuring Systems, Inc. Laser noise detection and mitigation in particle counting instruments
KR102543178B1 (ko) 2018-03-23 2023-06-14 삼성전자주식회사 핀 전계 효과 트랜지스터를 포함하는 반도체 소자 및 이의 제조 방법
US10707352B2 (en) * 2018-10-02 2020-07-07 Qualcomm Incorporated Transistor with lightly doped drain (LDD) compensation implant
KR20200115762A (ko) 2019-03-25 2020-10-08 삼성전자주식회사 반도체 소자
US11699702B2 (en) * 2020-04-27 2023-07-11 Taiwan Semiconductor Manufacturing Co., Ltd. Input/output devices
US11450768B2 (en) 2020-10-05 2022-09-20 Sandisk Technologies Llc High voltage field effect transistor with vertical current paths and method of making the same
US11978774B2 (en) 2020-10-05 2024-05-07 Sandisk Technologies Llc High voltage field effect transistor with vertical current paths and method of making the same
TWI738568B (zh) * 2020-11-18 2021-09-01 汎銓科技股份有限公司 一種故障分析用的半導體試片的製備方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079180A (en) * 1988-12-22 1992-01-07 Texas Instruments Incorporated Method of fabricating a raised source/drain transistor
FR2654258A1 (fr) * 1989-11-03 1991-05-10 Philips Nv Procede pour fabriquer un dispositif a transistor mis ayant une electrode de grille en forme de "t" inverse.
DE69121535T2 (de) * 1990-12-07 1997-01-02 At & T Corp Feldeffekttransistor mit inverser T-förmiger Silizid-Torelektrode
DE19625461C2 (de) * 1996-06-26 2000-06-21 Martin Diestelhorst Verfahren zur Umwandlung von Infrarotstrahlung in elektrische Signale mit hochwirksamen Verstärkerprinzip
US6023082A (en) 1996-08-05 2000-02-08 Lockheed Martin Energy Research Corporation Strain-based control of crystal anisotropy for perovskite oxides on semiconductor-based material
US5891769A (en) * 1997-04-07 1999-04-06 Motorola, Inc. Method for forming a semiconductor device having a heteroepitaxial layer
US6160299A (en) * 1997-08-29 2000-12-12 Texas Instruments Incorporated Shallow-implant elevated source/drain doping from a sidewall dopant source
US6696346B2 (en) * 1997-12-24 2004-02-24 Rohm Co., Ltd. Method of manufacturing semiconductor device
US6130123A (en) * 1998-06-30 2000-10-10 Intel Corporation Method for making a complementary metal gate electrode technology
JP2000195872A (ja) * 1998-12-28 2000-07-14 Fujitsu Quantum Device Kk 半導体装置及びその製造方法
US6187642B1 (en) * 1999-06-15 2001-02-13 Advanced Micro Devices Inc. Method and apparatus for making mosfet's with elevated source/drain extensions
US6429061B1 (en) * 2000-07-26 2002-08-06 International Business Machines Corporation Method to fabricate a strained Si CMOS structure using selective epitaxial deposition of Si after device isolation formation
US6495402B1 (en) * 2001-02-06 2002-12-17 Advanced Micro Devices, Inc. Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture
US6489206B2 (en) * 2001-03-22 2002-12-03 United Microelectronics Corp. Method for forming self-aligned local-halo metal-oxide-semiconductor device
US6596599B1 (en) * 2001-07-16 2003-07-22 Taiwan Semiconductor Manufacturing Company Gate stack for high performance sub-micron CMOS devices
KR100406537B1 (ko) * 2001-12-03 2003-11-20 주식회사 하이닉스반도체 반도체장치의 제조 방법
US6723609B2 (en) * 2002-02-04 2004-04-20 United Microelectronics Corp. Method of preventing leakage current of a metal-oxide semiconductor transistor
US6498067B1 (en) * 2002-05-02 2002-12-24 Taiwan Semiconductor Manufacturing Company Integrated approach for controlling top dielectric loss during spacer etching
US6812103B2 (en) * 2002-06-20 2004-11-02 Micron Technology, Inc. Methods of fabricating a dielectric plug in MOSFETS to suppress short-channel effects
US6689688B2 (en) * 2002-06-25 2004-02-10 Advanced Micro Devices, Inc. Method and device using silicide contacts for semiconductor processing
US6680240B1 (en) * 2002-06-25 2004-01-20 Advanced Micro Devices, Inc. Silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide
US6573172B1 (en) * 2002-09-16 2003-06-03 Advanced Micro Devices, Inc. Methods for improving carrier mobility of PMOS and NMOS devices
US6699755B1 (en) * 2003-03-24 2004-03-02 Powerchip Semiconductor Corp. Method for producing a gate
US7112495B2 (en) * 2003-08-15 2006-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
US6929992B1 (en) * 2003-12-17 2005-08-16 Advanced Micro Devices, Inc. Strained silicon MOSFETs having NMOS gates with work functions for compensating NMOS threshold voltage shift
US7112497B2 (en) * 2004-06-25 2006-09-26 Texas Instruments Incorporated Multi-layer reducible sidewall process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI421949B (zh) * 2006-09-20 2014-01-01 Samsung Electronics Co Ltd 包含場效電晶體的半導體裝置以及其製造方法
TWI648841B (zh) * 2014-06-04 2019-01-21 日商瑞薩電子股份有限公司 半導體裝置之製造方法

Also Published As

Publication number Publication date
US20070075356A1 (en) 2007-04-05
US8569845B2 (en) 2013-10-29
CN100428427C (zh) 2008-10-22
TWI328843B (zh) 2010-08-11
CN1767157A (zh) 2006-05-03
US7135372B2 (en) 2006-11-14
US20060051922A1 (en) 2006-03-09

Similar Documents

Publication Publication Date Title
TW200610066A (en) A strained silicon device manufacture method
KR101017477B1 (ko) 전계 효과 트랜지스터에서 접촉 저항 감소를 위한 애피택셜실리콘 게르마늄
US8106467B2 (en) Semiconductor device having carrier mobility raised by generating strain in channel region
US8076228B2 (en) Low noise transistor and method of making same
US7902082B2 (en) Method of forming field effect transistors using diluted hydrofluoric acid to remove sacrificial nitride spacers
TW200625523A (en) Improve transistor mobility by adjuasting stress in shallow trench isolation
JP3821707B2 (ja) 半導体装置の製造方法
TW200520171A (en) Ultra-thin channel device with raised source and drain and solid source extension doping
KR100837555B1 (ko) 반도체 소자 및 그 제조 방법
US20120235213A1 (en) Semiconductor structure with a stressed layer in the channel and method for forming the same
KR101598074B1 (ko) 반도체 소자 및 그의 제조방법
SE0302594D0 (sv) Vertical DMOS transistor device, integrated circuit, and fabrication method thereof
US10177246B2 (en) Semiconductor structure and fabrication method thereof
KR20090021459A (ko) 반도체소자 및 이의 제조방법
US20100164021A1 (en) Method of manufacturing semiconductor device
TW200610007A (en) Semiconductor device having high-k gate dielectric layer and method for manufacturing the same
KR100707590B1 (ko) 다중 엘디디형 모스 트랜지스터 및 그 제조 방법
KR100937667B1 (ko) 트랜지스터 제조 방법
KR20090064658A (ko) 반도체 소자 및 이의 제조방법
KR20060100779A (ko) 다중 ldd 영역을 구비한 반도체 소자의 형성방법
JP4206768B2 (ja) トランジスタの形成方法
CN102903635B (zh) Mos晶体管的制造方法
KR100641556B1 (ko) 디이모스 트랜지스터의 제조 방법
KR930010676B1 (ko) 앤모오스 제조방법
JP2005032997A (ja) シャロートレンチ分離構造を有する半導体装置の製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees