TW200528734A - Substrate detection device and detection method - Google Patents

Substrate detection device and detection method Download PDF

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Publication number
TW200528734A
TW200528734A TW093118200A TW93118200A TW200528734A TW 200528734 A TW200528734 A TW 200528734A TW 093118200 A TW093118200 A TW 093118200A TW 93118200 A TW93118200 A TW 93118200A TW 200528734 A TW200528734 A TW 200528734A
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Taiwan
Prior art keywords
substrate
indentation
aforementioned
inspection
wafer
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TW093118200A
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Chinese (zh)
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TWI248518B (en
Inventor
Yuki Kitamura
Shinya Umetani
Tsutomu Kawanishi
Shinichi Nishida
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Tecnos Co Ltd
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Publication of TWI248518B publication Critical patent/TWI248518B/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8803Visual inspection
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8851Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors

Abstract

To perform inspection of the mounting state of an IC chip to a substrate, in a short time, based on objective standards. The image data of the back of a glass substrate 1, having the IC chip 2 mounted on its surface, is acquired by a differential interference microscope 10 to be subjected to differential processing and master data, such as the pattern of the panel electrode 4 of the substrate 1 or the like, is matched with the image data to position the bump region A in the image data, to specify an inspection region C, based on the positioned bump region A and to divide the inspection region C. A dent level is detected from the standard deviation of the image brightness in the inspection region and the number of the dents is calculated from the area or shape of a white part due to binarized image data, to decide the intensity of the dents formed to a panel electrode, the number of the dents, positional shift of the dents, mixing of foreign objects and the like. Since the dent level appears in the brightness of the image and the image brightness is digitized, the dent level in the determined inspection region can be detected by a numerical value, and the quality of the mounting state of the IC chip 2 can be evaluated rapidly and objectively.

Description

200528734 玖、發明說明: 【發明所屬之技術領域】 本發明為關於檢查對基板的零件的封裝狀態之裝 檢查方法。 【先前技術】 目前,手提電話等各種電子機器所使用的液晶驅 Μ ’如圖1 0所不,在構成液晶面板之玻璃基板1上 液晶驅動之I C晶片2等一體化的C 0 G ( C h i ρ ο n G 形式者已逐漸被廣泛使用。此C 0 G為一邊由多數的 所形成之面板電極4的玻璃基板1 ;及,被安裝在該 上之IC晶片2 ;及,夾在其兩者之間且使兩者接著 等的異向性導電材料 3 ;如此所構成,並介存該異 電材料3,玻璃基板1和IC晶片2以一體化而被製 相對於此面板電極4之I C晶片 2的表面上,一 多數個晶片電極5,在一體化時,必須使該晶片電? 一定部份和前述面板電極4之一定部份導通。為了 導通,如圖1 1所示,在前述晶片電極5上之一定部 定範圍形成微小凸狀之凸塊7的集合,該凸塊7相 板電極4之一定部份,而在玻璃基板1上配置I C晶 此種形成凸塊7之方法,一般為使用在前述一定範 多數個微小的焊粒之方法。 又,使該玻璃基板1 ;及,配置在該基板1上之I 2 ;介存前述異向性導電材料3而藉熱壓著時,含在 導電材料3之樹脂會受熱而融解。此時,如圖1 1所 312/發明說明書(補件)/93-09/93118200 置及其 動基板 ,使其 lass) ΙΤ0等 基板1 之ACF 向性導 作。 邊具有 f亟5的 謀求該 份以一 對於面 ^片2。 圍設置 C 晶片 異向性 示,由 5 200528734 於晶片電極5的凸塊面7 a和面板電極4的間隔’比沒有凸 塊 7的其他部份之晶片電極 5和面板電極 4之間隔更狹 窄,因此,異向性導電材料3可相對的對有凸塊7之部份 予以強力的壓縮。 在異向性導電材料3上,由於含有多數個微小的導電粒 子6,因此藉前述壓縮,面板電極4和晶片電極5接近時, 只有相對被強力壓縮之凸塊7部份會藉由前述導電粒子6 而導通。在此一狀態下,藉A C F固化,前述面板電極4和 晶片電極 5之一定部份彼此間會以導通狀態而使兩者固 定,而多接點可全部電氣接續,且在玻璃基板1上封裝IC 晶片2。 此導通時之電阻或導通之確實性可藉前述異向性導電 材料3之壓縮的程度,亦即,藉凸塊7而被押壓之導電粒 子6,可多數且確實地介在於面板電極4和晶片電極5的 凸塊7之間,以兩電極4、5間可導通之狀態而確實地押壓, 如此予以確保。 該壓縮之程度為依設在所使用之I C晶片2的凸塊7之 高度或大小,含在異向性導電材料3之導電粒子6的密度 等而決定,由於其凸塊7的高度或大小會因1C晶片2而會 有偏差,因此在前述導通狀態也會有偏差。因此為了確認 該壓縮的程度,可使用藉押壓前述凸塊7等而觀察形成在 面板電極4上之壓痕8的形成狀況,有此一方法。 此壓痕8為藉凸塊7及導電粒子6朝向面板電極4而被 押壓以形成在該面板電極4之表面,即如圖1 1所示的凹狀 6 312/發明說明書(補件)/93-09/93118200 200528734 之變形的集合。自前述基板1的裏面觀察時,此壓痕8變 成凸狀的變形之粒子的集合,其粒子為由:藉凸塊7所形成 的凸痕和藉導電粒子6所形成的導電粒子痕所形成。 如凸塊7的高度太低,或在凸塊7上未存在有導電粒子 6時.,壓痕8的強度會變弱,又,在該一定的凸塊領域内 導電粒子6的數量太少而在一部份不平衡時,在該領域内 的壓痕8之數量則會變少,上述任一情況下均不能確保適 當之導通。進一步,在前述凸塊領域外存在有凸塊7而異 物混入凸塊領域内外時,由於其會被形成不正常的壓痕 8,因此,基板1和I C晶片2則不能確保正常的導通。 因此,為了判斷壓痕8的良否,須使用顯微鏡等以肉眼 來觀看,或以肉眼觀看由該顯微鏡所取得的影像數據,一 方面比較另外準備的不良面板之樣本等而一方面比較,並 評定前述壓痕8的形成狀況,以檢查玻璃基板1和I C晶片 2的封裝狀態。 【發明内容】 (發明所欲解決之問題) 但是,上述檢查為以肉眼確認其壓痕強度或壓痕的數目 之形成狀況,其由於為由檢查員的感覺來判定每一個微小 的壓痕之良否,但依照檢查員的判定則可能有不同的檢查 結果,因而其缺乏客觀性。 又,由於對凸塊領域全數必須實施壓痕強度、壓痕數 目、分佈、偏位及異物混入等之每一個檢查項目,因此必 須花費很多的檢查時間。 7 3丨2/發明說明書(補件)/93-09/931 ] 8200 200528734 因此,本發明之課題為,根據客觀的基準可以短時間即-可檢查出壓痕之形成狀況者。 (解決問題之手段) 為了解決上述問題,本發明之基板檢查裝置及檢查方法 為,藉微分干涉顯微鏡取得在表面上安裝I C晶片之上述透 明基板的裏面所得之I C晶片的封裝部份之晝像數據,在該 晝像數據中特定檢查之領域。根據前述檢查領域内的影像 亮度,檢測出凸塊和導電粒子形成在透明基板上的面板電 極之壓痕的壓痕位準或壓痕數目,再將該壓痕位準或壓痕 數目和基準值比較而判定前述I C晶片的封裝狀態。 在前述基板上的面板電極所發生之壓痕的強弱,由於會 呈現出不同於前述的影像亮度,因此,藉使該影像亮度數 值化,則可檢測出被決定的檢查領域内之壓痕位準或壓痕 數目,又,藉特定檢查之領域,並藉前述壓痕位準或壓痕 數目即可客觀的判定I C晶片之封裝狀態的良否。 又,前述影像數據也可採用使用微分干涉顯微鏡所得的 濃淡影像數據再予以邊緣檢測處理之手段。此邊緣檢測處 理之例,可列舉出例如影像之微分處理。根據此一構成, 在前述影像數據中可強調壓痕和其周邊部份之濃淡差,由 於其差而可明確呈現出影像亮度之數值,因此,可明確特 定壓痕之境界,同時可容易評定其壓痕。 又,也可採用對前述影像數據匹配(n〗a t c h i n g )基板的面 板電極之圖案等的主數據,在影像數據中定位出凸塊領 域,再根據該定位之凸塊領域而特定出檢查領域,並對該 8 312/發明說明書(補件)/93-09/93118200 200528734 檢查領域自由分割,如此之手段亦可。 根據此一構成,由於可區別凸塊領域及其以外之領 判定檢查領域,因此可因應檢查的目的而區分檢查 域。又,藉對該檢查領域予以分割,則可對一個檢查 内之壓痕分佈的偏差予以評定。 根據上述手段之基板檢查裝置及檢查方法中,檢測 述壓痕位準之具體的構成為,在前述檢查領域中,依 述影像數據的影像亮度之標準偏差而實施壓痕位準 測,也可考慮以前述影像數據的影像亮度之二值化影 據,依照其白或黑色部份之面積和形狀而檢測出壓 目,如此之構成,藉其以單獨或組合之數據而各自和 值比較即可判定前述I C晶片之封裝狀態。又取代I C 而使用撓性基板之狀況中也可用和上述同樣方法來對 (發明效果) 本發明藉以上構成,可以客觀的基準在短時間内對 實施檢查I C晶片之封裝狀態。 【實施方式】 圖1至圖9表示一實施形態之基板檢查裝置,此一 形態之基板檢查裝置為在玻璃基板1上之面板電極4 存含有導電粒子6之異向性導電材料3,重疊載置有 片2之該I C晶片2上之晶片電極5,藉壓接前述基板 1C晶片2’以前述1C晶片2的晶片電極5上之凸塊7 前述異向性導電材料3而發揮導電性,同時,在前述 電極4產生壓痕8,藉該壓痕8部份的前述異向性導 312/發明說明書(補件)/93-09/93118200 域而 的領 領域 出前 照前 之檢 像數 痕數 基準 晶片 應。 基板 實施 :,介 1C晶 1和 壓縮 面板 電材 9 200528734 料3之導電性’面板電極4接績至前述晶片電極5 ’措檢 測出形成在面板電極4之壓痕8的壓痕位準和壓痕數目而 判定在前述透明基板1封裝IC晶片2之液晶驅動基板Μ 對前述玻璃基板1之前述I C晶片2的封裝狀態。 此處,壓痕位準係指,在玻璃基板1上安裝IC晶片2 時,面板電極4之表面被押壓凸塊7及導電粒子6等,在 該表面變形為凹狀之高度,及該變形如何在一定範圍内等 分佈而評定壓痕8之形成狀況的指標。又,壓痕數目為表 示在該凹狀所變形之個數。 裝置之構成,如圖2所示,在Χ、Υ軸方向可移動自如, 在Ζ軸方向可升降自如,或在Χ-Υ平面内在0軸上可迴轉 自如之工作台(work stage)W上,使前述液晶驅動基板 Μ 載置在其裏面而放在上面。Ζ軸為用來調整焦點,0軸為 用來調整攝影機之掃描方向。 CPU 1 6藉由輸出入板1 4、控制盤1 5而被控制之前述工 作台W的動作,和在上部配置之C C D攝影機1 2接續的微分 干涉顯微鏡1 0對向於液晶驅動基板Μ。前述基板Μ被吸著 載置在圖6所示之工作台W上,該工作台W為可對應大小 多機種基板之構造,其藉載置場所的座標管理而可載置複 數個前述基板Μ。 C P U 1 6為使用 2台機械控制用和影像處理用之個人電 腦,而各個並列處理並實現高速處理。 微分干涉顯微鏡1 0為自照明1 1的光源接受光,如圖3 箭頭a所示,自前述玻璃基板1裏面取得濃淡影像數據, 10 312/發明說明書(補件)/93-09/93118200 200528734 其影像數據為藉由高解像度之C C D攝影機1 2而被傳達至影 像處理板1 3。影像數據則被保存在C P U 1 6而:表示在適宜的 晝面上。 又,照明1 1也可以自前述箭頭a之方向及箭頭b所示 自玻璃基板1的封裝面之方向來照射,其中,自前述箭頭 a的方向照射之照明1 1,為了防止在前述基板1上的面板 電極4之凹凸發生影像,因此照明以同軸光者較佳。又, 為了明確掌握微妙的金屬之形變的壓痕8之凹凸的亮度變 化,顯微鏡1 0必須是微分干涉顯微鏡。 所取得之前述濃淡影像數據,在CPU1 6等中可因應其目 的而被施加影像處理,然後經過以下所示之處理過程而被 檢測出前述各種壓痕位準和壓痕數目,藉和各個壓痕位準 和壓痕數目之基準值,或該壓痕位準和壓痕數目之組合的 基準值作比較而判定在玻璃基板1上之I C晶片2的封裝狀 態。以下,以圖1之流程圖說明該裝置中之檢查流程。 (影像數據之取得·微分處理) 將自前述顯微鏡1 0及C C D攝影機1 2所取得之玻璃基板 1的濃淡影像數據(步驟 21)在 CPU16中微分處理(步驟 2 2 )。此處所謂之微分處理為指在濃淡影像之連續部份,使 其亮度的等級變化之程度予以數值化,並更強調亮度之不 連續部份,而表示其亮度變化之顯著部份的境界,如此為 其特徵。 藉微分處理,例如在圖7所示之基板1的濃淡影像可變 成在圖8所表示之微分影像。此圖7及圖8為顯示所表示 11 312/發明說明書(補件)/93-09/93118200 200528734 影像的畫像,其和晝面所表示之實態的影像其色調不同。 在此圖7之濃淡影像中,一般而言,圖中存在之面板電 極4的圖案部P為灰色基調而呈現無圖案部Q為黑色。此 時,在面板電極4上朝裏面突出之壓痕8,其突出部比周 圍會呈現出濃的顏色,其濃度為當凸塊高度愈高時則會呈 現出更濃的顏色。 圖8之微分影像為,於圖7的濃淡影像中,影像亮度之 等級的不連續部份,只有在壓痕8和前述圖案部P之境界, 及圖案部P和無圖案部Q之境界會呈現出白色。此時,壓 痕8則呈現出前述突出高度愈高時則越強調白色。 此處,不實施前述影像之微分處理,在通常的濃淡影像 中,雖然也可進行檢查以下的壓痕位準之檢測,但假如在 影像數據實施上述之微分處理時,由於其強調亮度的等級 變化,因此,可容易評價基板1上的亮度之不同,而可容 易判定以後的壓痕位準,如此較佳。 又,要強調該亮度的變化之影像處理方法,除了微分處 理以外也可使用眾所周知的邊緣檢測處理方法,其他也可 考慮使用差分處理等。 (匹配·檢查領域之特定) 在前述濃淡影像數據,對玻璃基板1之主數據(步驟2 3 ) 而使凸塊領域定位,依照該定位之凸塊領域而特定檢查領 域(步驟2 4 )。 基板1的主數據為藉設計圖面而抽出圖案數據和IC晶 片2或凸塊7等之位置資訊,使用此等資訊作成掩蔽影像。 12 312/發明說明書(補件)/93-09/93118200 200528734 此一掩蔽影像具有可依照設定之領域而選擇並作成掩蔽 份,再黹其重疊在影像數據,而使其僅表示未掩蔽部份 影像數據,具有此一功能。 該掩蔽影像被重疊在所取得的基板1之前述影像數據 同時,在影像上匹配前述兩影像的面板電極4之邊緣彼 間,再使掩蔽影像中之主數據定位於前述影像數據。藉 定位,如圖4所示,在前述影像數據中,可正確地特定 面板電極4之無圖案部Q、圖案部P、及設計上之凸塊領 k 〇 例如,要檢查凸塊領域A内的壓痕位準時,藉前述主 據作成圖5所示之掩蔽影像。對前述影像數據重疊該掩 影像,在圖中僅表示以鏈線所示之凸塊領域A内的影像 此鍵線係根據前述主數據之設計上的凸塊領域 A,而虛 為表示無圖案部Q和圖案部P之境界。 所表示之凸塊領域A中,將接續至前述電極4、5相 間之一單位的凸塊領域A作為1個檢查領域C,該檢查 域C則可因應必要而分割為任意的數量、形狀所成的細 領域D。例如,在圖4所示之檢查領域C1中,如圖中之 分線B縱橫各別分割為2,則可成為合計4個的細分領域 另一方面,在檢查凸塊領域A外時,作成僅掩蔽該凸 領域A之掩蔽影像,而藉和上述同樣的作業,僅表示凸 領域A以外的影像。 (藉標準偏差檢測出壓痕位準) 在檢查領域特定前述凸塊領域A (步驟2 4 ),藉前述微 312/發明說明書(補件)/93-09/93118200 部 的 5 此 該 無 域 數 蔽 Ο 線 互 領 分 細 D。 塊 塊 分 13 200528734 影像數據之影像亮度的標準偏差而檢測出檢查領域c之壓 痕位準(步驟2 5 )。 使用壓痕位準檢測之標準偏差的指標是因為,在一定領 域内可總和壓痕8的數量、強度之各因素的大小,而在各 領域可客觀的評定其壓痕位準。 在此一標準偏差的計算中,於前述凸塊領域A内,對1 個檢查領域C,將該領域C分割為前述細分領域D而作評 定時,其和未分割評定時之壓痕位準會有所不同。 圖8所示之微分影像中,壓痕8為,如圖中所示,在面 板電極4上之前述凸塊領域A附近會呈現出如前述般之白 色顆粒的集合。圖4為表示該圖8之凸塊領域A附近的模 式圖。 例如,在圖4所示之檢查領域C1,使C1分割為上下左 右a、b、c、d4個細分領域D。對a、b、c、d全體作為檢 查領域C作評價並和細分為4分割之各別細分領域D之評 價作比較。在此處,檢查領域C 2被假定為具有和前述領域 C 1相同標準偏差之壓痕8的數量、強度之領域。 如圖中所示,在檢查領域C1中,分割為前述 4個細分 領域D時,a、b、c、d的各別細分領域D之標準偏差之 數值明確示出其細分領域D各個的數值之偏差,在圖中特 別是對壓痕數目少的 b之細分領域作較低之評價。相對 的,未分割時由於前述細分領域D各個標準偏差數值的大 小互抵,因此,檢查領域C1評價變成和檢查領域C 2具有 相同之壓痕位準。 14 312/發明說明書(補件)/93-09/93118200 200528734 如此,藉對檢查領域C作分割,則可對在該檢查領域c 内壓痕8分佈之偏差作正確的評價。 又,此一分割假如分割太細時,則會過份顯現前述細分 領域D各個數值的偏差,其則變成難以客觀評價檢查領域 C全體的壓痕位準之良否。 在檢查此實施形態之基板1時,為容易對壓痕位準作評 價,採用使1個檢查領域C在上下左右各別作2分割,合 計成4分割之評價方法。 又,將此檢查領域C分割為細分領域D各個之條件由於 可自由設定,因此,可因應被要求的壓痕8之特性,而變 化細分領域D之數目及形狀。 又,藉對該標準偏差之數值是否在基準值内作確認則可 判定各個檢查領域C之壓痕位準的良否。例如,此一數值 太低時,則被判斷為因某種原因壓痕太弱或壓痕數目不 足,又,在此一數值太高時,則被判斷為在凸塊領域A内 因異物混入等而有異常的壓痕8。 又,此等評價之源頭的影像數據之影像亮度,顯微鏡1 0 會使基板1的焦點匹配狀況而帶來變化,其焦點和亮度之 關係為,焦點一致時其亮度變成最大,焦點偏離時則亮度 會有減低之傾向。因此,焦點不一致之基板1的前述標準 偏差之數值,比起形成有標準的壓痕8之標準偏差的數值 其全體會有較低的數值,因此,當和標準的數值比較時, 在前述步驟2 1中,則可抽出無法順利取得影像之基板1。 (以二值化數據檢測出壓痕數目) 15 312/發明說明書(補件)/93-09/93118200 200528734 其次,同樣在檢查領域C特定凸塊領域A (步驟2 4),再 作成前述微分影像資料之影像亮度的二值化數據(步驟 2 6 ),在該二值化數據中自檢查領域内的白面積和該白色部 份的形狀算出檢查領域C之壓痕數目。 使用壓痕數目之指標是因為在一定領域内藉壓痕8的數 量可把握其各個領域的導通之位置數,除了前述標準偏差 之指標評價外,可客觀的對導通之確實性作評價。 又,藉著確認所算出之壓痕數目在基準值以上時則可判 定前述IC晶片2之封裝狀態的良否。 但是,在判定前述壓痕位準時,使1個檢查領域C分割 為細分領域D時,例如,即使有壓痕數目不足之領域D存 在,但只要包含該領域D的檢查領域C全體其標準偏差之 指標的評價在一定位準以上時,亦有判定在該領域C中導 通可充份確保之情形。 但是,即使檢查領域 C全體其標準偏差之評價沒問題 時,在1個檢查領域C内只要存在有多數個壓痕不足之細 分領域D,則發生導通不良之機率會變高。 因此,將藉前述標準偏差之壓痕位準之評價,及對該二 值化數據之壓痕數目作評價而合併實施,則可設定前述細 分領域D各個的壓痕數目不低於基準值,同時,對未滿該 基準值之細分領域D的數量,可設定在1個檢查領域C内 不能超過的領域數目之上限。 根據此一構成,可把握細分領域D各個之壓痕數目,同 時,由於可對包含該細分領域D之檢查領域C全體的壓痕 16 312/發明說明書(補件)/93-09/93118200 200528734 數目、標準偏差等的壓痕位準作評價,因此,可以對 I c 晶片2的封裝部份之導通效能的良否以更詳細之基準作評 價。 除了此例以外,也可併用對複數個壓痕位準之評定的指 標作檢測,藉對此等數據及依照該指標所組合的基準值作 比較,再依照複數個指標而綜合評價I C晶片2之封裝狀 態。當然也可因應必要而單獨檢查評價各個項目。 又,上述二值化處理所使用之界限值雖然可自由設定, 但也可採用計測每領域的影像之微分位準,而自動設定為 最適合壓痕數目評價之界限值的構成。根據此一構成,不 管壓痕8不同特性所致的影像亮度之明暗,其均可容易地 實施二值化處理。 (異物混入之檢測) 其次,在檢查領域C特定凸塊領域A以外的領域(步驟 2 8 ),在前述二值化數據藉檢測出有無存在凸塊領域A以外 之白色部份,而判定存在於凸塊領域A以外偏位之壓痕8 或異物混入之壓痕8。 (圖案傷痕、圖案燒傷、圖案裂開) 又,除了在圖1所示之步驟以外,以和檢測出前述異物 混入同樣的方法可檢測出基板1不良的圖案傷痕、圖案燒 傷、圖案裂開等。 此等狀況,在前述微分干涉顯微鏡 1 0中,由於在全部 的影像數據呈現出影像亮度的變化,因此,藉評定前述對 每個檢查領域之影像亮度則可判定有無不良和類別。 17 312/發明說明書(補件)/93-09/93118200 200528734 (晶片偏位) 又,同樣的除了圖1所示之步驟以外,在前述影像數據, 自表示壓痕8群之各粒的檢測座標中,檢測出成為壓痕8 群中心之座標’即可檢測出I C晶片2的封裝位置之偏位。 要尋求此壓痕8群的中心座標時,在1檢查領域内所存 在之壓痕之中,對位於上下左右端部的壓痕8作特定,再 藉其上下左右兩端之壓痕8的座標,算出中心座標。比較 此中心座標及在前述主數據中之凸塊領域A的理論上之中 心座標,探求雙方的偏位之距離,再將此距離和基準值比 較而判定I C晶片2的封裝位置之良否。 上述實施形態之基板檢查裝置為藉適當組合可檢測出 上述所示的壓痕位準和壓痕數目之各種功能,而因應目的 選擇檢查項目並判定前述I C晶片2的封裝狀態。如藉事先 設定裝置的功能表則可自動的一次實施全部的檢查和判 定,因此其可迅速客觀的檢查I C晶片2之封裝狀態。 又,檢查對象之基板,除了可使用玻璃基板1之前述C0G 以外,也可適用於具有透明基板之形式。又,在此檢查裝 置中,檢查對象並不限於在透明基板上封裝I C晶片2之檢 查對象,其也可對應使用撓性基板作為檢查對象。 以下依照圖9說明使用該基板檢查裝置之檢查方法及其 操作順序。 為了保全檢查結果之數據,檢查之作業者,首先輸入可 區別裝置的操作者和管理者本身的作業者之代碼並使裝置 起動(步驟1 7 a )。 18 3 12/發明說明書(補件)/93-09/93118200 200528734 其次,輸入從事檢查之作業者名稱、密碼、管理等級等 後,再登錄檢查對象之基板I C晶片等的主數據、該基板之 機種的資訊、檢查時程(步驟1 7 b)。 主數據為包含晶片的種類和凸塊的位置資訊等,基板之 機種的資訊為,包含對各機種必要之封裝零件的型號、圖 案·晶片之位置資訊、A C F的種類等。檢查時程為,在登 錄機種中登錄各封裝零件之檢查時程。此檢查時程可自由 地從各步驟中選擇而予以設定。 自步驟 1 8當開始作手動運轉時,在各種檢查機構中可 作調整作業或教示,並可對每1個起動、每1個步驟作内 容檢查之確認,可作參數之調整及光學系統之檢查等。 自步驟 1 9當開始作手動運轉時,則可沿著檢查時程自 動地實施一連串的檢查,其檢查結果可被自動的保存。此 一檢查結果及品質資訊、運轉狀況被在步驟2 0中輸出如此 而可結束檢查。 【圖式簡單說明】 圖1表示藉一實施形態之基板檢查裝置作檢查處理的詳 細流程圖。 圖2表示該實施形態之裝置的構成之說明圖。 圖3表示該實施形態之裝置的剖面之說明圖。 圖4表示壓痕之形成狀況的模式圖。 圖5表示圖4中之檢查領域的說明圖。 圖6表示該實施形態之檢查時的基板之載置狀況的說明 圖。 19 312/發明說明書(補件)/93-09/93118200 200528734 圖7表示濃淡影像數據之一例的模式圖。 圖8表示圖7之微分影像數據的模式圖。 圖9表示該實施形態之程式的構成之說明圖。 圖1 0表示液晶驅動基板之一例的斜視圖。 圖1 1為說明I C晶片之封裝狀態的剖面圖。 (元件符號說明) 1 透 明 基 板 (玻璃基板) 2 I C 晶 丨片 3 異 向 性 導 電材料 4 面 板 電 極 5 晶 片 電 極 6 導 電 粒 子 7 凸 塊 7a 凸 塊 面 8 壓 痕 10 微 分 干 涉 顯微鏡 11 昭 明 12 CCD攝 影’ 機 13 影 像 處 理 板 14 罕削 出 入 板 15 控 制 板 16 CPU A 凸 塊 領 域 B 細 分 線 312/發明說明書(補件)/93-09/93118200200528734 (1) Description of the invention: [Technical field to which the invention belongs] The present invention relates to a mounting inspection method for inspecting a package state of a component on a substrate. [Prior art] At present, as shown in FIG. 10, the liquid crystal driver M ′ used in various electronic devices such as mobile phones is integrated with the C 0 G (C The form of hi ρ ο n G has gradually been widely used. This C 0 G is a glass substrate 1 having a plurality of panel electrodes 4 formed on one side; and an IC chip 2 mounted thereon; and, sandwiched therebetween. An anisotropic conductive material 3 between the two, which is followed by the two; is structured in this way, interposing the heteroelectric material 3, and the glass substrate 1 and the IC wafer 2 are integrated to be opposed to the panel electrode 4 On the surface of the IC chip 2, a plurality of wafer electrodes 5 must be electrically connected during integration. A certain part is electrically connected to a certain part of the aforementioned panel electrode 4. In order to conduct electricity, as shown in FIG. 11 A set of tiny convex bumps 7 is formed in a certain portion of the aforementioned wafer electrode 5 in a certain range. The bumps 7 are a certain portion of the plate electrode 4 and an IC crystal is arranged on the glass substrate 1 to form the bumps. The method of 7 is generally to use a small number of small In addition, the glass substrate 1 is made; and I 2 disposed on the substrate 1; when the anisotropic conductive material 3 is interposed and pressed by heat, the resin contained in the conductive material 3 is heated and melted. At this time, the ACF orientation of substrate 1 such as substrate 1 of 312 / Invention Specification (Supplement) / 93-09 / 93118200 and its moving substrate as shown in Figure 11 and 11 is used. Edges with f5 are seeking this share to face 2 ^ 2. The surrounding wafer C anisotropy shows that the distance between the bump surface 7 a of the wafer electrode 5 and the panel electrode 4 from 2005200528734 is narrower than that between the wafer electrode 5 and the panel electrode 4 without other parts of the bump 7 Therefore, the anisotropic conductive material 3 can relatively strongly compress the portion having the bumps 7. Since the anisotropic conductive material 3 contains a plurality of minute conductive particles 6, by the aforementioned compression, when the panel electrode 4 and the wafer electrode 5 approach, only the portion of the bump 7 that is relatively strongly compressed will be conducted by the aforementioned conduction. Particle 6 is on. In this state, by the ACF curing, certain portions of the aforementioned panel electrode 4 and wafer electrode 5 will be fixed to each other in a conducting state, and the multiple contacts can be all electrically connected and packaged on the glass substrate 1. IC wafer 2. The resistance at this conduction or the reliability of the conduction can be obtained by the degree of compression of the aforementioned anisotropic conductive material 3, that is, the conductive particles 6 pressed by the bumps 7 can be mostly and surely interposed between the panel electrodes 4 Between the electrodes 7 and the bumps 7 of the wafer electrode 5, the two electrodes 4 and 5 can be reliably pressed in such a state that they can be conducted. This is ensured. The degree of compression is determined by the height or size of the bumps 7 provided on the IC chip 2 used, the density of the conductive particles 6 contained in the anisotropic conductive material 3, etc., due to the height or size of the bumps 7 There may be a deviation due to the 1C wafer 2, and therefore there may be a deviation in the aforementioned conduction state. Therefore, in order to confirm the degree of compression, the formation of the indentation 8 formed on the panel electrode 4 can be observed by pressing the bumps 7 and the like, and there is such a method. This indentation 8 is pressed by the bumps 7 and the conductive particles 6 toward the panel electrode 4 to be formed on the surface of the panel electrode 4, that is, a concave shape 6 312 / Invention Specification (Supplement) as shown in FIG. 11 / 93-09 / 93118200 200528734 A collection of variants. When viewed from the inside of the aforementioned substrate 1, the indentation 8 becomes a collection of convex deformed particles, the particles of which are formed by the bumps formed by the bumps 7 and the conductive particle marks formed by the conductive particles 6. . If the height of the bumps 7 is too low, or there are no conductive particles 6 on the bumps 7, the strength of the indentation 8 will become weak, and the number of conductive particles 6 will be too small in a certain bump area. When a part of the imbalance occurs, the number of indentations 8 in the field will decrease, and proper conduction cannot be ensured in any of the above cases. Further, when bumps 7 exist outside the aforementioned bump region and foreign matter is mixed into the bump region, the substrate 1 and the IC wafer 2 cannot ensure normal conduction because they are formed with abnormal indentations 8. Therefore, in order to judge the quality of the indentation 8, it is necessary to use a microscope or the like to view it with the naked eye, or to view the image data obtained by the microscope with the naked eye. The formation condition of the aforementioned indentation 8 is to check the packaging states of the glass substrate 1 and the IC wafer 2. [Summary of the Invention] (Problems to be Solved by the Invention) However, the above-mentioned inspection is to confirm the indentation strength or the number of indentation formation conditions with the naked eye, and it is because each inspector judges each minute indentation by the sense of the inspector. Good or not, but according to the inspector's judgment, there may be different inspection results, so it lacks objectivity. In addition, since all inspection items such as indentation strength, indentation number, distribution, offset, and foreign matter intrusion must be carried out in the bump field, a lot of inspection time must be spent. 7 3 丨 2 / Invention Specification (Supplement) / 93-09 / 931] 8200 200528734 Therefore, the subject of the present invention is to be able to check the formation of indentation in a short time based on objective criteria. (Means for Solving the Problems) In order to solve the above problems, the substrate inspection apparatus and inspection method of the present invention is to obtain a day image of the package portion of the IC chip obtained by the inside of the transparent substrate on which the IC chip is mounted on the surface by a differential interference microscope. Data, specific inspection areas in this day image data. The indentation level or number of indentations of the panel electrode formed by the bumps and conductive particles on the transparent substrate is detected according to the image brightness in the aforementioned inspection area, and then the indentation level or number of indentations and the reference The value is compared to determine the packaging state of the IC chip. The intensity of the indentation generated by the panel electrode on the substrate will be different from the aforementioned image brightness. Therefore, by digitizing the image brightness, the indentation position in the determined inspection area can be detected. The number of indentations or indentations can be determined objectively by the specific inspection area and the aforementioned indentation level or indentation number. In addition, the aforementioned image data can also be obtained by means of edge-shading image data obtained by using a differential interference microscope and then performing edge detection processing. Examples of this edge detection process include, for example, image differential processing. According to this structure, in the aforementioned image data, the difference between the density of the indentation and its surroundings can be emphasized, and the numerical value of the brightness of the image can be clearly displayed due to the difference. Therefore, the realm of the specific indentation can be clarified and it can be easily evaluated Its indentation. In addition, the master data such as the pattern of the panel electrodes of the substrate can be matched to the aforementioned image data to locate the bump area in the image data, and then specify the inspection area based on the positioned bump area. And the 8 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 can be divided freely in the inspection field. According to this configuration, since the inspection area can be distinguished from the bump area and other areas, the inspection area can be distinguished according to the purpose of the inspection. In addition, by dividing the inspection area, the deviation of the indentation distribution within an inspection can be evaluated. In the substrate inspection device and inspection method according to the above-mentioned means, the specific configuration for detecting the indentation level is to perform indentation level measurement in accordance with the standard deviation of the image brightness of the image data in the inspection field. Consider the binarized image data of the image brightness of the aforementioned image data, and detect the indentation according to the area and shape of the white or black part. The structure is such that the individual sum values are compared by using separate or combined data. It is possible to determine the packaging state of the aforementioned IC chip. In the case where a flexible substrate is used instead of IC, the same method as described above can be used. (Effects of the invention) With the above configuration, the present invention can inspect the IC chip packaging state in a short period of time based on objective criteria. [Embodiment] FIGS. 1 to 9 show a substrate inspection apparatus according to an embodiment. The substrate inspection apparatus of this form is a panel electrode 4 on a glass substrate 1 and stores an anisotropic conductive material 3 containing conductive particles 6 in an overlapping manner. The wafer electrode 5 on the IC wafer 2 provided with the sheet 2 exerts conductivity by crimping the substrate 1C wafer 2 'to the bump 7 on the wafer electrode 5 of the 1C wafer 2 and the anisotropic conductive material 3, At the same time, an indentation 8 is generated on the aforementioned electrode 4, and the number of inspections before the field of view is taken out by the aforementioned anisotropic guide 312 / Invention Specification (Supplement) / 93-09 / 93118200 of the indentation 8 The trace number of the reference wafer should be. Substrate implementation: 1C crystal 1 and compressed panel electrical material 9 200528734 Conductivity of material 3 'Panel electrode 4 connects to the aforementioned wafer electrode 5' Measures the indentation level and pressure of the indentation 8 formed on the panel electrode 4 The number of traces determines the packaging state of the liquid crystal drive substrate M in which the IC wafer 2 is packaged on the transparent substrate 1 and the IC wafer 2 in the glass substrate 1. Here, the indentation level means that when the IC wafer 2 is mounted on the glass substrate 1, the surface of the panel electrode 4 is pressed by the bumps 7 and the conductive particles 6, etc., and the surface is deformed into a concave height, and the An indicator of how the deformation is evenly distributed within a certain range to evaluate the formation of the indentation 8. It should be noted that the number of indentations is the number of deformations shown in the concave shape. The structure of the device, as shown in Figure 2, can move freely in the X and Y axis directions, can be raised and lowered freely in the Z axis direction, or on the work stage W on the 0 axis in the X-Z plane. The liquid crystal driving substrate M is placed on the inside and placed on it. The Z axis is used to adjust the focus, and the 0 axis is used to adjust the scanning direction of the camera. The operation of the aforementioned table W, which is controlled by the CPU 16 by the input / output board 14 and the control panel 15 and the differential of the CC camera 12 arranged in the upper part, interferes with the interference microscope 10 and faces the liquid crystal drive substrate M. The substrate M is sucked and placed on a workbench W shown in FIG. 6. The workbench W has a structure corresponding to substrates of various sizes. It can mount a plurality of the substrates M by coordinate management of the placement place. . C P U 16 uses two personal computers for mechanical control and image processing. Each is processed in parallel to achieve high-speed processing. The differential interference microscope 10 is a light source for self-illumination 11 receiving light, as shown by arrow a in FIG. 3, and obtaining shading image data from the aforementioned glass substrate 1, 10 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 The image data is transmitted to the image processing board 13 by the high-resolution CCD camera 12. The image data is stored in C P U 1 6 and is displayed on a suitable day. In addition, the illumination 11 may be irradiated from the direction of the arrow a and the direction from the packaging surface of the glass substrate 1 shown by the arrow b, and the illumination 11 from the direction of the arrow a may be irradiated to prevent the substrate 1 from being irradiated. The projections and depressions of the upper panel electrode 4 generate an image, so it is preferable to illuminate with coaxial light. Further, in order to clearly grasp the change in brightness of the unevenness of the indentation 8 of the delicate metal deformation, the microscope 10 must be a differential interference microscope. The obtained light and shade image data can be subjected to image processing according to its purpose in the CPU 16 and the like, and then the various indentation levels and the number of indentations described above are detected through the processing process shown below. The reference value of the mark level and the number of indentations, or the reference value of the combination of the mark level and the number of indentations is compared to determine the packaging state of the IC chip 2 on the glass substrate 1. Hereinafter, the inspection process in the device will be described using the flowchart of FIG. 1. (Acquisition and Differentiation of Image Data) The shaded image data (step 21) of the glass substrate 1 obtained from the microscope 10 and the CC camera 12 are differentiated by the CPU 16 (step 22). Here, the so-called differential processing refers to the gradation of the brightness change in the continuous part of the light and shade image, and emphasizes the discontinuous part of the brightness, and indicates the realm of the significant part of the brightness change. This is its characteristic. By differential processing, for example, the shaded image of the substrate 1 shown in Fig. 7 can be changed to the differentiated image shown in Fig. 8. Figures 7 and 8 are portraits showing the images shown in 11 312 / Explanation of the Invention (Supplement) / 93-09 / 93118200 200528734, which have a different color tone from the real image shown on the daytime surface. In the gradation image in FIG. 7, generally speaking, the pattern portion P of the panel electrode 4 existing in the figure is a gray tone and the non-pattern portion Q is black. At this time, the indentation 8 protruding inwardly on the panel electrode 4 will have a thicker color than the surroundings, and the density will be more intense when the height of the bump is higher. The differential image in FIG. 8 is the discontinuous part of the brightness level of the image in the shaded image in FIG. 7, which is only in the boundary between the indentation 8 and the aforementioned pattern portion P, and the boundary between the pattern portion P and the unpatterned portion Q. Appears white. At this time, the indentation 8 exhibits a higher white color as the above-mentioned protruding height becomes higher. Here, the differentiation process of the aforementioned image is not performed. Although the following indentation levels can be detected in a normal shade image, if the above-mentioned differentiation process is performed on the image data, the brightness level is emphasized. Therefore, it is easy to evaluate the difference in brightness on the substrate 1, and it is easy to determine the subsequent indentation level, which is preferable. In addition, in order to emphasize the image processing method of the change in brightness, a well-known edge detection processing method may be used in addition to the differential processing, and other methods may be used such as a differential processing. (Specification of Matching and Inspection Areas) In the aforementioned shading image data, the bump area is positioned with respect to the master data of the glass substrate 1 (step 2 3), and the inspection area is specified in accordance with the positioned bump area (step 2 4). The main data of the substrate 1 is the pattern data and the position information of the IC wafer 2 or the bump 7 by designing the drawing surface, and the masked image is created using this information. 12 312 / Invention Manual (Supplement) / 93-09 / 93118200 200528734 This masked image has a masking portion that can be selected according to the set field, and then it is superimposed on the image data so that it only shows the unmasked portion Image data has this function. The masked image is superimposed on the acquired image data of the substrate 1 and at the same time, the edges of the panel electrodes 4 matching the two images are matched on the image, and the main data in the masked image is positioned on the image data. By positioning, as shown in FIG. 4, in the aforementioned image data, the non-patterned part Q, the patterned part P, and the bump collar k on the design of the panel electrode 4 can be accurately specified. For example, in the bump area A, When the indentation position is on time, the masking image shown in FIG. 5 is created by using the aforementioned main data. The mask image is superimposed on the aforementioned image data. In the figure, only the image in the bump area A shown by the chain line is shown. This key line is based on the bump area A in the design of the aforementioned main data, and it indicates that there is no pattern. The realm of the part Q and the pattern part P. In the bump area A shown, the bump area A connected to one of the electrodes 4 and 5 is regarded as one inspection area C, and the inspection area C can be divided into any number and shape according to necessity. Into fine areas D. For example, in the inspection area C1 shown in FIG. 4, as shown in the figure, the dividing line B is divided vertically and horizontally into two subdivision areas. On the other hand, when inspecting the area outside the bump area A, it is created Only the masked image of the convex area A is masked, and by the same operation as above, only the images other than the convex area A are shown. (The indentation level is detected by the standard deviation) The aforementioned bump area A is specified in the inspection area (step 2 4), and the above-mentioned micro domain 312 / Invention specification (Supplement) / 93-09 / 93118200 Part 5 should be used. The number of lines 0 and the number D of each other are fine. Block Block Min 13 200528734 The standard deviation of the image brightness of the image data to detect the indentation level of the inspection area c (step 25). The index of the standard deviation of the indentation level detection is used because the number of indentations 8 and the strength of each factor can be summed up in a certain area, and the indentation level can be objectively evaluated in various fields. In the calculation of this standard deviation, when the inspection area C is divided into the aforementioned subdivision area D for evaluation in the aforementioned bump area A, the indentation level is the same as that in the undivided evaluation. It will be different. In the differential image shown in FIG. 8, the indentation 8 is that, as shown in the figure, a collection of white particles as described above will appear near the aforementioned bump area A on the panel electrode 4. Fig. 4 is a pattern diagram showing the vicinity of the bump area A in Fig. 8; For example, in the inspection area C1 shown in FIG. 4, C1 is divided into four subdivision areas D: a, b, c, and d. All a, b, c, and d are evaluated as the inspection area C and compared with the evaluation of the respective subdivided area D subdivided into 4 divisions. Here, the inspection area C 2 is assumed to be an area having the number and strength of the indentations 8 having the same standard deviation as the aforementioned area C 1. As shown in the figure, when the inspection area C1 is divided into the aforementioned four subdivision areas D, the numerical values of the standard deviations of the respective subdivision areas D of a, b, c, and d clearly show the values of the subdivision areas D. The deviation in the figure is particularly low in the subdivided area of b with a small number of indentations. On the other hand, because the values of the standard deviation values of the aforementioned subdivided area D are mutually offset when undivided, the evaluation in the inspection area C1 becomes the same indentation level as the inspection area C2. 14 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 In this way, by dividing the inspection area C, the deviation of the distribution of the indentation 8 in the inspection area c can be correctly evaluated. Moreover, if this segmentation is too fine, the deviation of each value of the aforementioned subdivided area D will be excessively displayed, and it will become difficult to objectively evaluate the quality of the indentation level of the entire inspection area C. When inspecting the substrate 1 in this embodiment, in order to easily evaluate the indentation level, an evaluation method is adopted in which one inspection area C is divided into two divisions on the upper, lower, left, and right sides, and the total is divided into four divisions. The conditions for dividing this inspection area C into each of the subdivided areas D can be set freely. Therefore, the number and shape of the subdivided areas D can be changed according to the characteristics of the required indentation 8. In addition, by confirming whether the value of the standard deviation is within the reference value, it is possible to determine whether the indentation level of each inspection area C is good or not. For example, when this value is too low, it is judged that the indentation is too weak or the number of indentations is insufficient for some reason, and when this value is too high, it is judged that foreign matter is mixed in the bump area A, etc. And there are abnormal indentations8. In addition, the brightness of the image data from the source of these evaluations will change the focus matching status of the substrate 1 with the microscope 10. The relationship between the focus and the brightness is that the brightness becomes the maximum when the focus is consistent, and the brightness is the maximum when the focus deviates. The brightness tends to decrease. Therefore, the values of the aforementioned standard deviations of the substrates 1 having inconsistent focal points have lower values than the values of the standard deviations of the standard indentations 8 formed. Therefore, when compared with the standard values, in the foregoing steps, In 2 1, the substrate 1 from which the image cannot be obtained smoothly can be extracted. (Number of indentations detected by binarized data) 15 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 Secondly, the same bump area A is specified in the inspection area C (step 2 4), and then the aforementioned differential is made. The binarized data of the image brightness of the image data (step 26). In the binarized data, the number of indentations in the inspection area C is calculated from the white area in the inspection area and the shape of the white portion. The index of the number of indentations is used because the number of indentations in each area can be grasped by the number of indentations 8 in a certain field. In addition to the above-mentioned standard deviation index evaluation, the reliability of the conduction can be objectively evaluated. In addition, by confirming that the calculated number of indentations is equal to or higher than the reference value, it is possible to determine whether the package state of the IC chip 2 is good or not. However, when determining the indentation level, when one inspection area C is divided into subdivided areas D, for example, even if there is an area D with insufficient indentation number, as long as the entire inspection area C including the area D has its standard deviation, When the evaluation of the index is above a certain level, it may be determined that the conduction in the field C can be fully ensured. However, even if there is no problem in the evaluation of the standard deviation of the entire inspection area C, as long as there are a plurality of sub-areas D with insufficient indentation in one inspection area C, the probability of poor conduction will increase. Therefore, the evaluation of the indentation level of the aforementioned standard deviation and the evaluation of the number of indentations of the binarized data are combined and implemented, and the number of indentations of each of the aforementioned subdivided areas D can be set to be not lower than the reference value. At the same time, the upper limit of the number of subdivision areas D that cannot exceed the number of subdivision areas D within one inspection area C can be set. According to this configuration, the number of indentations in each of the subdivided areas D can be grasped, and at the same time, the indentation of the entire inspection area C including the subdivided area D can be grasped. 16 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 The indentation level such as the number, the standard deviation, and the like are evaluated. Therefore, whether the conduction performance of the package portion of the IC chip 2 is good or not can be evaluated on a more detailed basis. In addition to this example, it is also possible to use a combination of indicators for the evaluation of multiple indentation levels, compare these data with the benchmark value combined according to the indicator, and then comprehensively evaluate the IC chip according to multiple indicators 2 Its package status. Of course, each item can be individually checked and evaluated as necessary. In addition, although the limit values used in the above-mentioned binarization processing can be freely set, it is also possible to automatically set the limit value for the evaluation of the number of indentations by measuring the differential level of the image in each area. With this configuration, it is possible to easily perform a binarization process regardless of the brightness of the image due to the different characteristics of the indentation 8. (Detection of Foreign Matter Contamination) Next, in the inspection area C, the area other than the bump area A is specified (step 28). The aforementioned binary data is detected by the presence or absence of a white portion outside the bump area A, and it is determined to exist. An indentation 8 that is off-set outside the bump area A or an indentation 8 in which a foreign substance is mixed. (Pattern flaws, pattern burns, pattern cracks) In addition to the steps shown in FIG. 1, the defective pattern flaws, pattern burns, pattern cracks, etc. of the substrate 1 can be detected by the same method as the detection of the foreign matter incorporation. . In such a situation, in the aforementioned differential interference microscope 10, since all the image data show a change in image brightness, it is possible to determine whether there is a defect or a category by evaluating the image brightness for each inspection area. 17 312 / Invention Manual (Supplement) / 93-09 / 93118200 200528734 (wafer misalignment) In addition to the steps shown in Fig. 1, the same image data is used to indicate the detection of each grain of 8 groups of indentations. Among the coordinates, the deviation of the package position of the IC chip 2 can be detected by detecting the coordinates of the center of the 8 groups of indentations. To find the center coordinates of the 8 groups of indentations, among the indentations existing in the inspection area, specify the indentations 8 located at the upper, lower, left, and right ends, and then borrow the indentations 8 of the upper, lower, left, and right ends. Coordinates, calculate the center coordinates. Compare this center coordinate with the theoretical center coordinate of the bump field A in the aforementioned master data, find the distance between the two sides, and compare this distance with the reference value to determine the goodness of the IC chip 2 package position. The substrate inspection apparatus of the above embodiment can detect various functions of the indentation level and the number of indentations shown above by appropriate combinations, and select inspection items and determine the packaging state of the IC chip 2 according to the purpose. If the function table of the device is set in advance, all inspections and judgments can be performed automatically at one time, so it can quickly and objectively check the packaging status of the IC chip 2. The substrate to be inspected can be applied to a form having a transparent substrate in addition to the aforementioned COG of the glass substrate 1. Moreover, in this inspection device, the inspection object is not limited to the inspection object in which the IC chip 2 is packaged on a transparent substrate, and a flexible substrate may be used as the inspection object. An inspection method and an operation procedure using the substrate inspection apparatus will be described below with reference to FIG. 9. In order to maintain the data of the inspection result, the inspecting operator first enters a code that distinguishes the operator of the device from the operator of the manager and starts the device (step 17a). 18 3 12 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 Secondly, after entering the name, password, management level, etc. of the operator who is engaged in the inspection, register the master data of the IC substrate, etc. of the substrate to be inspected, the Model information and inspection schedule (step 17 b). The master data includes information such as the type of the wafer and the position of the bumps. The information on the model of the substrate includes the type of package parts necessary for each model, the location information of the pattern and chip, and the type of A C F. The inspection schedule is to register the inspection schedule of each packaged part in the registered model. This inspection schedule can be freely selected from each step and set. From step 18, when manual operation is started, adjustment work or teaching can be performed in various inspection agencies, and content verification can be confirmed for each start and step, and parameters can be adjusted and the optical system can be adjusted. Check etc. When manual operation is started from step 19, a series of inspections can be performed automatically along the inspection schedule, and the inspection results can be automatically saved. This inspection result, quality information, and operating conditions are output in step 20, and the inspection can be ended. [Brief Description of the Drawings] Fig. 1 shows a detailed flowchart of the inspection processing performed by the substrate inspection device of an embodiment. FIG. 2 is an explanatory diagram showing the configuration of the apparatus of this embodiment. Fig. 3 is an explanatory view showing a cross section of the apparatus of this embodiment. FIG. 4 is a schematic view showing a state of formation of an indentation. FIG. 5 is an explanatory diagram showing an inspection area in FIG. 4. Fig. 6 is an explanatory view showing a state of placing a substrate during inspection in the embodiment. 19 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 FIG. 7 is a schematic diagram showing an example of the shading image data. FIG. 8 is a schematic diagram showing the differential image data of FIG. 7. FIG. 9 is an explanatory diagram showing the structure of a program according to the embodiment. FIG. 10 is a perspective view showing an example of a liquid crystal driving substrate. FIG. 11 is a cross-sectional view illustrating the packaging state of the IC chip. (Description of element symbols) 1 transparent substrate (glass substrate) 2 IC crystal sheet 3 anisotropic conductive material 4 panel electrode 5 wafer electrode 6 conductive particles 7 bump 7a bump surface 8 indentation 10 differential interference microscope 11 Zhaoming 12 CCD Photography 'Machine 13 Image Processing Board 14 Rare Cut-in Board 15 Control Board 16 CPU A Bump Area B Subdivision Line 312 / Invention Manual (Supplement) / 93-09 / 93118200

20 200528734 C 檢查領域 D 檢查細分領域 Μ 液晶驅動基板 Ρ 圖案部 Q 無圖案部 W 工作台20 200528734 C Inspection area D Inspection subdivision area Μ LCD driver substrate P Pattern section Q Unpatterned section W Table

312/發明說明書(補件)/93-09/931182〇0312 / Invention Specification (Supplement) / 93-09 / 931182〇0

Claims (1)

200528734 拾、申請專利範圍: 1 . 一種基板檢查裝置,在透明基板1上的面板電極4, 介存含有導電粒子6之異向性導電材料3,使IC晶片2將 其I C晶片2上之晶片電極5重疊載置於前述面板電極4, 藉壓接前述基板1和IC晶片2,以前述IC晶片2的晶片 電極5上之凸塊7壓縮前述異向性導電材料3而發揮導電 性,同時,在前述面板電極4生出壓痕8,藉該壓痕8部 份的前述異向性導電材料3之導電性,而在面板電極4上 接續上述晶片電極5,並檢查在前述透明基板1封裝I C晶 片2之基板1的前述IC晶片2之封裝狀態,如此的基板檢 查裝置,其特徵為, 藉微分干涉顯微鏡1 0取得自前述基板1裏面的前述I C 晶片2之封裝部份的影像數據,在前述影像數據中特定檢 查領域C,依照前述檢查領域C内的影像亮度,檢測出形 成在面板電極4的壓痕8之壓痕位準或壓痕數目,再將該 壓痕位準或壓痕數目和基準值比較而判定前述 I C晶片 2 之封裝狀態。 2 .如申請專利範圍第1項之基板檢查裝置,其中,前述 影像數據為將濃淡影像數據予以邊緣檢測處理。 3.如申請專利範圍第1或2項之基板檢查裝置,其中, 前述檢查領域C之特定是在前述影像數據匹配基板1的主 數據,對前述凸塊7位置的凸塊領域A予以定位,再依照 該定位之凸塊領域A特定檢查領域C,而對該檢查領域C 可自由地分割。 22 312/發明說明書(補件)/93-09/93118200 200528734 4. 如申請專利範圍第 1至 3 項中任一項之基板檢 置,其中,前述壓痕位準之檢測為依照前述檢查領域 的前述影像數據之影像亮度的標準偏差來實施。 5. 如申請專利範圍第 1至 3項中任一項之基板檢 置,其中,前述壓痕數之檢測為藉前述檢查領域C内 述影像數據的影像亮度之二值化影像數據,依照該白 色部份的面積和形狀來實施。 6. 如申請專利範圍第 1至 5 項中任一項之基板檢 置,其中,前述壓痕位準和壓痕數目之檢測被一起實 且將各別檢測出之壓痕位準和壓痕數目的組合與基準 較,而判定前述I C晶片2之封裝狀態。 7. 如申請專利範圍第 1至 6項中任一項之基板檢 置,其中,取代前述I C晶片2而使用可撓性基板以檢 述透明基板1上的面板電極4及可撓性基板的電極之 狀態。 8. —種基板檢查方法,在透明基板 1上的面板電極 介存含有導電粒子6之異向性導電材料3使I C晶片2 1C晶片2上之晶片電極5’重豐載置於前述面板電極 藉壓接前述基板1和1C晶片2’以前述1C晶片2的 電極5上之凸塊7壓縮前述異向性導電材料3而發揮 性,同時,在前述面板電極4生出壓痕8,藉該壓痕 份的前述異向性導電材料3之導電性,而在面板電極 續上述晶片電極5,並檢查在前述透明基板1封裝1C 2之基板1的前述I C晶片2之封裝狀態,如此的基板 312/發明說明書(補件)/93-09/93118200 查裝 C内 查裝 之前 或黑 查裝 施, 值比 查裝 查前 接續 4, 將其 4, 晶片 導電 8部 4接 晶片 檢查 23 200528734 方法,其特徵為, 藉微分干涉顯微鏡1 0取得自前述基板1裏面的前述I C 晶片2之封裝部份的影像數據,在前述影像數據中特定檢 查領域C,依照前述檢查領域C内的影像亮度,檢測出形 成在面板電極4的壓痕8之壓痕位準及壓痕數目,或其中 的任一者,再將該壓痕位準及壓痕數目或其中的任一者與 基準值比較,而判定前述I C晶片2之封裝狀態。 9 .如申請專利範圍第8項之基板檢查方法,其中,取代 前述IC晶片 2而使用可撓性基板以檢查前述透明基板1 上的面板電極4及可撓性基板之電極的接續狀態。 24 312/發明說明書(補件)/93-09/93118200200528734 Patent application scope: 1. A substrate inspection device, an anisotropic conductive material 3 containing conductive particles 6 is interposed on a panel electrode 4 on a transparent substrate 1, so that an IC chip 2 places a wafer on the IC chip 2 The electrode 5 is placed on the panel electrode 4 in an overlapping manner. The substrate 1 and the IC wafer 2 are crimped, and the bump 7 on the wafer electrode 5 of the IC wafer 2 is used to compress the anisotropic conductive material 3 to exert electrical conductivity. An indentation 8 is generated on the panel electrode 4. Based on the conductivity of the anisotropic conductive material 3 in the indentation 8, the wafer electrode 5 is connected to the panel electrode 4, and the package on the transparent substrate 1 is checked. The package state of the aforementioned IC wafer 2 of the substrate 1 of the IC wafer 2 is such a substrate inspection device that the image data of the packaged portion of the aforementioned IC wafer 2 in the aforementioned substrate 1 is obtained by a differential interference microscope 10, The inspection area C is specified in the aforementioned image data, and the indentation level or the number of indentations formed on the indentation 8 of the panel electrode 4 is detected according to the image brightness in the aforementioned inspection area C, and then the indentation level or indentation is detected. The number of marks is compared with a reference value to determine the packaging state of the IC chip 2 described above. 2. The substrate inspection device according to item 1 of the scope of patent application, wherein the aforementioned image data is an edge detection process for the gradation image data. 3. The substrate inspection device according to item 1 or 2 of the patent application scope, wherein the specificity of the inspection area C is to locate the bump area A of the bump 7 at the position where the image data matches the master data of the substrate 1, Then, the inspection area C is specified according to the positioned bump area A, and the inspection area C can be divided freely. 22 312 / Invention Specification (Supplement) / 93-09 / 93118200 200528734 4. For the substrate inspection of any of the items 1 to 3 of the patent application scope, in which the detection of the aforementioned indentation level is in accordance with the aforementioned inspection field The standard deviation of the image brightness of the aforementioned image data is implemented. 5. For the substrate inspection according to any one of the items 1 to 3 of the patent application scope, wherein the detection of the indentation number is the binarized image data obtained by borrowing the image brightness of the image data in the inspection area C described above, according to the The area and shape of the white part are implemented. 6. For substrate inspection according to any one of claims 1 to 5, in which the aforementioned indentation level and the number of indentation detections are performed together and the separately detected indentation levels and indentations are detected together. The number of combinations is compared with a reference, and the packaging state of the aforementioned IC chip 2 is determined. 7. The substrate inspection according to any one of the claims 1 to 6, wherein a flexible substrate is used instead of the aforementioned IC wafer 2 to inspect the panel electrodes 4 and the flexible substrate on the transparent substrate 1. The state of the electrodes. 8. A substrate inspection method in which an anisotropic conductive material 3 containing conductive particles 6 is interposed on a panel electrode on a transparent substrate 1 so that the wafer electrode 5 'on the IC wafer 2 1C wafer 2 is heavily loaded on the aforementioned panel electrode By pressing the substrate 1 and the 1C wafer 2 ′, the bumps 7 on the electrode 5 of the 1C wafer 2 are used to compress the anisotropic conductive material 3 to exert the function. At the same time, an indentation 8 is generated on the panel electrode 4. Indentation of the conductivity of the aforementioned anisotropic conductive material 3, and the above-mentioned wafer electrode 5 is continued on the panel electrode, and the packaging state of the IC chip 2 of the substrate 1 packaged on the transparent substrate 1 1C 2 is checked. Such a substrate 312 / Invention Manual (Supplement) / 93-09 / 93118200 Before checking or installing in C, check the value, then continue to 4 before checking and checking, conduct 4, and conduct 8 wafers, and then check the wafer 23 200528734 The method is characterized in that image data of a package portion of the IC chip 2 in the substrate 1 is obtained by a differential interference microscope 10, and an inspection area C is specified in the aforementioned image data, and the brightness of the image in the inspection area C is determined according to the image data. , Measuring the indentation level and the number of indentations formed on the indentation 8 of the panel electrode 4, or any one of them, and comparing the indentation level and the number of indentations or any of them with a reference value, Then, the packaging state of the IC chip 2 is determined. 9. The substrate inspection method according to item 8 of the scope of patent application, wherein a flexible substrate is used instead of the IC chip 2 to check the connection state of the panel electrode 4 and the electrode of the flexible substrate on the transparent substrate 1. 24 312 / Invention Specification (Supplement) / 93-09 / 93118200
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