SU762150A1 - Pulse shaper - Google Patents

Description

The invention relates to a pulse technique, can be used in automation devices and pulse technology.

A device for generating pulses is known, which contains a CZ-trigger, an AND — NOT element, integrating and differentiating circuits [1].

This device does not generate output pulses when power is applied.

The closest to the technical nature of this invention is a pulse shaper, containing a short-trigger and two elements AND — NOT [2].

However, the known driver also does not generate an output pulse when the supply voltage is applied.

The aim of the invention is to enhance the functionality of the pulse shaper.

This goal is achieved by the fact that the pulse driver contains a short-circuit trigger, one input of which is connected to the output of the output element AND — NOT and with one of the inputs of the input element AND — HE, the output of which is connected to the second input of the short-circuit trigger whose output is connected with one of the inputs of the output element AND - NOT, the element is entered AND - NOT, parallel to the KS circuit and the inverter, the output of which is 20

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not with the output of the input element AND — NOT, and the output with one of the inputs of the element AND — NOT, the second input of which is connected to one output parallel to the KS circuit, the second output of which is connected to the common bus, and the output of the element AND — NOT connected to the second input output element AND — NOT.

The drawing shows the functional diagram of the pulse shaper.

The pulse shaper consists of an input element AND — NOT 1, an output element AND — HE 2, a short-circuit trigger 3, an inverter 4, an element AND — HE 5 and a parallel KS circuit 6.

The output of the input element AND — NOT 1, connected by its inputs to the input and output of the pulse driver, is connected to the zero input of the trigger 3 and the input of inverter 4. the input of the output element AND — NOT 2, the first input of which is connected to the output of the element AND — NOT 5.

The second input element AND — HE .5 is connected to one output of a parallel KS circuit 6, the second output of which is connected to the common power supply bus, and the first

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input element AND — NOT 5 is connected to the output of inverter 4.

The pulse shaper operates as follows.

In the absence of supply voltage, the capacitor of the parallel KS circuit 6 is discharged. When the supply voltage is applied at the second input of the I-NOT 5 element, there will be a low signal level determined by the charge time of the capacitor parallel to the KS circuit 6 due to the outgoing current of the first input of the I-HE 5 element, and at its output and, therefore, the first input of the output element And - NOT 2 will be a high level signal.

At the second input of the output element AND — NOT 2 there will also be a high level signal coming from the zero output of the Κδ-trigger 3. At the output of the output element AND — NOT 2, a low signal level is obtained, which, arriving at the single input of the short-trigger 3, sets it in a single state.

At the zero output of the short-circuit trigger 3, after a lag time equal to the time of changing its state, a low level signal appears, which arrives at the second input of the output element AND —NE 2, and a high level signal is set at its output.

Thus, at the output of the pulse shaper when a supply voltage is applied, a signal is generated, the duration of which is determined by the response time of the output element AND — HE 2 and short-circuit trigger 3. After the formation of the pulse and the charge of the capacitor parallel to the KS circuit 6 are completed, both inputs NOT 1 will be high levels of signals, and at its output - a low level signal. This signal is fed to the input of the inverter 4 and to the zero input of K3 Trigger 3, setting it to the zero state. The removed high level signal from the zero output of the CK-flip-flop 3 is fed to the second input of the output element AND — NOT 2. At the first input of the element AND — NOT 5 comes from inverter 4 a high level signal. Since the second input of the AND-NOT 5 element also has a high signal level, then its output will be a low-level signal. This signal, acting on the first input of the output element AND — HE 2, sets a high-level signal at its output.

When the input signal of the low level input signal arrives at the input of the shaper, the output signal of the input element I— NOT 1 will be a high level signal, which through the inverter 4 enters the first

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input element AND — NOT 5, from the output of which a high level signal is taken.

Thus, at the inputs of the output element AND — NOT 2 there will be high level signals, and at its output - a low level signal.

This signal, acting on a single input of the CK-flip-flop 3, sets it in a single state. From the zero output of the short-circuit trigger 3, the low level signal is fed to the second input of the output element AND — HE 2, setting a high level signal at its output. Regardless of the duration of the input signal at the output of the pulse shaper, a low level signal is obtained with a duration equal to the response time of the short-circuit trigger and the output element AND — HE 2.

The technical and economic effect of this technical solution is due to the combination of the functions of the formation of pulses at the output both when the supply voltage is turned on and when low-level signals arrive at the input of the pulse shaper.

The pulse shaper performs these two functions while reducing the number of elements by 30%, which simultaneously leads to a reduction in the volume of installation work; increases the reliability of the device as a whole.

Claims (1)

Claim Pulse generator containing a short-circuit trigger, one input of which is connected to the output of the output element AND — NOT and one of the inputs of the input element AND — NOT, the output of which is connected to the second input of the short-trigger, the output of which is connected to one of the inputs of the output element - NOT, characterized in that, in order to expand the functionality, an AND — NOT element is introduced into it, a parallel KS circuit and an inverter, whose input is connected to the output of the AND-NOT input element, and the output is connected to one of the inputs of the AND-element NOT whose second input is connected to one output parallel to the KS circuit, the second output of which is connected to the common bus, and the output of the element AND — NOT connected to the second input of the output element — AND — NOT.