SU1305869A1 - Binary code-to-binary-coded decimal code converter - Google Patents

Abstract

The invention relates to automation and computing and can be used in the construction of transducers in measuring and control systems. The purpose of the invention is to expand the class of tasks to be accomplished due to the possibility of obtaining a binary-decimal code of angular units in the range of ± 180 ° & and speeding up. The goal is achieved by the fact that the elements NOT 12 and 13, the elements AND, and the elements II are entered into the converter containing the pulse generator 1, the adder 6, the register 7, the decoder 5, the binary counter 3, the binary-decimal counter 10 and two elements 2 and 9. 14 and 15, elements ZI 16 and 17 with corresponding connections. 1 yl. about ate 00 O5 with P

Description

The invention relates to automation and computing and can be used in the construction of transducers in measuring and control systems.

The aim of the invention is to expand the class of tasks to be solved by the possibility of obtaining a binary-decimal code of angular units in the range

The expansion of the function; 1; ionic possibilities is achieved due to the fact that, if necessary, at the output of the converter of the binary-decimal code of angular units, in the range of ± 180 °, a binary counter in the range of 0-180 ° (the highest bit of the binary code of the angle o) runs on subtraction, and in the range of O - minus 180 (, N

+ 180 ° and increase its speed, on addition. In this case, the binary output of the drawing shows the functional diagram of the proposed converter, the converter contains a pulse generator 1, element 2, binary counter 3, information input 4, decoder 5, adder 6, register 7, input b of a given constant, element 9, binary decimal counter 10 (angle units), output 11, elements NOT 12 and 13, element AND 14 and 15, elements ZI 20, 16 and 17, element OR 18, mode selection input 19 and sign output 20,

Pulse generator 1 generates

a continuous sequence of pulses, which is passed by the AND 2 element to the first inputs of the AND 14 element, the ZI elements 16 and 17, the second input of the AND 9 element and the clock input register 7 until the decoder 5 detects the zero state of the counter 3, closed in the ring adder 6 and the register 7 are incandescent, - a wow adder, which for a clock pulse adds a constant C to the number written in register 8, formed at the input 8, the single signal that occurs at the overflow output of the adder 6 permits the passage of a pulse in via the AND gate 9 to the count input of summing the binary coded decimal counter Yu Schechik 10 consists of decades and sekstad, and its structure is determined by the angular units in the view of exit 11,

With a single value of the signal at the input mode selection input 19, the pulses from the output of the element AND 2 pass through the element 14 and the element OR 18 to the subtractive input of the binary counter 3, When the signal at input 19 is zero, the pulses from the output of the element 2 pass either to the subtracting the input of counter 3 (through the element ZI 16 and the element OR 18 with a zero value of the signal at the input of the inverter 13), or to the summing input of the counter 3 (through the element ZI 17 with a single value of the signal at the input of the inverter 13)

The expansion of the function; 1; ionic possibilities is achieved due to the fact that, if necessary, at the output of the converter of the binary-decimal code of angular units, in the range of ± 180 °, a binary counter in the range of 0-180 ° (the highest bit of the binary code of the angle o) runs on subtraction, and in the range of O - minus 180 (, N

0

five

0

five

0

five

an analog-decimal counter forms the code of angular units within 0-180, and the code's sign is determined by the value of the high bit N of the binary angle code. At the same time, the maximum number of operating cycles of the converter is reduced, which increases its speed.

The Converter operates as follows.

At the beginning of the conversion cycle, binary number 3 is written, the converted number N in the additional code arriving at input 4, and the register 7 and the binary-decimal counter 10 are reset. After writing to the binary number 3, the N decoder 5 permits the generator 1 pulses to pass through element 2, These pulses arrive at the clock input of the register 7 and the second input of the element 9, regardless of the value of the signal at the input 19 of the mode selection. With a single value of the signal at input 19 and 1-1, the pulses of generator 1 are passed to the subtracting input of binary counter 3, reducing the number written to it. After: the passage of the N-ro pulse, the binary counter 3 goes to zero x: the stop and the decoder 5 prohibits the further passage of the pulses through e, dement And 2.

The number of pulses K that have passed through the element I 9 to the input of the binary-decimal counter 1 is relative to the number of cycles in which a single value is generated at the output of the overflow of the adder 6

50

K s / 2 - D / 2

(one)

where m

D

the number of duplicates, the bit bits of the adder 6, and register 7; the number recorded in register 7 after: N-ro tact.

In order for the converter to not have an incident error, the value of the constant. C is selected from the condition

31305869

value 4 at maximum convertible angle

what the in in (2)

Q

CP, 2

(mn)

n is the number of bits of the binary counter 3;

the number of states of the binary-decimal counter is 10.

Thus, at the end of the conversion cycle, with a single value of the signal at input 19, a binary-decimal code of angular units in the range of 0m is generated at output 11

The maximum number of workers so 2. This mode of operation is iden

Zo Comrade N is typical of the prototype.

When the signal at input 10 is zero, the generator 1 pulses are passed to the subtracting input of binary counter 3, and when N 1 to the summing input, respectively, decreasing or increasing the number written to it. After passing the N-ro (N (, O) or (2 - N) -ro (NO I) pulse, the counter 3 goes to the zero state and the decoder 5 prohibits further passage of the pulses through the element 2, At the same time, in KO the conversion cycle Output 1, taking into account formulas (1) and (2), forms the code of angular units within 0-180, i.e., the additional code is converted into direct. The code sign is determined by the value NJJ passing through AND 15 on the output 20 of the Converter, and the maximum number of work cycles is equal to

Nm

 / 2.

ABOUT)

Claims (1)

Invention Formula A binary-to-binary converter that contains a binary counter, whose information input is the information input of the converter, and the output Editor A. Shandor Compiled by B. Kudr seam Tehred V. Kadar Order 1466/56 Circulation 902 Subscription VNISHI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4. - 20 25 Jq d through the decoder is connected to the first input of the first element H, the second input of which is connected to the output of the pulse generator, a binary-dec with a primary counter, the output of which is the output of the converter, and the input connected to the output of the second element And, the first and second inputs of which are connected to the output The first AND element and the overflow output of the adder, respectively, the bit output of which is connected to the information input of the register, the clock input and the output of which are connected to the output of the first AND element and the first input of the accumulator correspondingly, the second input of which is connected to the input of the assignment of a constant of the diverter, characterized in that, in order to expand the class of the solved problems due to the possibility of obtaining a binary-decimal code of angular units in the range of ± 180 and increasing its speed, two elements are introduced into the converter NOT, the third and fourth elements are And, two elements of ZI and the element OR, and the first inputs of the third element And and the first and second elements of ZI are connected to the output of the first element And, and their outputs are connected respectively to the first, second the inputs of the OR element and the input of the binary counter, the input of the subtraction of which is connected to the output of the element OR, the input mode selector of the converter is connected directly to the second input of the third element AND and through the first element NOT to the second inputs of the first and second elements of the ZI and the first input of the fourth element AND whose second input is combined with the third input of the second ZI element and is connected to the information input 45 of the transducer, and through the second element NOT to the third input of the first ZI element, the output of the fourth element I is the sign output of the converter. 35 40 Proofreader L. Pilipenko