SU1297227A1 - Shaft angle-to-digital converter - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used to connect analog information sources with a digital computing device, in particular, in converters of angular and linear movements into code. The purpose of the invention is to increase the accuracy by achieving the fact that a second analog-to-digital converter, three delay lines are inserted into a displacement transducer containing a sine-cosine sensor, an analog-digital converter, accumulating adders, an OR element, a clock generator, a trigger and an AND element. , driver: pulses, decoder and counter. The introduction of a second analog-to-digital converter, which converts electrical voltage into a parallel reverse binary code, the most significant bit of which carries information about the sign of the input voltage together with additional nodes with a pulse counter, the Q delay line allowed to exclude nodes from the converter. low level signals - octant determiner and analog switch. Structural construction of the converter allowed us to proceed to the numerical solution of the system of differential equations by an unconditionally stable difference scheme. 1 ill. (ABOUT PYAG. GO -q th tO.

Description

The invention relates to automation and computer technology and can be used to connect analog information sources with a digital computing device, in particular, in converters of angular movements into code.

  the invention is to improve the accuracy of the conversion.

The drawing shows a block diagram of the converter.

The converter contains sine-cosine angle sensor 1, first 2 and second 3 analog-digital converters, first and second 5 accumulating adders, first 6, second 7 and third 8 delay lines, driver 9 pulses, decoder 10, element IL 11, generator 12 clock pulses, trigger 13, element I 14, counter 15, control input 16 of the converter, bus 17 of the initial installation.

The principle of operation of the converter is based on the numerical solution of a system of differential equations.

Y (t) TX (t) X (t) 4Y (t)

(1) 30

where t is the time

T is a constant, Y (t) and

X (t) are time derivatives of functions Y (t) and X (t).

The initial conditions of the system of equations (1) are given by the following expressions:

Г У (0) Мз1псУ

1X (0) Mcosd,

(2)

where o1 is a quantity proportional to

convertible angle, with the initial conditions given as expression (2) for any value (lying within

ABOUT

The system of equations (1) is equivalent to a second order differential equation

Y (t) + Y (t) O

(3)

The solution to equation (3) is

Y (t) / х ЧО) + Y (O) sin ()

(four)

whence it follows that the smallest positive value of the argument t, at which the function Y (t) changes its sign from minus to plus, satisfies the condition

% -f oL 2Y,

(five)

and consequently

15

t 2-k -dl

 (6)

The delay times 1, respectively, of the first, second and third 20 delay lines must satisfy the following conditions:

, Sdp,

CM 9

0

five

0

where t

limes

t o see

T

the maximum conversion time of the ADC, the maximum time for setting the code in the accumulating adder; period of clock pulses.

The Converter operates as follows.

In the initial state, analog-to-digital converters 2 and 3 are in the ready-to-run state, and the trigger 13 is in the zero state. The logical signal About comes from the output of the trigger 13 to the second input element And 14, prohibiting the passage of pulses from the generator output 12 5 clock pulses to the clock inputs of accumulating adders 4 and 5 and the counter 15 pulses.

The positive front of a smooth 0 and a start-up pulse arriving at the control input of the converter triggers analog-to-digital converters 2 and 3, the outputs of which form parallel inverse 5 binary codes of the output voltage of the sinus-cosine displacement sensor 15 equal respectively

Msin OS and Mcos

31

where cL is a quantity proportional to

displacement and lying within the limits of О and oL 25Г, М - constant coefficient. The positive edge of a rectangular pulse coming from the output of the first delay line 6 to the inputs of the resolution of the initial installation of the first 4 and second 5 accumulators of the adders and counter 15 and mykov in the first 4 and second 5 accumulating adders are recorded codes, respectively, coming from the outputs of the first and second 3 analog-to-digital converters to the inputs of the initial installation of accumulating adders, and in the counter 15 pulses are recorded with a binary code number.

N

where m is a natural constant.

The number code is fed to the input of the initial installation of the counter 15 and fflyas. If, when writing the output code of the first analog-digital converter 2 to the first accumulating adder 4, the logical signal at the high-order output of the first accumulating adder changes from 1 to O, a positive rectangular impulse is generated at the output of the impulse generator 9, which through the OR 1.1 element enters to the second input of the trigger 13, do not change the state of the trigger.

The polynomial front of the pulse coming from the output of the second delay line 7 to the first input of the trigger 13 sets the trigger to one, allowing the passage of pulses from the output of the generator 12 clock pulses through the AND 14 element to the clock input 29 of the second accumulating adder 5, the third input delay lines 8 and the clock input of the counter 15 pulses.

Further operation of the converter is described by a system of difference equations.

 X

Lh-id

J y

2 th-l

 Y

cn-i:

X

Lbl

where yj. and X., - the numbers recorded respectively in the first and second nag dripping adders after entering 972274

Lenin at their clock inputs n pulses (n 1, 2 5 ...),

YT, and X, are numbers written

n-i p-o, respectively, in the first and second us of the accumulating adders after receiving (- - 1) pulses at their clock inputs,

ha is a natural number associated with the constant T, which is included in the equation (1), and the period T of clock pulses by the following relation

m (9)

J5 The positive edge of the pulse coming from the output of the element 14 at the clock input of the second accumulating adder 5, the second accumulating adder records the current 20 value of the variable X equal to the difference between the previous value of the variable X and the particular from dividing the previous value of the variable Y by the number 2. Positive front the output 25 pulse of the third delay line 8, arriving at the clock input of the first accumulating adder 4, to the first accumulating adder is recorded; the current value of the variable, 0 Y, equals It is the sum of the previous value of the variable Y and the quotient of the current value of the variable X by the number 2. The operation of dividing the number represented in the reverse binary 35 code by the number 2 is replaced by the equivalent operation of the code divided by m bits to the right. To this end, the output (L - m) of the higher bits of the second accumulating 0 adders is connected to the input (L - t) of slides of the bits of the first accumulating adder 4, and the inverse output (L - m) of the higher bits of the first accumulating adder 4 (inversion 45 of all bits of the code of the number represented in the reverse binary code changes the sign to the opposite one) is connected to the input (L - m) of the lower bits of the second accumulating sum 50 of the matrix 5.

The clock pulses arrive at the clock inputs of accumulating adders 4 and 5 until the sign of the variable Y changes from minus to plus, i.e. until the value of the high bit of the code written in the first accumulating adder 4 is changed from one to zero. On the negative front of the pulse coming from the high bit output of the first accumulating adder 4. To the pulse shaper 9 input, a short (compared with the period of clock pulses) square positive pulse is formed at the shaper output and through the OR 11 element goes to the second trigger input 13, resetting the trigger to the zero state, which leads to the prohibition of the passage of clock pulses from the generator output 12 clock pulses to the output of the And 14 element. The negative edge of the pulse coming from Exit trigger 13 to control the output transducer, is a signal conversion End.

The number of pulses received during the conversion to the clock input of the counter 15 pulses is equal to

 . ,

T

where t is the conversion time defined by expression (6). Hakim way, N 2G - -

Since during the initial installation the number of NOs determined by the expression (7) was written to the pulse counter 15, and the counter operates in the subtraction mode during the conversion process, after the conversion is completed, the converter receives the binary code of the number

N

ABOUT

-.

N N () 2

those. The code translation at the output of the converter is proportional to the translatable motion.

The decoder, 10 is designed to set the converter to its original state when zeroing the count of 15 pulses. When the zero code is set at the output of the pulse counter 15, a positive pulse is generated at the output of the decoder, the positive pulse is fed through the IL 11 element to the second trigger input 13, resetting the trigger to zero condition.

Claims (1)

Invention Formula / angle-code converter, SOD:; an ergative sine-cosine angle sensor, the first analog-digital converter, the first and second accumulating adders, the outputs of the second accumulating adder are connected to 5 group of inputs (L - m) of the lower bits of the first accumulating adder, element OR, trigger, element I, the output of which is connected to the clock input of the second accumulating sum of W, the group of inputs (L - m) of the lower bits of which is connected to the group of inverse outputs (L - t) most significant bits of the first accumulating adder, and the pulse generator, the output 15 of which is connected to the first input of the element I, characterized in that, with the aim of increasing the accuracy of the converter, a second analog-to-digital converter is inserted into it, 20 first, second and third delay lines, forg-pulse generator, decoder and counter, whose installation input is connected to the initial installation bus, first and second outputs 25 sine-cosine angle sensor connected to the first inputs of the first and second analog-to-digital converters, respectively, the second inputs of which are combined, are controlling the input of the converter and connected to the input of the first delay line, the outputs of the first and second analog-digital converters are connected to the inputs initial installation 35 of the first and second accumulating 11x adders, the output of the first delay line is connected to the inputs) enabling the initial installation of the first and second accumulating adders and the counter, and 40 to the input of the second delay line, the output of which is connected to the first input of the trigger, the second input of which is connected to the output of the element IL11, the output of the trigger is connected to the second input 45 of the AND element and is the control output of the converter, the output of the AND element is connected to the clock input of the counter and the input of the third delay line, the output of which is connected to 50 clock input of the first accumulating adder, the output of the higher bit of which is connected to the first input of the OR element through the pulse shaper, the second input of which 55 through a decoder is connected to the output of the counter, which is the output of the angle-code converter. npeoSpaa. Controller St (xod Editor N.Shvyschka Compiled by M.Sidorova Tehred A. Kravchuk Proofreader M. Sharoshi 795/61 Circulation 902 Subscription VNII11I State Committee of the USSR for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4