SG60090G - Method of making a semiconductor device - Google Patents

Method of making a semiconductor device

Info

Publication number
SG60090G
SG60090G SG60090A SG60090A SG60090G SG 60090 G SG60090 G SG 60090G SG 60090 A SG60090 A SG 60090A SG 60090 A SG60090 A SG 60090A SG 60090 G SG60090 G SG 60090G
Authority
SG
Singapore
Prior art keywords
making
semiconductor device
semiconductor
Prior art date
Application number
SG60090A
Other languages
English (en)
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62053453A external-priority patent/JPS63184352A/ja
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of SG60090G publication Critical patent/SG60090G/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H10W10/0147—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape the shapes being altered by a local oxidation of silicon process, e.g. trench corner rounding by LOCOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
SG60090A 1986-05-09 1990-07-19 Method of making a semiconductor device SG60090G (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP10596586 1986-05-09
JP22770986 1986-09-26
JP62053453A JPS63184352A (ja) 1986-05-09 1987-03-09 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
SG60090G true SG60090G (en) 1990-09-07

Family

ID=27294953

Family Applications (1)

Application Number Title Priority Date Filing Date
SG60090A SG60090G (en) 1986-05-09 1990-07-19 Method of making a semiconductor device

Country Status (6)

Country Link
DE (1) DE3715092A1 (https=)
FR (1) FR2598557B1 (https=)
GB (1) GB2190241B (https=)
HK (1) HK28791A (https=)
NL (1) NL190591C (https=)
SG (1) SG60090G (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1189143B (it) * 1986-05-16 1988-01-28 Sgs Microelettronica Spa Procedimento per la realizzazione dell'isolamento di circuiti integrati a elevatissima scala d'integrazione,in particolare in tecnologia mos e cmos
JPH0442948A (ja) * 1990-06-06 1992-02-13 Mitsubishi Electric Corp 半導体装置の製造方法
KR920020676A (ko) * 1991-04-09 1992-11-21 김광호 반도체 장치의 소자분리 방법
JPH0574927A (ja) * 1991-09-13 1993-03-26 Nec Corp 半導体装置の製造方法
KR0147630B1 (ko) * 1995-04-21 1998-11-02 김광호 반도체 장치의 소자분리방법
KR980006053A (ko) * 1996-06-26 1998-03-30 문정환 반도체장치의 격리막 형성방법
CN102683290A (zh) * 2011-03-08 2012-09-19 无锡华润上华半导体有限公司 Rom器件及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
JPS5578540A (en) * 1978-12-08 1980-06-13 Hitachi Ltd Manufacture of semiconductor device
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
JPS5694646A (en) * 1979-12-28 1981-07-31 Fujitsu Ltd Forming method for oxidized film
JPS5694647A (en) * 1979-12-28 1981-07-31 Fujitsu Ltd Forming method for oxidized film
US4394196A (en) * 1980-07-16 1983-07-19 Tokyo Shibaura Denki Kabushiki Kaisha Method of etching, refilling and etching dielectric grooves for isolating micron size device regions
JPS5893342A (ja) * 1981-11-30 1983-06-03 Toshiba Corp 半導体装置の製造方法
US4435446A (en) * 1982-11-15 1984-03-06 Hewlett-Packard Company Edge seal with polysilicon in LOCOS process
JPS6054453A (ja) * 1983-09-05 1985-03-28 Oki Electric Ind Co Ltd 半導体集積回路装置の製造方法

Also Published As

Publication number Publication date
FR2598557A1 (fr) 1987-11-13
FR2598557B1 (fr) 1990-03-30
GB2190241B (en) 1989-12-13
NL190591C (nl) 1994-05-02
GB8710281D0 (en) 1987-06-03
GB2190241A (en) 1987-11-11
DE3715092A1 (de) 1987-11-12
DE3715092C2 (https=) 1993-07-29
NL8701087A (nl) 1987-12-01
HK28791A (en) 1991-04-26
NL190591B (nl) 1993-12-01

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