JPS5694647A - Forming method for oxidized film - Google Patents

Forming method for oxidized film

Info

Publication number
JPS5694647A
JPS5694647A JP17037479A JP17037479A JPS5694647A JP S5694647 A JPS5694647 A JP S5694647A JP 17037479 A JP17037479 A JP 17037479A JP 17037479 A JP17037479 A JP 17037479A JP S5694647 A JPS5694647 A JP S5694647A
Authority
JP
Japan
Prior art keywords
substrate
groove
oxidized film
film
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17037479A
Other languages
Japanese (ja)
Inventor
Koichi Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17037479A priority Critical patent/JPS5694647A/en
Publication of JPS5694647A publication Critical patent/JPS5694647A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To level the surface of the film by forming a hole of small diameter or a narrow groove deeply enough in the surface of an Si substrate, by applying thermal oxidation to fill up the same and further by applying an accelerated ion beam aslant to the surface to etch the oxidized layer. CONSTITUTION:A resist mask having a narrow opening is given to the surface of the Si substrate 20 and reactive spattering is applied to the Si, whereby a vertical etched groove 21 deep sufficiently is formed. The resist being removed, the substrate 20 is heated in oxidizing ambience to fill the groove 21 with a thermally oxidized film 22. On the occasion, the oxidized film 22 grows also on the surface of the Si substrate 20, causing a groove 23 in the center of the groove 21. Next, when the oxidized film on the surface of the substrate is removed through etching by the accelerated ion beam 27 applied aslant, the remaining groove 24 on the oxidized film 22 is made shallow considerably, leaving substantially no difference in level. As the result, neither crack nor disconnection is caused in a thin film formed on the substrate.
JP17037479A 1979-12-28 1979-12-28 Forming method for oxidized film Pending JPS5694647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17037479A JPS5694647A (en) 1979-12-28 1979-12-28 Forming method for oxidized film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17037479A JPS5694647A (en) 1979-12-28 1979-12-28 Forming method for oxidized film

Publications (1)

Publication Number Publication Date
JPS5694647A true JPS5694647A (en) 1981-07-31

Family

ID=15903745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17037479A Pending JPS5694647A (en) 1979-12-28 1979-12-28 Forming method for oxidized film

Country Status (1)

Country Link
JP (1) JPS5694647A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3715092A1 (en) * 1986-05-09 1987-11-12 Seiko Epson Corp METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT
KR100567744B1 (en) * 2004-06-18 2006-04-07 송혁진 a neck rear block
JP2008118084A (en) * 2006-10-31 2008-05-22 Hynix Semiconductor Inc Method of forming element isolation film of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3715092A1 (en) * 1986-05-09 1987-11-12 Seiko Epson Corp METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT
KR100567744B1 (en) * 2004-06-18 2006-04-07 송혁진 a neck rear block
JP2008118084A (en) * 2006-10-31 2008-05-22 Hynix Semiconductor Inc Method of forming element isolation film of semiconductor device

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