JPS5578540A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5578540A
JPS5578540A JP15103978A JP15103978A JPS5578540A JP S5578540 A JPS5578540 A JP S5578540A JP 15103978 A JP15103978 A JP 15103978A JP 15103978 A JP15103978 A JP 15103978A JP S5578540 A JPS5578540 A JP S5578540A
Authority
JP
Japan
Prior art keywords
oxidized film
grooves
silicon
oxidized
remanet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15103978A
Other languages
Japanese (ja)
Inventor
Yoshimichi Hirobe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15103978A priority Critical patent/JPS5578540A/en
Priority to DE19792949360 priority patent/DE2949360A1/en
Publication of JPS5578540A publication Critical patent/JPS5578540A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE: To improve a pattern dimensional accuracy of an oxidized film and also to improve flatness by a method wherein plural slender grooves are formed adjacently on a semiconductor substrate with substrate zones between grooves converted to oxidized films and the oxidized films buried in the grooves.
CONSTITUTION: A mask 10 is provided on a silicon substrate 15, isolation domains of various widths 12, 13, 14 are formed through etching, and a groove 16 and a silicon remanet 20 are formed. Next, the mask 10 is removed, the groove 16 is covered thoroughly with an oxidized film 17, and the silicon remanet 20 is also converted thoroughly to an oxidized film. The isolation domain 14 with large width is formed with plural grooves. In the case of bipolar IC, the width of the groove 16 and that of the silicon remanet must be about 1.1 times or below and 0.9 times or below respectively of the thickness of a desired oxidized film 17'. A flatness of the surface after formation of the oxidized film is improved thereby, and not only a disconnection of the electrode wiring hardly occurs but also a dimensional accuracy at the time of mask pattern transfer after formation of the oxidized film is improved.
COPYRIGHT: (C)1980,JPO&Japio
JP15103978A 1978-12-08 1978-12-08 Manufacture of semiconductor device Pending JPS5578540A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP15103978A JPS5578540A (en) 1978-12-08 1978-12-08 Manufacture of semiconductor device
DE19792949360 DE2949360A1 (en) 1978-12-08 1979-12-07 Silicon oxide insulation for integrated semiconductor circuits - is produced by selective grooving of substrate of dimensions safeguarding continuous oxide film on heat treatment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15103978A JPS5578540A (en) 1978-12-08 1978-12-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5578540A true JPS5578540A (en) 1980-06-13

Family

ID=15509955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15103978A Pending JPS5578540A (en) 1978-12-08 1978-12-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5578540A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3715092A1 (en) * 1986-05-09 1987-11-12 Seiko Epson Corp METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT
US6790751B2 (en) 2001-10-04 2004-09-14 Denso Corporation Semiconductor substrate for a one-chip electronic device and related manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3715092A1 (en) * 1986-05-09 1987-11-12 Seiko Epson Corp METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT
US6790751B2 (en) 2001-10-04 2004-09-14 Denso Corporation Semiconductor substrate for a one-chip electronic device and related manufacturing method

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