SG44058A1 - Method of making a circuitized substrate using two different metallization processes - Google Patents
Method of making a circuitized substrate using two different metallization processesInfo
- Publication number
- SG44058A1 SG44058A1 SG1996010841A SG1996010841A SG44058A1 SG 44058 A1 SG44058 A1 SG 44058A1 SG 1996010841 A SG1996010841 A SG 1996010841A SG 1996010841 A SG1996010841 A SG 1996010841A SG 44058 A1 SG44058 A1 SG 44058A1
- Authority
- SG
- Singapore
- Prior art keywords
- making
- metallization processes
- circuitized substrate
- different metallization
- different
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000001465 metallisation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0353—Making conductive layer thin, e.g. by etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1407—Applying catalyst before applying plating resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
- Y10T428/24322—Composite web or sheet
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/566,363 US5707893A (en) | 1995-12-01 | 1995-12-01 | Method of making a circuitized substrate using two different metallization processes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG44058A1 true SG44058A1 (en) | 1997-11-14 |
Family
ID=24262573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG1996010841A SG44058A1 (en) | 1995-12-01 | 1996-10-14 | Method of making a circuitized substrate using two different metallization processes |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US5707893A (https=) |
| KR (1) | KR100240915B1 (https=) |
| CN (1) | CN1088321C (https=) |
| SG (1) | SG44058A1 (https=) |
| TW (1) | TW312080B (https=) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6013417A (en) * | 1998-04-02 | 2000-01-11 | International Business Machines Corporation | Process for fabricating circuitry on substrates having plated through-holes |
| US6296897B1 (en) * | 1998-08-12 | 2001-10-02 | International Business Machines Corporation | Process for reducing extraneous metal plating |
| IT1312433B1 (it) * | 1999-05-14 | 2002-04-17 | Cadif Srl | Pannello con tessuto elettro-termico,ad alto isolamento elettrico |
| US6869750B2 (en) * | 1999-10-28 | 2005-03-22 | Fujitsu Limited | Structure and method for forming a multilayered structure |
| JP3736607B2 (ja) * | 2000-01-21 | 2006-01-18 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
| CN100336426C (zh) * | 2000-02-25 | 2007-09-05 | 揖斐电株式会社 | 多层印刷电路板以及多层印刷电路板的制造方法 |
| US6753483B2 (en) * | 2000-06-14 | 2004-06-22 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board and method of manufacturing the same |
| US6617239B1 (en) | 2000-08-31 | 2003-09-09 | Micron Technology, Inc. | Subtractive metallization structure and method of making |
| CN1278413C (zh) | 2000-09-25 | 2006-10-04 | 揖斐电株式会社 | 半导体元件及其制造方法、多层印刷布线板及其制造方法 |
| DE10126734B4 (de) * | 2001-05-31 | 2009-02-26 | Qimonda Ag | Umverdrahtungsverfahren und damit hergestelltes Bauelement |
| US20040188257A1 (en) * | 2001-08-31 | 2004-09-30 | John Klocke | Methods for processing micro-feature workpieces, patterned structures on micro-feature workpieces, and integrated tools for processing micro-feature workpieces |
| JP3807312B2 (ja) * | 2002-01-18 | 2006-08-09 | 富士通株式会社 | プリント基板とその製造方法 |
| JP4285629B2 (ja) * | 2002-04-25 | 2009-06-24 | 富士通株式会社 | 集積回路を搭載するインターポーザ基板の作製方法 |
| KR100499004B1 (ko) * | 2002-12-18 | 2005-07-01 | 삼성전기주식회사 | 광비아홀을 구비하는 인쇄회로기판 및 가공 공정 |
| US7179738B2 (en) * | 2004-06-17 | 2007-02-20 | Texas Instruments Incorporated | Semiconductor assembly having substrate with electroplated contact pads |
| US7411303B2 (en) * | 2004-11-09 | 2008-08-12 | Texas Instruments Incorporated | Semiconductor assembly having substrate with electroplated contact pads |
| US6964884B1 (en) * | 2004-11-19 | 2005-11-15 | Endicott Interconnect Technologies, Inc. | Circuitized substrates utilizing three smooth-sided conductive layers as part thereof, method of making same, and electrical assemblies and information handling systems utilizing same |
| KR100643496B1 (ko) * | 2004-12-23 | 2006-11-10 | 삼성전자주식회사 | 노말 오픈/클로즈 타입 겸용 광센서 보드 |
| US7808013B2 (en) * | 2006-10-31 | 2010-10-05 | Cree, Inc. | Integrated heat spreaders for light emitting devices (LEDs) and related assemblies |
| KR100990618B1 (ko) * | 2008-04-15 | 2010-10-29 | 삼성전기주식회사 | 랜드리스 비아홀을 갖는 인쇄회로기판 및 그 제조방법 |
| US8186053B2 (en) * | 2008-11-14 | 2012-05-29 | Fujitsu Limited | Circuit board and method of manufacturing the same |
| JP5565950B2 (ja) * | 2010-08-23 | 2014-08-06 | 京セラSlcテクノロジー株式会社 | 配線基板の製造方法 |
| CN104053305B (zh) * | 2013-03-13 | 2017-06-16 | 北大方正集团有限公司 | 一种印制线路板及其制作方法 |
| US10537027B2 (en) | 2013-08-02 | 2020-01-14 | Orbotech Ltd. | Method producing a conductive path on a substrate |
| CN104703409B (zh) * | 2013-12-09 | 2018-03-16 | 深南电路有限公司 | 电路板加工方法和相关装置 |
| US10356906B2 (en) * | 2016-06-21 | 2019-07-16 | Abb Schweiz Ag | Method of manufacturing a PCB including a thick-wall via |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3568312A (en) * | 1968-10-04 | 1971-03-09 | Hewlett Packard Co | Method of making printed circuit boards |
| US4383363A (en) * | 1977-09-01 | 1983-05-17 | Sharp Kabushiki Kaisha | Method of making a through-hole connector |
| GB8500906D0 (en) * | 1985-01-15 | 1985-02-20 | Prestwick Circuits Ltd | Printed circuit boards |
| DE3576900D1 (de) * | 1985-12-30 | 1990-05-03 | Ibm Deutschland | Verfahren zum herstellen von gedruckten schaltungen. |
| US5314788A (en) * | 1986-01-24 | 1994-05-24 | Canon Kabushiki Kaisha | Matrix printed board and process of forming the same |
| US4866008A (en) * | 1987-12-11 | 1989-09-12 | Texas Instruments Incorporated | Methods for forming self-aligned conductive pillars on interconnects |
| JPH01260886A (ja) * | 1988-04-11 | 1989-10-18 | Minolta Camera Co Ltd | プリント基板の製造方法 |
| US4810332A (en) * | 1988-07-21 | 1989-03-07 | Microelectronics And Computer Technology Corporation | Method of making an electrical multilayer copper interconnect |
| FR2649578B1 (fr) * | 1989-07-10 | 1991-09-20 | Alcatel Business Systems | Dispositif de dissipation thermique pour composant de type cms monte sur plaque de circuit imprime |
| US4920639A (en) * | 1989-08-04 | 1990-05-01 | Microelectronics And Computer Technology Corporation | Method of making a multilevel electrical airbridge interconnect |
| US5358907A (en) * | 1990-01-30 | 1994-10-25 | Xerox Corporation | Method of electrolessly depositing metals on a silicon substrate by immersing the substrate in hydrofluoric acid containing a buffered metal salt solution |
| US5079065A (en) * | 1990-04-02 | 1992-01-07 | Fuji Xerox Co., Ltd. | Printed-circuit substrate and method of making thereof |
| US5098860A (en) * | 1990-05-07 | 1992-03-24 | The Boeing Company | Method of fabricating high-density interconnect structures having tantalum/tantalum oxide layers |
| JPH0636472B2 (ja) * | 1990-05-28 | 1994-05-11 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | 多層配線基板の製造方法 |
| US5252195A (en) * | 1990-08-20 | 1993-10-12 | Mitsubishi Rayon Company Ltd. | Process for producing a printed wiring board |
| JPH04100294A (ja) * | 1990-08-20 | 1992-04-02 | Mitsubishi Rayon Co Ltd | プリント配線板の製造方法 |
| US5017271A (en) * | 1990-08-24 | 1991-05-21 | Gould Inc. | Method for printed circuit board pattern making using selectively etchable metal layers |
| JPH05218618A (ja) * | 1992-01-30 | 1993-08-27 | Cmk Corp | プリント配線板の製造方法 |
| JP2773578B2 (ja) * | 1992-10-02 | 1998-07-09 | 日本電気株式会社 | 半導体装置の製造方法 |
| US5354712A (en) * | 1992-11-12 | 1994-10-11 | Northern Telecom Limited | Method for forming interconnect structures for integrated circuits |
| US5421083A (en) * | 1994-04-01 | 1995-06-06 | Motorola, Inc. | Method of manufacturing a circuit carrying substrate having coaxial via holes |
-
1995
- 1995-12-01 US US08/566,363 patent/US5707893A/en not_active Expired - Fee Related
-
1996
- 1996-05-28 TW TW085106335A patent/TW312080B/zh active
- 1996-10-14 SG SG1996010841A patent/SG44058A1/en unknown
- 1996-10-15 KR KR1019960046024A patent/KR100240915B1/ko not_active Expired - Fee Related
- 1996-11-20 CN CN96119259A patent/CN1088321C/zh not_active Expired - Fee Related
-
1997
- 1997-02-04 US US08/795,180 patent/US5817405A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR100240915B1 (ko) | 2000-01-15 |
| CN1156948A (zh) | 1997-08-13 |
| US5817405A (en) | 1998-10-06 |
| KR970058406A (ko) | 1997-07-31 |
| TW312080B (https=) | 1997-08-01 |
| US5707893A (en) | 1998-01-13 |
| CN1088321C (zh) | 2002-07-24 |
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