SG21994G - Integrated circuit with memory self-test - Google Patents

Integrated circuit with memory self-test

Info

Publication number
SG21994G
SG21994G SG21994A SG21994A SG21994G SG 21994 G SG21994 G SG 21994G SG 21994 A SG21994 A SG 21994A SG 21994 A SG21994 A SG 21994A SG 21994 G SG21994 G SG 21994G
Authority
SG
Singapore
Prior art keywords
test
integrated circuit
memory self
self
memory
Prior art date
Application number
SG21994A
Other languages
English (en)
Inventor
Duane Rodney Aadsen
Sunil Kumar Jain
Charles Eugene Stroud
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US06/914,411 priority Critical patent/US4872168A/en
Priority to ES87308454T priority patent/ES2046987T3/es
Priority to EP87308454A priority patent/EP0262867B1/en
Priority to DE3788487T priority patent/DE3788487T2/de
Priority to JP62248224A priority patent/JPS63102098A/ja
Application filed by At & T Corp filed Critical At & T Corp
Priority to SG21994A priority patent/SG21994G/en
Priority to HK108294A priority patent/HK108294A/xx
Publication of SG21994G publication Critical patent/SG21994G/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
SG21994A 1986-10-02 1994-02-07 Integrated circuit with memory self-test SG21994G (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
US06/914,411 US4872168A (en) 1986-10-02 1986-10-02 Integrated circuit with memory self-test
ES87308454T ES2046987T3 (es) 1986-10-02 1987-09-24 Circuito integrado con autoverificacion de memoria.
EP87308454A EP0262867B1 (en) 1986-10-02 1987-09-24 Integrated circuit with memory self-test
DE3788487T DE3788487T2 (de) 1986-10-02 1987-09-24 Integrierte Schaltung mit Speicherselbstprüfung.
JP62248224A JPS63102098A (ja) 1986-10-02 1987-10-02 集積回路
SG21994A SG21994G (en) 1986-10-02 1994-02-07 Integrated circuit with memory self-test
HK108294A HK108294A (en) 1986-10-02 1994-10-06 Integrated circuit with memory self-test

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/914,411 US4872168A (en) 1986-10-02 1986-10-02 Integrated circuit with memory self-test
SG21994A SG21994G (en) 1986-10-02 1994-02-07 Integrated circuit with memory self-test

Publications (1)

Publication Number Publication Date
SG21994G true SG21994G (en) 1995-03-17

Family

ID=26663870

Family Applications (1)

Application Number Title Priority Date Filing Date
SG21994A SG21994G (en) 1986-10-02 1994-02-07 Integrated circuit with memory self-test

Country Status (7)

Country Link
US (1) US4872168A (es)
EP (1) EP0262867B1 (es)
JP (1) JPS63102098A (es)
DE (1) DE3788487T2 (es)
ES (1) ES2046987T3 (es)
HK (1) HK108294A (es)
SG (1) SG21994G (es)

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JP3207727B2 (ja) * 1995-10-03 2001-09-10 株式会社東芝 半導体集積回路およびその応用装置
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Also Published As

Publication number Publication date
DE3788487D1 (de) 1994-01-27
EP0262867A3 (en) 1991-03-20
DE3788487T2 (de) 1994-06-23
ES2046987T3 (es) 1994-02-16
US4872168A (en) 1989-10-03
HK108294A (en) 1994-10-14
EP0262867A2 (en) 1988-04-06
JPS63102098A (ja) 1988-05-06
EP0262867B1 (en) 1993-12-15

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