GB8602228D0 - Integrated circuit interconnects - Google Patents

Integrated circuit interconnects

Info

Publication number
GB8602228D0
GB8602228D0 GB8602228A GB8602228A GB8602228D0 GB 8602228 D0 GB8602228 D0 GB 8602228D0 GB 8602228 A GB8602228 A GB 8602228A GB 8602228 A GB8602228 A GB 8602228A GB 8602228 D0 GB8602228 D0 GB 8602228D0
Authority
GB
Grant status
Grant
Patent type
Prior art keywords
integrated circuit
circuit interconnects
interconnects
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8602228A
Other versions
GB2186424A (en )
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co PLC
Original Assignee
Plessey Co PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1005Formation and after-treatment of dielectrics
    • H01L2221/101Forming openings in dielectrics
    • H01L2221/1015Forming openings in dielectrics for dual damascene structures
    • H01L2221/1031Dual damascene by forming vias in the via-level dielectric prior to deposition of the trench-level dielectric
GB8602228A 1986-01-30 1986-01-30 Integrated circuit interconnects Withdrawn GB8602228D0 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8602228A GB8602228D0 (en) 1986-01-30 1986-01-30 Integrated circuit interconnects

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB8602228A GB8602228D0 (en) 1986-01-30 1986-01-30 Integrated circuit interconnects
PCT/GB1987/000052 WO1987004858A1 (en) 1986-01-30 1987-01-28 Method for producing integrated circuit interconnects
EP19870901067 EP0259370A1 (en) 1986-01-30 1987-01-28 Method for producing integrated circuit interconnects

Publications (2)

Publication Number Publication Date
GB8602228D0 true GB8602228D0 (en) 1986-03-05
GB2186424A true GB2186424A (en) 1987-08-12

Family

ID=10592192

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8602228A Withdrawn GB8602228D0 (en) 1986-01-30 1986-01-30 Integrated circuit interconnects

Country Status (3)

Country Link
EP (1) EP0259370A1 (en)
GB (1) GB8602228D0 (en)
WO (1) WO1987004858A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3788485D1 (en) * 1986-09-30 1994-01-27 Philips Nv A process for preparing a Planarleiterbahn by isotropic deposition of conductive material.
JPH01102938A (en) * 1987-09-25 1989-04-20 American Teleph & Telegr Co <Att> Manufacture of semiconductor integrated circuit
EP0326956A3 (en) * 1988-02-02 1991-03-13 National Semiconductor Corporation Method for connecting devices on an integrated circuit substrate to a metallization layer
FR2630588A1 (en) * 1988-04-22 1989-10-27 Philips Nv A method for making an interconnection pattern on a semiconductor device including a circuit has high integration density
US5256565A (en) * 1989-05-08 1993-10-26 The United States Of America As Represented By The United States Department Of Energy Electrochemical planarization
US5413966A (en) 1990-12-20 1995-05-09 Lsi Logic Corporation Shallow trench etch
US5290396A (en) * 1991-06-06 1994-03-01 Lsi Logic Corporation Trench planarization techniques
US5248625A (en) 1991-06-06 1993-09-28 Lsi Logic Corporation Techniques for forming isolation structures
US5252503A (en) * 1991-06-06 1993-10-12 Lsi Logic Corporation Techniques for forming isolation structures
US5225358A (en) * 1991-06-06 1993-07-06 Lsi Logic Corporation Method of forming late isolation with polishing
US5880018A (en) * 1996-10-07 1999-03-09 Motorola Inc. Method for manufacturing a low dielectric constant inter-level integrated circuit structure
US6348395B1 (en) * 2000-06-07 2002-02-19 International Business Machines Corporation Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1521990A1 (en) * 1966-02-11 1970-02-05 Siemens Ag A method for covering two closely adjacent regions of a Halbleiteroberflaeche with doping and / or electrode material
US3961414A (en) * 1972-06-09 1976-06-08 International Business Machines Corporation Semiconductor structure having metallization inlaid in insulating layers and method for making same
JPS5622158B2 (en) * 1978-01-17 1981-05-23
US4184909A (en) * 1978-08-21 1980-01-22 International Business Machines Corporation Method of forming thin film interconnection systems
NL8004573A (en) * 1979-09-19 1981-03-23 Gen Electric A process for the manufacture of composite articles.
US4503451A (en) * 1982-07-30 1985-03-05 Motorola, Inc. Low resistance buried power bus for integrated circuits
JPS5982746A (en) * 1982-11-04 1984-05-12 Toshiba Corp Electrode wiring method of semiconductor device

Also Published As

Publication number Publication date Type
WO1987004858A1 (en) 1987-08-13 application
GB2186424A (en) 1987-08-12 application
EP0259370A1 (en) 1988-03-16 application

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)