JPS57208697A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS57208697A
JPS57208697A JP56093339A JP9333981A JPS57208697A JP S57208697 A JPS57208697 A JP S57208697A JP 56093339 A JP56093339 A JP 56093339A JP 9333981 A JP9333981 A JP 9333981A JP S57208697 A JPS57208697 A JP S57208697A
Authority
JP
Japan
Prior art keywords
signal
data
memory
expected value
fail
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56093339A
Other languages
Japanese (ja)
Inventor
Tsuyoshi Shiragasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56093339A priority Critical patent/JPS57208697A/en
Priority to US06/383,838 priority patent/US4541090A/en
Publication of JPS57208697A publication Critical patent/JPS57208697A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/26—Accessing multiple arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To realize a large-capacity memory, by dividing a memory array into blocks, setting a coparator to each divided block to supply the common address signal and expected value signal and as a result decreasing the memory capacity in the inspection mode. CONSTITUTION:In the insepction mode, the data on a data line 7 is supplied to the input/output circuits 5A-5C. The data is then written into a storage cell of each of the memory array blocks 3A-3C which are selected by the X/Y decoders 1 and 2 and then read out to the circuits 5A-5C of each cell. Then the switches 12A and 12B which are controlled by the AND of the input read signal and the test signal and the OR of the block selecting signal, and the comparators 9A-9C and the fail registers 10A-10C function. In this case, the output of each circuit 5 is compared with the expected value data, and the fail signal is set to a corresponding register 10i when no coincidence is obtained in the above- mentioned comparison.
JP56093339A 1981-06-09 1981-06-16 Semiconductor storage device Pending JPS57208697A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP56093339A JPS57208697A (en) 1981-06-16 1981-06-16 Semiconductor storage device
US06/383,838 US4541090A (en) 1981-06-09 1982-06-01 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56093339A JPS57208697A (en) 1981-06-16 1981-06-16 Semiconductor storage device

Publications (1)

Publication Number Publication Date
JPS57208697A true JPS57208697A (en) 1982-12-21

Family

ID=14079503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56093339A Pending JPS57208697A (en) 1981-06-09 1981-06-16 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS57208697A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159700A (en) * 1984-08-30 1986-03-27 Mitsubishi Electric Corp Semiconductor memory device
JPS61158099A (en) * 1984-12-28 1986-07-17 シーメンス、アクチエンゲゼルシヤフト Integrated semiconductor memory
JPS63102098A (en) * 1986-10-02 1988-05-06 アメリカン　テレフォン　アンド　テレグラフ　カムパニー Integrated circuit
JPH01282799A (en) * 1988-05-07 1989-11-14 Mitsubishi Electric Corp Semiconductor storage
JPH04233045A (en) * 1990-06-20 1992-08-21 American Teleph & Telegr Co <Att> Data compressing method and apparatus

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51147924A (en) * 1975-06-13 1976-12-18 Fujitsu Ltd Memory unit
JPS52130533A (en) * 1976-04-27 1977-11-01 Fujitsu Ltd Memory card tester
JPS5562598A (en) * 1978-10-31 1980-05-12 Nec Corp Memory check unit
JPS5580897A (en) * 1978-12-11 1980-06-18 Toshiba Corp Memory device diagnosis system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51147924A (en) * 1975-06-13 1976-12-18 Fujitsu Ltd Memory unit
JPS52130533A (en) * 1976-04-27 1977-11-01 Fujitsu Ltd Memory card tester
JPS5562598A (en) * 1978-10-31 1980-05-12 Nec Corp Memory check unit
JPS5580897A (en) * 1978-12-11 1980-06-18 Toshiba Corp Memory device diagnosis system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159700A (en) * 1984-08-30 1986-03-27 Mitsubishi Electric Corp Semiconductor memory device
JPS61158099A (en) * 1984-12-28 1986-07-17 シーメンス、アクチエンゲゼルシヤフト Integrated semiconductor memory
JPS63102098A (en) * 1986-10-02 1988-05-06 アメリカン　テレフォン　アンド　テレグラフ　カムパニー Integrated circuit
JPH01282799A (en) * 1988-05-07 1989-11-14 Mitsubishi Electric Corp Semiconductor storage
JPH04233045A (en) * 1990-06-20 1992-08-21 American Teleph & Telegr Co <Att> Data compressing method and apparatus

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