SG152989A1 - Semiconductor device and method of making integrated passive devices - Google Patents
Semiconductor device and method of making integrated passive devicesInfo
- Publication number
- SG152989A1 SG152989A1 SG200807737-2A SG2008077372A SG152989A1 SG 152989 A1 SG152989 A1 SG 152989A1 SG 2008077372 A SG2008077372 A SG 2008077372A SG 152989 A1 SG152989 A1 SG 152989A1
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor device
- passive circuit
- circuit element
- insulating layer
- formed over
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000010410 layer Substances 0.000 abstract 8
- 239000000758 substrate Substances 0.000 abstract 5
- 238000002161 passivation Methods 0.000 abstract 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- 238000001465 metallisation Methods 0.000 abstract 2
- 229920000642 polymer Polymers 0.000 abstract 2
- 239000004593 Epoxy Substances 0.000 abstract 1
- 239000012790 adhesive layer Substances 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 abstract 1
- 239000002131 composite material Substances 0.000 abstract 1
- 150000001875 compounds Chemical class 0.000 abstract 1
- 239000011521 glass Substances 0.000 abstract 1
- 238000000465 moulding Methods 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/949,255 US8409970B2 (en) | 2005-10-29 | 2007-12-03 | Semiconductor device and method of making integrated passive devices |
Publications (1)
Publication Number | Publication Date |
---|---|
SG152989A1 true SG152989A1 (en) | 2009-06-29 |
Family
ID=40674907
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG201103214-1A SG171655A1 (en) | 2007-12-03 | 2008-10-16 | Semiconductor device and method of making integrated passive devices |
SG200807737-2A SG152989A1 (en) | 2007-12-03 | 2008-10-16 | Semiconductor device and method of making integrated passive devices |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG201103214-1A SG171655A1 (en) | 2007-12-03 | 2008-10-16 | Semiconductor device and method of making integrated passive devices |
Country Status (4)
Country | Link |
---|---|
US (2) | US8409970B2 (zh) |
KR (1) | KR101537114B1 (zh) |
SG (2) | SG171655A1 (zh) |
TW (1) | TWI452639B (zh) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8791006B2 (en) | 2005-10-29 | 2014-07-29 | Stats Chippac, Ltd. | Semiconductor device and method of forming an inductor on polymer matrix composite substrate |
US8158510B2 (en) | 2009-11-19 | 2012-04-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming IPD on molded substrate |
US8409970B2 (en) | 2005-10-29 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of making integrated passive devices |
US8168470B2 (en) | 2008-12-08 | 2012-05-01 | Stats Chippac, Ltd. | Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound |
US8907446B2 (en) * | 2009-05-19 | 2014-12-09 | Texas Instruments Incorporated | Integrated circuit structure with capacitor and resistor and method for forming |
US8164158B2 (en) | 2009-09-11 | 2012-04-24 | Stats Chippac, Ltd. | Semiconductor device and method of forming integrated passive device |
SG10201503210QA (en) * | 2009-11-19 | 2015-06-29 | Stats Chippac Ltd | Semiconductor device and method of forming an inductor on polymermatrix composite substrate |
TWI412114B (zh) * | 2009-12-31 | 2013-10-11 | Advanced Semiconductor Eng | 半導體封裝結構及其製造方法 |
US20110215465A1 (en) | 2010-03-03 | 2011-09-08 | Xilinx, Inc. | Multi-chip integrated circuit |
TWI544592B (zh) * | 2010-05-27 | 2016-08-01 | 精材科技股份有限公司 | 封裝結構及其製法 |
US9425146B2 (en) * | 2010-09-28 | 2016-08-23 | Infineon Technologies Ag | Semiconductor structure and method for making same |
US8853819B2 (en) | 2011-01-07 | 2014-10-07 | Advanced Semiconductor Engineering, Inc. | Semiconductor structure with passive element network and manufacturing method thereof |
TWI453884B (zh) * | 2011-11-22 | 2014-09-21 | Advanced Semiconductor Eng | 具有整合被動元件之半導體元件及其製造方法 |
US20120190152A1 (en) | 2011-01-25 | 2012-07-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for Fabricating Integrated Passive Devices on Glass Substrates |
US9082832B2 (en) | 2011-09-21 | 2015-07-14 | Stats Chippac, Ltd. | Semiconductor device and method of forming protection and support structure for conductive interconnect structure |
US9484259B2 (en) | 2011-09-21 | 2016-11-01 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming protection and support structure for conductive interconnect structure |
US8809996B2 (en) | 2012-06-29 | 2014-08-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package with passive devices and method of forming the same |
US9219059B2 (en) | 2012-09-26 | 2015-12-22 | International Business Machines Corporation | Semiconductor structure with integrated passive structures |
US9695040B2 (en) * | 2012-10-16 | 2017-07-04 | Invensense, Inc. | Microphone system with integrated passive device die |
US9287228B2 (en) | 2014-06-26 | 2016-03-15 | Lam Research Ag | Method for etching semiconductor structures and etching composition for use in such a method |
US9893048B2 (en) | 2015-09-14 | 2018-02-13 | Qualcomm Incorporated | Passive-on-glass (POG) device and method |
KR102513360B1 (ko) | 2016-02-22 | 2023-03-24 | 삼성디스플레이 주식회사 | 범프 구조물, 범프 구조물을 포함하는 구동 칩 및 범프 구조물의 제조 방법 |
US10304765B2 (en) | 2017-06-08 | 2019-05-28 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package |
JP2021103713A (ja) * | 2019-12-25 | 2021-07-15 | 株式会社村田製作所 | 高周波モジュール及び通信装置 |
CN111181518A (zh) * | 2019-12-28 | 2020-05-19 | 珠海市东恒电子有限公司 | 一种平衡非平衡射频转换元器件制程方法 |
JP7424157B2 (ja) * | 2020-03-25 | 2024-01-30 | Tdk株式会社 | 電子部品及びその製造方法 |
US20220310777A1 (en) * | 2021-03-26 | 2022-09-29 | Intel Corporation | Integrated circuit package redistribution layers with metal-insulator-metal (mim) capacitors |
Family Cites Families (77)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4604799A (en) * | 1982-09-03 | 1986-08-12 | John Fluke Mfg. Co., Inc. | Method of making molded circuit board |
JP2593965B2 (ja) | 1991-01-29 | 1997-03-26 | 三菱電機株式会社 | 半導体装置 |
US5250843A (en) * | 1991-03-27 | 1993-10-05 | Integrated System Assemblies Corp. | Multichip integrated circuit modules |
JP2749489B2 (ja) | 1992-10-29 | 1998-05-13 | 京セラ株式会社 | 回路基板 |
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US5370766A (en) | 1993-08-16 | 1994-12-06 | California Micro Devices | Methods for fabrication of thin film inductors, inductor networks and integration with other passive and active devices |
US5514613A (en) | 1994-01-27 | 1996-05-07 | Integrated Device Technology | Parallel manufacturing of semiconductor devices and the resulting structure |
US5478773A (en) | 1994-04-28 | 1995-12-26 | Motorola, Inc. | Method of making an electronic device having an integrated inductor |
US5446311A (en) | 1994-09-16 | 1995-08-29 | International Business Machines Corporation | High-Q inductors in silicon technology without expensive metalization |
US5571746A (en) | 1995-10-19 | 1996-11-05 | Chartered Semiconductor Manufacturing Pte Ltd. | Method of forming a back end capacitor with high unit capacitance |
US5866952A (en) | 1995-11-30 | 1999-02-02 | Lockheed Martin Corporation | High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate |
US5821456A (en) * | 1996-05-01 | 1998-10-13 | Motorola, Inc. | Microelectronic assembly including a decomposable encapsulant, and method for forming and reworking same |
US5841193A (en) * | 1996-05-20 | 1998-11-24 | Epic Technologies, Inc. | Single chip modules, repairable multichip modules, and methods of fabrication thereof |
US6294420B1 (en) | 1997-01-31 | 2001-09-25 | Texas Instruments Incorporated | Integrated circuit capacitor |
JP3587019B2 (ja) * | 1997-04-08 | 2004-11-10 | ソニー株式会社 | 半導体装置の製造方法 |
SE520173C2 (sv) | 1997-04-29 | 2003-06-03 | Ericsson Telefon Ab L M | Förfarande för tillverkning av en kondensator i en integrerad krets |
US6236101B1 (en) | 1997-11-05 | 2001-05-22 | Texas Instruments Incorporated | Metallization outside protective overcoat for improved capacitors and inductors |
US6075427A (en) | 1998-01-23 | 2000-06-13 | Lucent Technologies Inc. | MCM with high Q overlapping resonator |
US6218015B1 (en) * | 1998-02-13 | 2001-04-17 | World Properties, Inc. | Casting mixtures comprising granular and dispersion fluoropolymers |
DE19903500A1 (de) | 1999-01-29 | 2000-08-03 | Philips Corp Intellectual Pty | Dünnschichtschaltkreis mit Bauteil |
US6036809A (en) * | 1999-02-16 | 2000-03-14 | International Business Machines Corporation | Process for releasing a thin-film structure from a substrate |
US6168965B1 (en) * | 1999-08-12 | 2001-01-02 | Tower Semiconductor Ltd. | Method for making backside illuminated image sensor |
US6511901B1 (en) | 1999-11-05 | 2003-01-28 | Atmel Corporation | Metal redistribution layer having solderable pads and wire bondable pads |
DE19961683A1 (de) | 1999-12-21 | 2001-06-28 | Philips Corp Intellectual Pty | Bauteil mit Dünnschichtschaltkreis |
US6180445B1 (en) | 2000-04-24 | 2001-01-30 | Taiwan Semiconductor Manufacturing Company | Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed |
US6657707B1 (en) * | 2000-06-28 | 2003-12-02 | Advanced Micro Devices, Inc. | Metallurgical inspection and/or analysis of flip-chip pads and interfaces |
US6761963B2 (en) | 2000-09-21 | 2004-07-13 | Michael D. Casper | Integrated thin film capacitor/inductor/interconnect system and method |
TW577152B (en) | 2000-12-18 | 2004-02-21 | Hitachi Ltd | Semiconductor integrated circuit device |
WO2002061827A1 (fr) * | 2001-01-31 | 2002-08-08 | Sony Corporation | DISPOSITIF à SEMI-CONDUCTEUR ET SON PROCEDE DE FABRICATION |
US20020111011A1 (en) * | 2001-02-15 | 2002-08-15 | King-Lung Wu | Method for forming a contact plug without a dimple surface |
US6362012B1 (en) | 2001-03-05 | 2002-03-26 | Taiwan Semiconductor Manufacturing Company | Structure of merged vertical capacitor inside spiral conductor for RF and mixed-signal applications |
EP1251577B1 (en) * | 2001-04-19 | 2007-04-25 | Interuniversitair Microelektronica Centrum Vzw | Fabrication of integrated tunable/switchable passive microwave and millimeter wave modules |
US6534853B2 (en) | 2001-06-05 | 2003-03-18 | Chipmos Technologies Inc. | Semiconductor wafer designed to avoid probed marks while testing |
US6534374B2 (en) | 2001-06-07 | 2003-03-18 | Institute Of Microelectronics | Single damascene method for RF IC passive component integration in copper interconnect process |
FR2829290B1 (fr) * | 2001-08-31 | 2004-09-17 | Atmel Grenoble Sa | Capteur d'image couleur sur substrat transparent et procede de fabrication |
US6636139B2 (en) | 2001-09-10 | 2003-10-21 | Taiwan Semiconductor Manufacturing Company | Structure to reduce the degradation of the Q value of an inductor caused by via resistance |
JP2003101222A (ja) | 2001-09-21 | 2003-04-04 | Sony Corp | 薄膜回路基板装置及びその製造方法 |
KR100429881B1 (ko) | 2001-11-02 | 2004-05-03 | 삼성전자주식회사 | 셀 영역 위에 퓨즈 회로부가 있는 반도체 소자 및 그제조방법 |
JP2003282614A (ja) * | 2002-03-20 | 2003-10-03 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP2003304065A (ja) * | 2002-04-08 | 2003-10-24 | Sony Corp | 回路基板装置及びその製造方法、並びに半導体装置及びその製造方法 |
US6818469B2 (en) | 2002-05-27 | 2004-11-16 | Nec Corporation | Thin film capacitor, method for manufacturing the same and printed circuit board incorporating the same |
US6900708B2 (en) | 2002-06-26 | 2005-05-31 | Georgia Tech Research Corporation | Integrated passive devices fabricated utilizing multi-layer, organic laminates |
JP2004079701A (ja) | 2002-08-14 | 2004-03-11 | Sony Corp | 半導体装置及びその製造方法 |
US7323772B2 (en) | 2002-08-28 | 2008-01-29 | Micron Technology, Inc. | Ball grid array structures and tape-based method of manufacturing same |
US6969914B2 (en) | 2002-08-29 | 2005-11-29 | Micron Technology, Inc. | Electronic device package |
US6902981B2 (en) | 2002-10-10 | 2005-06-07 | Chartered Semiconductor Manufacturing Ltd | Structure and process for a capacitor and other devices |
US6730573B1 (en) | 2002-11-01 | 2004-05-04 | Chartered Semiconductor Manufacturing Ltd. | MIM and metal resistor formation at CU beol using only one extra mask |
US7417323B2 (en) | 2002-11-06 | 2008-08-26 | Irvine Sensors Corp. | Neo-wafer device and method |
US6800534B2 (en) | 2002-12-09 | 2004-10-05 | Taiwan Semiconductor Manufacturing Company | Method of forming embedded MIM capacitor and zigzag inductor scheme |
US7230316B2 (en) * | 2002-12-27 | 2007-06-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having transferred integrated circuit |
JP4574118B2 (ja) * | 2003-02-12 | 2010-11-04 | 株式会社半導体エネルギー研究所 | 半導体装置及びその作製方法 |
MY134318A (en) | 2003-04-02 | 2007-12-31 | Freescale Semiconductor Inc | Integrated circuit die having a copper contact and method therefor |
US6713835B1 (en) * | 2003-05-22 | 2004-03-30 | International Business Machines Corporation | Method for manufacturing a multi-level interconnect structure |
JP4016340B2 (ja) * | 2003-06-13 | 2007-12-05 | ソニー株式会社 | 半導体装置及びその実装構造、並びにその製造方法 |
US7470997B2 (en) | 2003-07-23 | 2008-12-30 | Megica Corporation | Wirebond pad for semiconductor chip or wafer |
GB2406720B (en) | 2003-09-30 | 2006-09-13 | Agere Systems Inc | An inductor formed in an integrated circuit |
JP2005175262A (ja) | 2003-12-12 | 2005-06-30 | Renesas Technology Corp | 半導体装置およびその製造方法 |
KR100543729B1 (ko) | 2004-03-24 | 2006-01-20 | 아바고테크놀로지스코리아 주식회사 | 열 방출 효율이 높고 두께는 물론 크기를 감소시킨 고주파모듈 패키지 및 그 조립 방법 |
JP4707330B2 (ja) | 2004-03-30 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US7382056B2 (en) | 2004-04-29 | 2008-06-03 | Sychip Inc. | Integrated passive devices |
US7259077B2 (en) | 2004-04-29 | 2007-08-21 | Sychip Inc. | Integrated passive devices |
TW200604372A (en) | 2004-06-11 | 2006-02-01 | Mitsubishi Materials Corp | Material for forming capacitor film |
US7468545B2 (en) * | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
US7429510B2 (en) | 2005-07-05 | 2008-09-30 | Endicott Interconnect Technologies, Inc. | Method of making a capacitive substrate using photoimageable dielectric for use as part of a larger circuitized substrate, method of making said circuitized substrate and method of making an information handling system including said circuitized substrate |
US8335084B2 (en) | 2005-08-01 | 2012-12-18 | Georgia Tech Research Corporation | Embedded actives and discrete passives in a cavity within build-up layers |
US7851257B2 (en) | 2005-10-29 | 2010-12-14 | Stats Chippac Ltd. | Integrated circuit stacking system with integrated passive components |
US8158510B2 (en) | 2009-11-19 | 2012-04-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming IPD on molded substrate |
US8409970B2 (en) | 2005-10-29 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of making integrated passive devices |
US8669637B2 (en) * | 2005-10-29 | 2014-03-11 | Stats Chippac Ltd. | Integrated passive device system |
US20070235878A1 (en) | 2006-03-30 | 2007-10-11 | Stats Chippac Ltd. | Integrated circuit package system with post-passivation interconnection and integration |
IL175011A (en) | 2006-04-20 | 2011-09-27 | Amitech Ltd | Coreless cavity substrates for chip packaging and their fabrication |
US7602027B2 (en) | 2006-12-29 | 2009-10-13 | Semiconductor Components Industries, L.L.C. | Semiconductor component and method of manufacture |
US7619901B2 (en) * | 2007-06-25 | 2009-11-17 | Epic Technologies, Inc. | Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system |
US7816792B2 (en) | 2007-09-14 | 2010-10-19 | Infineon Technologies Ag | Semiconductor device with conductive interconnect |
US7986023B2 (en) | 2007-09-17 | 2011-07-26 | Infineon Technologies Ag | Semiconductor device with inductor |
US7790503B2 (en) * | 2007-12-18 | 2010-09-07 | Stats Chippac, Ltd. | Semiconductor device and method of forming integrated passive device module |
US7749814B2 (en) | 2008-03-13 | 2010-07-06 | Stats Chippac, Ltd. | Semiconductor device with integrated passive circuit and method of making the same using sacrificial substrate |
-
2007
- 2007-12-03 US US11/949,255 patent/US8409970B2/en active Active
-
2008
- 2008-10-16 TW TW097139646A patent/TWI452639B/zh active
- 2008-10-16 SG SG201103214-1A patent/SG171655A1/en unknown
- 2008-10-16 SG SG200807737-2A patent/SG152989A1/en unknown
- 2008-11-18 KR KR1020080114581A patent/KR101537114B1/ko active IP Right Grant
-
2013
- 2013-03-01 US US13/782,939 patent/US9449925B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20130175668A1 (en) | 2013-07-11 |
KR20090057894A (ko) | 2009-06-08 |
US8409970B2 (en) | 2013-04-02 |
US9449925B2 (en) | 2016-09-20 |
TWI452639B (zh) | 2014-09-11 |
US20090140421A1 (en) | 2009-06-04 |
KR101537114B1 (ko) | 2015-07-15 |
SG171655A1 (en) | 2011-06-29 |
TW200926322A (en) | 2009-06-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG152989A1 (en) | Semiconductor device and method of making integrated passive devices | |
US8492181B2 (en) | Embedded wafer level optical package structure and manufacturing method | |
SG153719A1 (en) | System-in-package having integrated passive devices and method therefor | |
SG152981A1 (en) | Wafer level package integration and method | |
WO2009002381A3 (en) | Mold compound circuit structure for enhanced electrical and thermal performance | |
KR100660604B1 (ko) | 금속 박편을 이용한 수동 소자 및 반도체 패키지의제조방법 | |
SG170064A1 (en) | Solder bump with inner core pillar in semiconductor package | |
JP2017531919A (ja) | 集積回路ダイが埋設された可撓性電子回路並びにその製造方法及び使用方法 | |
TW200629490A (en) | Semiconductor device, method of manufacturing the same, capacitor structure, and method of manufacturing the same | |
TW200735312A (en) | Wafer level package including a device wafer integrated with a passive component | |
TW200721424A (en) | Semiconductor device | |
TW200721399A (en) | Semiconductor device, stacked semiconductor device, and manufacturing method for semiconductor device | |
TW200802799A (en) | Semiconductor device | |
SG170099A1 (en) | Integrated circuit package system with warp-free chip | |
TW200802782A (en) | Chip module for complete power train | |
EP1840941A3 (en) | Semiconductor device and manufacturing method thereof | |
SG153720A1 (en) | Semiconductor device and method of forming integrated passive device module | |
EP1681717A4 (en) | ELECTRONIC DEVICE AND PROCESS FOR THEIR MANUFACTURE | |
WO2008008581A3 (en) | An electronics package with an integrated circuit device having post wafer fabrication integrated passive components | |
SG148987A1 (en) | Inter-connecting structure for semiconductor device package and method of the same | |
TW200504952A (en) | Method of manufacturing semiconductor package and method of manufacturing semiconductor device | |
SG162682A1 (en) | Manufacturing method for semiconductor devices | |
TW200614403A (en) | Method of manufacturing semiconductor device, semiconductor device, and mounting structure of semiconductor device | |
WO2009028596A1 (ja) | 受動素子内蔵基板、製造方法、及び半導体装置 | |
NZ587889A (en) | Semiconductor device, and communication apparatus and electronic apparatus having the same |