SG146578A1 - Halogen-free amorphous carbon mask etch having high selectivity to photoresist - Google Patents

Halogen-free amorphous carbon mask etch having high selectivity to photoresist

Info

Publication number
SG146578A1
SG146578A1 SG200802285-7A SG2008022857A SG146578A1 SG 146578 A1 SG146578 A1 SG 146578A1 SG 2008022857 A SG2008022857 A SG 2008022857A SG 146578 A1 SG146578 A1 SG 146578A1
Authority
SG
Singapore
Prior art keywords
amorphous carbon
halogen
etch
free
high selectivity
Prior art date
Application number
SG200802285-7A
Other languages
English (en)
Inventor
Jong Mun Kim
Judy Wang
Ajey M Joshi
Jingbao Liu
Bryan Y Pu
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of SG146578A1 publication Critical patent/SG146578A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
SG200802285-7A 2007-03-21 2008-03-24 Halogen-free amorphous carbon mask etch having high selectivity to photoresist SG146578A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/689,389 US7807064B2 (en) 2007-03-21 2007-03-21 Halogen-free amorphous carbon mask etch having high selectivity to photoresist

Publications (1)

Publication Number Publication Date
SG146578A1 true SG146578A1 (en) 2008-10-30

Family

ID=39462093

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200802285-7A SG146578A1 (en) 2007-03-21 2008-03-24 Halogen-free amorphous carbon mask etch having high selectivity to photoresist

Country Status (7)

Country Link
US (1) US7807064B2 (ko)
EP (1) EP1973148A3 (ko)
JP (1) JP2008263186A (ko)
KR (1) KR20080086385A (ko)
CN (1) CN101320224A (ko)
SG (1) SG146578A1 (ko)
TW (1) TW200905726A (ko)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2643510C (en) 2006-02-27 2014-04-29 Microcontinuum, Inc. Formation of pattern replicating tools
KR100976647B1 (ko) * 2007-04-25 2010-08-18 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US20090004875A1 (en) * 2007-06-27 2009-01-01 Meihua Shen Methods of trimming amorphous carbon film for forming ultra thin structures on a substrate
KR100919350B1 (ko) * 2008-04-24 2009-09-25 주식회사 하이닉스반도체 반도체 소자의 패턴 형성 방법
EP2144117A1 (en) * 2008-07-11 2010-01-13 The Provost, Fellows and Scholars of the College of the Holy and Undivided Trinity of Queen Elizabeth near Dublin Process and system for fabrication of patterns on a surface
JP2010283095A (ja) * 2009-06-04 2010-12-16 Hitachi Ltd 半導体装置の製造方法
US8252699B2 (en) 2010-11-22 2012-08-28 Applied Materials, Inc. Composite removable hardmask
TW201304162A (zh) * 2011-05-17 2013-01-16 Intevac Inc 製作太陽能電池背側點接觸的方法
CN102354669B (zh) * 2011-10-25 2013-02-27 上海华力微电子有限公司 硅纳米线器件的制作方法
CN103137443B (zh) * 2011-11-25 2015-11-25 中芯国际集成电路制造(上海)有限公司 无定形碳硬掩膜层的形成方法及刻蚀方法
US9589797B2 (en) 2013-05-17 2017-03-07 Microcontinuum, Inc. Tools and methods for producing nanoantenna electronic devices
KR102132361B1 (ko) * 2013-11-06 2020-07-10 매슨 테크놀로지 인크 수직 앤에이앤디 디바이스에 대한 새로운 마스크 제거 방법
CN105355538A (zh) * 2014-08-21 2016-02-24 北京北方微电子基地设备工艺研究中心有限责任公司 一种刻蚀方法
US9455135B2 (en) 2014-12-07 2016-09-27 United Microelectronics Corp. Method for fabricating semiconductor device
WO2017151622A1 (en) * 2016-03-04 2017-09-08 Tokyo Electron Limited Trim method for patterning during various stages of an integration scheme
US9852924B1 (en) * 2016-08-24 2017-12-26 Lam Research Corporation Line edge roughness improvement with sidewall sputtering
WO2018111333A1 (en) 2016-12-14 2018-06-21 Mattson Technology, Inc. Atomic layer etch process using plasma in conjunction with a rapid thermal activation process
CN107968094A (zh) * 2017-11-21 2018-04-27 长江存储科技有限责任公司 一种用于3d nand闪存的台阶结构成形工艺
US10811270B2 (en) * 2019-03-15 2020-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Ultra narrow trench patterning using plasma etching

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6387819B1 (en) * 1998-04-29 2002-05-14 Applied Materials, Inc. Method for etching low K dielectric layers
US6194128B1 (en) * 1998-09-17 2001-02-27 Taiwan Semiconductor Manufacturing Company Method of dual damascene etching
US6326307B1 (en) * 1999-11-15 2001-12-04 Appllied Materials, Inc. Plasma pretreatment of photoresist in an oxide etch process
US6541361B2 (en) * 2001-06-27 2003-04-01 Lam Research Corp. Plasma enhanced method for increasing silicon-containing photoresist selectivity
US6767824B2 (en) * 2002-09-23 2004-07-27 Padmapani C. Nallan Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask
US6900123B2 (en) * 2003-03-20 2005-05-31 Texas Instruments Incorporated BARC etch comprising a selective etch chemistry and a high polymerizing gas for CD control
US7129180B2 (en) * 2003-09-12 2006-10-31 Micron Technology, Inc. Masking structure having multiple layers including an amorphous carbon layer
US6911399B2 (en) * 2003-09-19 2005-06-28 Applied Materials, Inc. Method of controlling critical dimension microloading of photoresist trimming process by selective sidewall polymer deposition
US7572386B2 (en) * 2006-08-07 2009-08-11 Tokyo Electron Limited Method of treating a mask layer prior to performing an etching process

Also Published As

Publication number Publication date
CN101320224A (zh) 2008-12-10
EP1973148A3 (en) 2009-10-14
US7807064B2 (en) 2010-10-05
EP1973148A2 (en) 2008-09-24
KR20080086385A (ko) 2008-09-25
TW200905726A (en) 2009-02-01
US20080230511A1 (en) 2008-09-25
JP2008263186A (ja) 2008-10-30

Similar Documents

Publication Publication Date Title
SG146578A1 (en) Halogen-free amorphous carbon mask etch having high selectivity to photoresist
US8465903B2 (en) Radiation patternable CVD film
EP1154468A3 (en) Method of depositing an amorphous carbon layer
WO2010033924A3 (en) Etch reactor suitable for etching high aspect ratio features
SG145568A1 (en) Process for etching dielectric films with improved resist and/or etch profile characteristics using etch gas with fluorocarbon and hydrogen
KR100866735B1 (ko) 반도체 소자의 미세 패턴 형성 방법
JP2007305976A (ja) 半導体素子の微細パターン形成方法
TW200746293A (en) Plasma etching method
SG142213A1 (en) Etching of nano-imprint templates using an etch reactor
TW200933744A (en) Method of controlling etch microloading for a tungsten-containing layer
WO2003049173A1 (fr) Procede de nitruration de film isolant, dispositif a semi-conducteur et son procede de production et dispositif et procede de traitement de surface
JP2009076661A (ja) 半導体装置の製造方法
ATE514181T1 (de) Verfahren zur ausbildung eines dielektrischen films
US20090311635A1 (en) Double exposure patterning with carbonaceous hardmask
TW200943408A (en) Line width roughness control with ARC layer open
TWI832788B (zh) 光罩空白基板及光罩之製造方法
KR20200063945A (ko) 펠리클 구조체 및 이의 제조방법
WO2009085597A3 (en) Cd bias loading control with arc layer open
US20090047789A1 (en) Method for fabricating semiconductor device
KR20070109787A (ko) 반도체 소자의 미세패턴 형성방법
TW200503068A (en) A method of patterning photoresist on a wafer using a reflective mask with a multi-layer ARC
KR960026345A (ko) 반도체장치의 제조방법
JP2006332619A5 (ko)
WO2008121137A3 (en) Fabrication of microstructures and nanostructures using etching resist
TW200501225A (en) Method and apparatus for bilayer photoresist dry development