SG11201705672XA - Conductive post protection for integrated circuit packages - Google Patents

Conductive post protection for integrated circuit packages

Info

Publication number
SG11201705672XA
SG11201705672XA SG11201705672XA SG11201705672XA SG11201705672XA SG 11201705672X A SG11201705672X A SG 11201705672XA SG 11201705672X A SG11201705672X A SG 11201705672XA SG 11201705672X A SG11201705672X A SG 11201705672XA SG 11201705672X A SG11201705672X A SG 11201705672XA
Authority
SG
Singapore
Prior art keywords
integrated circuit
conductive post
circuit packages
post protection
protection
Prior art date
Application number
SG11201705672XA
Other languages
English (en)
Inventor
Jie Fu
Chin-Kwan Kim
Manuel Aldrete
Milind Pravin Shah
Dwayne Richard Shirley
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of SG11201705672XA publication Critical patent/SG11201705672XA/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/66Conductive materials thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/401Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
SG11201705672XA 2015-02-20 2016-02-18 Conductive post protection for integrated circuit packages SG11201705672XA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562118886P 2015-02-20 2015-02-20
US14/859,318 US9768108B2 (en) 2015-02-20 2015-09-20 Conductive post protection for integrated circuit packages
PCT/US2016/018504 WO2016134165A1 (en) 2015-02-20 2016-02-18 Conductive post protection for integrated circuit packages

Publications (1)

Publication Number Publication Date
SG11201705672XA true SG11201705672XA (en) 2017-09-28

Family

ID=55442905

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201705672XA SG11201705672XA (en) 2015-02-20 2016-02-18 Conductive post protection for integrated circuit packages

Country Status (8)

Country Link
US (1) US9768108B2 (https=)
EP (1) EP3259776A1 (https=)
JP (1) JP6789228B2 (https=)
KR (1) KR102469282B1 (https=)
CN (1) CN107251217B (https=)
BR (1) BR112017017746A2 (https=)
SG (1) SG11201705672XA (https=)
WO (1) WO2016134165A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102397905B1 (ko) 2017-12-27 2022-05-13 삼성전자주식회사 인터포저 기판 및 반도체 패키지
US11791276B2 (en) * 2021-04-08 2023-10-17 Qualcomm Incorporated Package comprising passive component between substrates for improved power distribution network (PDN) performance
WO2023135720A1 (ja) * 2022-01-14 2023-07-20 キヤノン株式会社 モジュールおよび機器
US20250323136A1 (en) * 2024-04-12 2025-10-16 Qualcomm Incorporated Integrated circuit (ic) package including two substrates and vertical interconnects coupling the two substrates, the vertical interconnects comprising a metal ball and metal pin combination to address an increased distance between substrates

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JP2000208698A (ja) * 1999-01-18 2000-07-28 Toshiba Corp 半導体装置
JP2003347501A (ja) * 2002-05-23 2003-12-05 Hitachi Cable Ltd 半導体モジュール及びそれに用いる配線板、ならびに半導体モジュールの製造方法及び配線板の製造方法
JP3973624B2 (ja) * 2003-12-24 2007-09-12 富士通株式会社 高周波デバイス
JP4396839B2 (ja) * 2004-08-11 2010-01-13 日本電気株式会社 キャビティ構造プリント配線板とその製造方法及び実装構造
JP4551321B2 (ja) * 2005-07-21 2010-09-29 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP2007053235A (ja) * 2005-08-18 2007-03-01 Matsushita Electric Ind Co Ltd 基台及び半導体デバイス
JP2007123524A (ja) * 2005-10-27 2007-05-17 Shinko Electric Ind Co Ltd 電子部品内蔵基板
US7632708B2 (en) 2005-12-27 2009-12-15 Tessera, Inc. Microelectronic component with photo-imageable substrate
JP2007194436A (ja) * 2006-01-19 2007-08-02 Elpida Memory Inc 半導体パッケージ、導電性ポスト付き基板、積層型半導体装置、半導体パッケージの製造方法及び積層型半導体装置の製造方法
JP2009099750A (ja) * 2007-10-17 2009-05-07 Powertech Technology Inc 半導体パッケージ
JP5185062B2 (ja) * 2008-10-21 2013-04-17 パナソニック株式会社 積層型半導体装置及び電子機器
US8623753B1 (en) * 2009-05-28 2014-01-07 Amkor Technology, Inc. Stackable protruding via package and method
JP2011095705A (ja) * 2009-09-30 2011-05-12 Fujifilm Corp 感光性組成物、感光性ソルダーレジスト組成物及び感光性ソルダーレジストフィルム、並びに、永久パターン、その形成方法及びプリント基板
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CN103632988B (zh) * 2012-08-28 2016-10-19 宏启胜精密电子(秦皇岛)有限公司 层叠封装结构及其制作方法
CN103681365B (zh) * 2012-08-31 2016-08-10 宏启胜精密电子(秦皇岛)有限公司 层叠封装结构及其制作方法
CN103681359A (zh) * 2012-09-19 2014-03-26 宏启胜精密电子(秦皇岛)有限公司 层叠封装结构及其制作方法
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Also Published As

Publication number Publication date
JP2018507556A (ja) 2018-03-15
CN107251217A (zh) 2017-10-13
KR20170113581A (ko) 2017-10-12
WO2016134165A1 (en) 2016-08-25
EP3259776A1 (en) 2017-12-27
US9768108B2 (en) 2017-09-19
CN107251217B (zh) 2021-03-12
KR102469282B1 (ko) 2022-11-18
US20160247754A1 (en) 2016-08-25
BR112017017746A2 (en) 2018-04-03
JP6789228B2 (ja) 2020-11-25

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