FR2795866B1
(fr)
*
|
1999-06-30 |
2001-08-17 |
Commissariat Energie Atomique |
Procede de realisation d'une membrane mince et structure a membrane ainsi obtenue
|
US6350653B1
(en)
*
|
2000-10-12 |
2002-02-26 |
International Business Machines Corporation |
Embedded DRAM on silicon-on-insulator substrate
|
US6413857B1
(en)
*
|
2001-04-02 |
2002-07-02 |
Advanced Micro Devices, Inc. |
Method of creating ground to avoid charging in SOI products
|
TW540154B
(en)
*
|
2001-06-04 |
2003-07-01 |
Promos Technologies Inc |
Deep trench capacitor structure and its manufacturing method
|
TWI230392B
(en)
|
2001-06-18 |
2005-04-01 |
Innovative Silicon Sa |
Semiconductor device
|
US6553561B2
(en)
*
|
2001-08-02 |
2003-04-22 |
International Business Machines Corporation |
Method for patterning a silicon-on-insulator photomask
|
JP4322453B2
(ja)
*
|
2001-09-27 |
2009-09-02 |
株式会社東芝 |
半導体装置およびその製造方法
|
US6885080B2
(en)
*
|
2002-02-22 |
2005-04-26 |
International Business Machines Corporation |
Deep trench isolation of embedded DRAM for improved latch-up immunity
|
EP1357603A3
(en)
|
2002-04-18 |
2004-01-14 |
Innovative Silicon SA |
Semiconductor device
|
EP1355316B1
(en)
*
|
2002-04-18 |
2007-02-21 |
Innovative Silicon SA |
Data storage device and refreshing method for use with such device
|
US6750097B2
(en)
|
2002-07-30 |
2004-06-15 |
International Business Machines Corporation |
Method of fabricating a patterened SOI embedded DRAM/eDRAM having a vertical device cell and device formed thereby
|
CN100505218C
(zh)
*
|
2003-01-08 |
2009-06-24 |
国际商业机器公司 |
半导体结构及其制作方法
|
US7085153B2
(en)
*
|
2003-05-13 |
2006-08-01 |
Innovative Silicon S.A. |
Semiconductor memory cell, array, architecture and device, and method of operating same
|
US6912150B2
(en)
*
|
2003-05-13 |
2005-06-28 |
Lionel Portman |
Reference current generator, and method of programming, adjusting and/or operating same
|
US20040228168A1
(en)
|
2003-05-13 |
2004-11-18 |
Richard Ferrant |
Semiconductor memory device and method of operating same
|
US7073139B2
(en)
*
|
2003-06-03 |
2006-07-04 |
International Business Machines Corporation |
Method for determining cell body and biasing plate contact locations for embedded dram in SOI
|
US6964897B2
(en)
*
|
2003-06-09 |
2005-11-15 |
International Business Machines Corporation |
SOI trench capacitor cell incorporating a low-leakage floating body array transistor
|
US7202118B1
(en)
*
|
2003-06-13 |
2007-04-10 |
Advanced Micro Devices, Inc. |
Fully depleted SOI MOSFET arrangement with sunken source/drain regions
|
US6787838B1
(en)
*
|
2003-06-18 |
2004-09-07 |
International Business Machines Corporation |
Trench capacitor DRAM cell using buried oxide as array top oxide
|
US7335934B2
(en)
*
|
2003-07-22 |
2008-02-26 |
Innovative Silicon S.A. |
Integrated circuit device, and method of fabricating same
|
US7232718B2
(en)
*
|
2003-09-17 |
2007-06-19 |
Nanya Technology Corp. |
Method for forming a deep trench capacitor buried plate
|
US7184298B2
(en)
*
|
2003-09-24 |
2007-02-27 |
Innovative Silicon S.A. |
Low power programming technique for a floating body memory transistor, memory cell, and memory array
|
KR100541709B1
(ko)
*
|
2004-03-18 |
2006-01-11 |
매그나칩 반도체 유한회사 |
에스오아이 소자 제조방법
|
US7118986B2
(en)
*
|
2004-06-16 |
2006-10-10 |
International Business Machines Corporation |
STI formation in semiconductor device including SOI and bulk silicon regions
|
US7102204B2
(en)
*
|
2004-06-29 |
2006-09-05 |
International Business Machines Corporation |
Integrated SOI fingered decoupling capacitor
|
US7476939B2
(en)
*
|
2004-11-04 |
2009-01-13 |
Innovative Silicon Isi Sa |
Memory cell having an electrically floating body transistor and programming technique therefor
|
US7251164B2
(en)
*
|
2004-11-10 |
2007-07-31 |
Innovative Silicon S.A. |
Circuitry for and method of improving statistical distribution of integrated circuits
|
US7301838B2
(en)
*
|
2004-12-13 |
2007-11-27 |
Innovative Silicon S.A. |
Sense amplifier circuitry and architecture to write data into and/or read from memory cells
|
US7301803B2
(en)
*
|
2004-12-22 |
2007-11-27 |
Innovative Silicon S.A. |
Bipolar reading technique for a memory cell having an electrically floating body transistor
|
US7485910B2
(en)
*
|
2005-04-08 |
2009-02-03 |
International Business Machines Corporation |
Simplified vertical array device DRAM/eDRAM integration: method and structure
|
KR100677772B1
(ko)
*
|
2005-06-30 |
2007-02-02 |
주식회사 하이닉스반도체 |
깊은 콘택홀을 갖는 반도체소자의 제조 방법
|
US20070023833A1
(en)
*
|
2005-07-28 |
2007-02-01 |
Serguei Okhonin |
Method for reading a memory cell having an electrically floating body transistor, and memory cell and array implementing same
|
US7606066B2
(en)
|
2005-09-07 |
2009-10-20 |
Innovative Silicon Isi Sa |
Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
|
US7355916B2
(en)
|
2005-09-19 |
2008-04-08 |
Innovative Silicon S.A. |
Method and circuitry to generate a reference current for reading a memory cell, and device implementing same
|
US20070085140A1
(en)
*
|
2005-10-19 |
2007-04-19 |
Cedric Bassin |
One transistor memory cell having strained electrically floating body region, and method of operating same
|
US7683430B2
(en)
*
|
2005-12-19 |
2010-03-23 |
Innovative Silicon Isi Sa |
Electrically floating body memory cell and array, and method of operating or controlling same
|
US7542345B2
(en)
*
|
2006-02-16 |
2009-06-02 |
Innovative Silicon Isi Sa |
Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same
|
US7492632B2
(en)
*
|
2006-04-07 |
2009-02-17 |
Innovative Silicon Isi Sa |
Memory array having a programmable word length, and method of operating same
|
US7606098B2
(en)
|
2006-04-18 |
2009-10-20 |
Innovative Silicon Isi Sa |
Semiconductor memory array architecture with grouped memory cells, and method of controlling same
|
WO2007128738A1
(en)
*
|
2006-05-02 |
2007-11-15 |
Innovative Silicon Sa |
Semiconductor memory cell and array using punch-through to program and read same
|
US8069377B2
(en)
*
|
2006-06-26 |
2011-11-29 |
Micron Technology, Inc. |
Integrated circuit having memory array including ECC and column redundancy and method of operating the same
|
US7542340B2
(en)
*
|
2006-07-11 |
2009-06-02 |
Innovative Silicon Isi Sa |
Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
|
US20080108212A1
(en)
*
|
2006-10-19 |
2008-05-08 |
Atmel Corporation |
High voltage vertically oriented eeprom device
|
KR101277402B1
(ko)
|
2007-01-26 |
2013-06-20 |
마이크론 테크놀로지, 인코포레이티드 |
게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 dram 트랜지스터
|
WO2009031052A2
(en)
|
2007-03-29 |
2009-03-12 |
Innovative Silicon S.A. |
Zero-capacitor (floating body) random access memory circuits with polycide word lines and manufacturing methods therefor
|
US7808028B2
(en)
|
2007-04-18 |
2010-10-05 |
International Business Machines Corporation |
Trench structure and method of forming trench structure
|
US8064274B2
(en)
|
2007-05-30 |
2011-11-22 |
Micron Technology, Inc. |
Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
|
US8085594B2
(en)
*
|
2007-06-01 |
2011-12-27 |
Micron Technology, Inc. |
Reading technique for memory cell with electrically floating body transistor
|
US8194487B2
(en)
|
2007-09-17 |
2012-06-05 |
Micron Technology, Inc. |
Refreshing data of memory cells with electrically floating body transistors
|
US8536628B2
(en)
|
2007-11-29 |
2013-09-17 |
Micron Technology, Inc. |
Integrated circuit having memory cell array including barriers, and method of manufacturing same
|
US8349662B2
(en)
*
|
2007-12-11 |
2013-01-08 |
Micron Technology, Inc. |
Integrated circuit having memory cell array, and method of manufacturing same
|
US20090159947A1
(en)
*
|
2007-12-19 |
2009-06-25 |
International Business Machines Corporation |
SIMPLIFIED VERTICAL ARRAY DEVICE DRAM/eDRAM INTEGRATION
|
US8773933B2
(en)
|
2012-03-16 |
2014-07-08 |
Micron Technology, Inc. |
Techniques for accessing memory cells
|
US8014195B2
(en)
*
|
2008-02-06 |
2011-09-06 |
Micron Technology, Inc. |
Single transistor memory cell
|
US8189376B2
(en)
*
|
2008-02-08 |
2012-05-29 |
Micron Technology, Inc. |
Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
|
US7957206B2
(en)
*
|
2008-04-04 |
2011-06-07 |
Micron Technology, Inc. |
Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
|
US7791124B2
(en)
*
|
2008-05-21 |
2010-09-07 |
International Business Machines Corporation |
SOI deep trench capacitor employing a non-conformal inner spacer
|
US7947543B2
(en)
|
2008-09-25 |
2011-05-24 |
Micron Technology, Inc. |
Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
|
US7933140B2
(en)
|
2008-10-02 |
2011-04-26 |
Micron Technology, Inc. |
Techniques for reducing a voltage swing
|
US7924630B2
(en)
*
|
2008-10-15 |
2011-04-12 |
Micron Technology, Inc. |
Techniques for simultaneously driving a plurality of source lines
|
US8223574B2
(en)
*
|
2008-11-05 |
2012-07-17 |
Micron Technology, Inc. |
Techniques for block refreshing a semiconductor memory device
|
US8213226B2
(en)
*
|
2008-12-05 |
2012-07-03 |
Micron Technology, Inc. |
Vertical transistor memory cell and array
|
US8426268B2
(en)
|
2009-02-03 |
2013-04-23 |
International Business Machines Corporation |
Embedded DRAM memory cell with additional patterning layer for improved strap formation
|
US8319294B2
(en)
*
|
2009-02-18 |
2012-11-27 |
Micron Technology, Inc. |
Techniques for providing a source line plane
|
US8030707B2
(en)
*
|
2009-02-23 |
2011-10-04 |
International Business Machines Corporation |
Semiconductor structure
|
WO2010102106A2
(en)
|
2009-03-04 |
2010-09-10 |
Innovative Silicon Isi Sa |
Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
|
WO2010114890A1
(en)
*
|
2009-03-31 |
2010-10-07 |
Innovative Silicon Isi Sa |
Techniques for providing a semiconductor memory device
|
US8139418B2
(en)
|
2009-04-27 |
2012-03-20 |
Micron Technology, Inc. |
Techniques for controlling a direct injection semiconductor memory device
|
US8508994B2
(en)
*
|
2009-04-30 |
2013-08-13 |
Micron Technology, Inc. |
Semiconductor device with floating gate and electrically floating body
|
US8498157B2
(en)
*
|
2009-05-22 |
2013-07-30 |
Micron Technology, Inc. |
Techniques for providing a direct injection semiconductor memory device
|
US8537610B2
(en)
|
2009-07-10 |
2013-09-17 |
Micron Technology, Inc. |
Techniques for providing a semiconductor memory device
|
US9076543B2
(en)
*
|
2009-07-27 |
2015-07-07 |
Micron Technology, Inc. |
Techniques for providing a direct injection semiconductor memory device
|
US8199595B2
(en)
*
|
2009-09-04 |
2012-06-12 |
Micron Technology, Inc. |
Techniques for sensing a semiconductor memory device
|
US8786009B2
(en)
*
|
2009-11-03 |
2014-07-22 |
Samsung Electronics Co., Ltd. |
Substrate structures including buried wiring, semiconductor devices including substrate structures, and method of fabricating the same
|
US8174881B2
(en)
|
2009-11-24 |
2012-05-08 |
Micron Technology, Inc. |
Techniques for reducing disturbance in a semiconductor device
|
FR2953643B1
(fr)
|
2009-12-08 |
2012-07-27 |
Soitec Silicon On Insulator |
Cellule memoire flash sur seoi disposant d'une seconde grille de controle enterree sous la couche isolante
|
FR2953641B1
(fr)
|
2009-12-08 |
2012-02-10 |
S O I Tec Silicon On Insulator Tech |
Circuit de transistors homogenes sur seoi avec grille de controle arriere enterree sous la couche isolante
|
FR2957193B1
(fr)
|
2010-03-03 |
2012-04-20 |
Soitec Silicon On Insulator |
Cellule a chemin de donnees sur substrat seoi avec grille de controle arriere enterree sous la couche isolante
|
US8508289B2
(en)
|
2009-12-08 |
2013-08-13 |
Soitec |
Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer
|
US8310893B2
(en)
*
|
2009-12-16 |
2012-11-13 |
Micron Technology, Inc. |
Techniques for reducing impact of array disturbs in a semiconductor memory device
|
FR2955195B1
(fr)
|
2010-01-14 |
2012-03-09 |
Soitec Silicon On Insulator |
Dispositif de comparaison de donnees dans une memoire adressable par contenu sur seoi
|
FR2955200B1
(fr)
|
2010-01-14 |
2012-07-20 |
Soitec Silicon On Insulator |
Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree
|
FR2955204B1
(fr)
|
2010-01-14 |
2012-07-20 |
Soitec Silicon On Insulator |
Cellule memoire dram disposant d'un injecteur bipolaire vertical
|
FR2955203B1
(fr)
|
2010-01-14 |
2012-03-23 |
Soitec Silicon On Insulator |
Cellule memoire dont le canal traverse une couche dielectrique enterree
|
US9059319B2
(en)
*
|
2010-01-25 |
2015-06-16 |
International Business Machines Corporation |
Embedded dynamic random access memory device and method
|
US8416636B2
(en)
*
|
2010-02-12 |
2013-04-09 |
Micron Technology, Inc. |
Techniques for controlling a semiconductor memory device
|
US8133781B2
(en)
*
|
2010-02-15 |
2012-03-13 |
International Business Machines Corporation |
Method of forming a buried plate by ion implantation
|
US8576631B2
(en)
|
2010-03-04 |
2013-11-05 |
Micron Technology, Inc. |
Techniques for sensing a semiconductor memory device
|
US8411513B2
(en)
*
|
2010-03-04 |
2013-04-02 |
Micron Technology, Inc. |
Techniques for providing a semiconductor memory device having hierarchical bit lines
|
US8369177B2
(en)
*
|
2010-03-05 |
2013-02-05 |
Micron Technology, Inc. |
Techniques for reading from and/or writing to a semiconductor memory device
|
FR2957186B1
(fr)
|
2010-03-08 |
2012-09-28 |
Soitec Silicon On Insulator |
Cellule memoire de type sram
|
FR2957449B1
(fr)
|
2010-03-11 |
2022-07-15 |
S O I Tec Silicon On Insulator Tech |
Micro-amplificateur de lecture pour memoire
|
CN102812552B
(zh)
|
2010-03-15 |
2015-11-25 |
美光科技公司 |
半导体存储器装置及用于对半导体存储器装置进行偏置的方法
|
FR2958441B1
(fr)
|
2010-04-02 |
2012-07-13 |
Soitec Silicon On Insulator |
Circuit pseudo-inverseur sur seoi
|
EP2378549A1
(en)
|
2010-04-06 |
2011-10-19 |
S.O.I.Tec Silicon on Insulator Technologies |
Method for manufacturing a semiconductor substrate
|
EP2381470B1
(en)
|
2010-04-22 |
2012-08-22 |
Soitec |
Semiconductor device comprising a field-effect transistor in a silicon-on-insulator structure
|
US8411524B2
(en)
|
2010-05-06 |
2013-04-02 |
Micron Technology, Inc. |
Techniques for refreshing a semiconductor memory device
|
US8455875B2
(en)
|
2010-05-10 |
2013-06-04 |
International Business Machines Corporation |
Embedded DRAM for extremely thin semiconductor-on-insulator
|
US8652925B2
(en)
|
2010-07-19 |
2014-02-18 |
International Business Machines Corporation |
Method of fabricating isolated capacitors and structure thereof
|
US8531878B2
(en)
|
2011-05-17 |
2013-09-10 |
Micron Technology, Inc. |
Techniques for providing a semiconductor memory device
|
US9559216B2
(en)
|
2011-06-06 |
2017-01-31 |
Micron Technology, Inc. |
Semiconductor memory device and method for biasing same
|
KR20130020333A
(ko)
|
2011-08-19 |
2013-02-27 |
삼성전자주식회사 |
수직형 채널 트랜지스터를 포함하는 반도체 소자 및 그 제조 방법
|
US9153292B2
(en)
*
|
2013-03-07 |
2015-10-06 |
Xilinx, Inc. |
Integrated circuit devices having memory and methods of implementing memory in an integrated circuit device
|
CN105977256B
(zh)
*
|
2016-06-15 |
2018-11-23 |
武汉新芯集成电路制造有限公司 |
一种dram器件的制备方法
|