SE9501608D0 - Generator för fördröjningsanpassade klock- och datasignaler - Google Patents

Generator för fördröjningsanpassade klock- och datasignaler

Info

Publication number
SE9501608D0
SE9501608D0 SE9501608A SE9501608A SE9501608D0 SE 9501608 D0 SE9501608 D0 SE 9501608D0 SE 9501608 A SE9501608 A SE 9501608A SE 9501608 A SE9501608 A SE 9501608A SE 9501608 D0 SE9501608 D0 SE 9501608D0
Authority
SE
Sweden
Prior art keywords
clock
generator
control inputs
delay
timing
Prior art date
Application number
SE9501608A
Other languages
English (en)
Other versions
SE9501608L (sv
SE504369C2 (sv
Inventor
Tord Haulin
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE9501608A priority Critical patent/SE504369C2/sv
Publication of SE9501608D0 publication Critical patent/SE9501608D0/sv
Priority to AU55197/96A priority patent/AU5519796A/en
Priority to PCT/SE1996/000486 priority patent/WO1996035159A1/en
Priority to CA002219907A priority patent/CA2219907A1/en
Priority to KR1019970707718A priority patent/KR100433648B1/ko
Priority to JP8533223A priority patent/JPH11505080A/ja
Priority to EP96912362A priority patent/EP0826168B1/en
Priority to DE69625810T priority patent/DE69625810T2/de
Publication of SE9501608L publication Critical patent/SE9501608L/sv
Publication of SE504369C2 publication Critical patent/SE504369C2/sv
Priority to US08/961,411 priority patent/US6236693B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Pulse Circuits (AREA)
  • Logic Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
SE9501608A 1995-05-02 1995-05-02 Fördröjningsanpassad klock- och datagenerator SE504369C2 (sv)

Priority Applications (9)

Application Number Priority Date Filing Date Title
SE9501608A SE504369C2 (sv) 1995-05-02 1995-05-02 Fördröjningsanpassad klock- och datagenerator
DE69625810T DE69625810T2 (de) 1995-05-02 1996-04-15 Generator für verzögerungsangepasste takt- und datensignale
KR1019970707718A KR100433648B1 (ko) 1995-05-02 1996-04-15 지연-정합클럭및데이터신호발생기
PCT/SE1996/000486 WO1996035159A1 (en) 1995-05-02 1996-04-15 Generator for delay-matched clock and data signals
CA002219907A CA2219907A1 (en) 1995-05-02 1996-04-15 Generator for delay-matched clock and data signals
AU55197/96A AU5519796A (en) 1995-05-02 1996-04-15 Generator for delay-matched clock and data signals
JP8533223A JPH11505080A (ja) 1995-05-02 1996-04-15 遅延整合クロック及びデータ信号の発生器
EP96912362A EP0826168B1 (en) 1995-05-02 1996-04-15 Generator for delay-matched clock and data signals
US08/961,411 US6236693B1 (en) 1995-05-02 1997-10-30 Generator for delay-matched clock and data signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9501608A SE504369C2 (sv) 1995-05-02 1995-05-02 Fördröjningsanpassad klock- och datagenerator

Publications (3)

Publication Number Publication Date
SE9501608D0 true SE9501608D0 (sv) 1995-05-02
SE9501608L SE9501608L (sv) 1996-11-03
SE504369C2 SE504369C2 (sv) 1997-01-20

Family

ID=20398155

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9501608A SE504369C2 (sv) 1995-05-02 1995-05-02 Fördröjningsanpassad klock- och datagenerator

Country Status (9)

Country Link
US (1) US6236693B1 (sv)
EP (1) EP0826168B1 (sv)
JP (1) JPH11505080A (sv)
KR (1) KR100433648B1 (sv)
AU (1) AU5519796A (sv)
CA (1) CA2219907A1 (sv)
DE (1) DE69625810T2 (sv)
SE (1) SE504369C2 (sv)
WO (1) WO1996035159A1 (sv)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768362B1 (en) 2001-08-13 2004-07-27 Cypress Semiconductor Corp. Fail-safe zero delay buffer with automatic internal reference
US6911856B2 (en) * 2003-07-31 2005-06-28 Qualcomm Inc. Delay matching for clock distribution in a logic circuit
US7940100B2 (en) * 2007-09-24 2011-05-10 Qualcomm, Incorporated Delay circuits matching delays of synchronous circuits
US20090119631A1 (en) * 2007-11-06 2009-05-07 Jordi Cortadella Variability-Aware Asynchronous Scheme for High-Performance Delay Matching
KR102579174B1 (ko) * 2018-12-24 2023-09-18 에스케이하이닉스 주식회사 적층형 메모리 장치 및 이를 포함하는 메모리 시스템
DE102019213982A1 (de) 2019-09-13 2021-03-18 Dr. Johannes Heidenhain Gmbh Vorrichtung und Verfahren zur synchron-seriellen Datenübertragung

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229521A (ja) * 1984-04-27 1985-11-14 Sony Tektronix Corp デジタル信号遅延回路
JPH01231426A (ja) * 1987-11-26 1989-09-14 Toshiba Corp データ選択回路
US5005151A (en) * 1988-05-13 1991-04-02 Dallas Semiconductor Corporation Interleaved arbitration scheme for interfacing parallel and serial ports to a parallel system port
GB8818665D0 (en) * 1988-08-05 1988-09-07 Crosfield Electronics Ltd Methods & apparatus for synchronising clock signals
JP2504568B2 (ja) * 1989-06-20 1996-06-05 富士通株式会社 信号生成回路
US5022056A (en) * 1989-10-23 1991-06-04 National Semiconductor Corporation Method and structure for digital phase synchronization
US5115455A (en) * 1990-06-29 1992-05-19 Digital Equipment Corporation Method and apparatus for stabilized data transmission
DE4132325C2 (de) * 1991-09-27 1998-05-14 Siemens Nixdorf Inf Syst Anordnung zum automatischen Taktabgleich bei integrierten Schaltkreisen
US5250852A (en) * 1992-04-16 1993-10-05 Texas Instruments Incorporated Circuitry and method for latching a logic state
US5359630A (en) * 1992-08-13 1994-10-25 Digital Equipment Corporation Method and apparatus for realignment of synchronous data
JPH06334620A (ja) * 1993-05-20 1994-12-02 Ando Electric Co Ltd データ発生回路
FR2716765B1 (fr) * 1994-02-28 1996-05-31 Sgs Thomson Microelectronics Procédé de reconnaisance de standard vidéo, et circuit mettant en Óoeuvre ce procédé.
US5633601A (en) * 1995-03-10 1997-05-27 Texas Instruments Incorporated Field programmable gate array logic module configurable as combinational or sequential circuits
KR0146060B1 (ko) * 1995-04-08 1998-09-15 문정환 데이타 동기 클럭 발생 장치

Also Published As

Publication number Publication date
EP0826168A1 (en) 1998-03-04
EP0826168B1 (en) 2003-01-15
JPH11505080A (ja) 1999-05-11
DE69625810T2 (de) 2003-11-06
SE9501608L (sv) 1996-11-03
US6236693B1 (en) 2001-05-22
AU5519796A (en) 1996-11-21
KR100433648B1 (ko) 2004-08-12
SE504369C2 (sv) 1997-01-20
DE69625810D1 (de) 2003-02-20
CA2219907A1 (en) 1996-11-07
WO1996035159A1 (en) 1996-11-07
KR19990008193A (ko) 1999-01-25

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Legal Events

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