RU2016108166A - LOGIC CONVERTER - Google Patents

Claims (1)

A logic converter designed to implement simple symmetric Boolean functions, containing eight majority elements that have three inputs, and the i-th output

and the first inputs of the third, fifth, sixth majority elements are connected respectively to the second input of the (i + 1) -th majority element and the first tuning input of the logic converter, characterized in that the ninth majority element is introduced into it, the output of the jth

and exit m

majority elements are connected respectively to the second input of the (j + 1) -th and third input of the (3 × m + 2) -th majority elements, and the second, third inputs and the output of the ninth majority element are connected respectively to the outputs of the fifth, eighth majority elements and the output logical converter, the second and first tuning inputs of which are connected respectively to the first input of the ninth and first inputs of the fourth, seventh, eighth majority elements.