NO961454L - Signalprosesseringsenhet - Google Patents

Signalprosesseringsenhet

Info

Publication number
NO961454L
NO961454L NO961454A NO961454A NO961454L NO 961454 L NO961454 L NO 961454L NO 961454 A NO961454 A NO 961454A NO 961454 A NO961454 A NO 961454A NO 961454 L NO961454 L NO 961454L
Authority
NO
Norway
Prior art keywords
clock
signal
signals
signal processing
unit
Prior art date
Application number
NO961454A
Other languages
English (en)
Other versions
NO961454D0 (no
Inventor
Karl Sven Magnus Buhrgard
Tord Lennart Haulin
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of NO961454D0 publication Critical patent/NO961454D0/no
Publication of NO961454L publication Critical patent/NO961454L/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5674—Synchronisation, timing recovery or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Communication Control (AREA)

Abstract

Signalprosesseringsenhet (1) hvor innkommende bitpo- sisjonbærende signaler (2') er tidsstyrt i forhold til et første klokkesignal (3), og hvor utgående bitposisjonbærende signaler (4) er tidsrelatert nøy- aktig i forhold til nevnte første klokkesignal (3), og hvor signalprosesseringsprosedyrer som utføres internt i enheten (1) krever nærværet av bitposi- sjonene i signalet (2') og klokkepulsene i et klok- ; kesignal (3'). Signalprosesseringen som utføres internt i enheten (1, 20) blir styrt av klokkepuls- ene i et andre klokkesignal (31) som har samme frek- vens som det første klokkesignal (3). Synkroniser- ingen som kreves for den interne signalprosessering oppnås i en enhet (13) ved forandring av tidsforhol- det hos klokkepulsene i det andre klokkesignal (3') til synkronisme med bitposisjonene i signalene (2'); ved at datasignalene (4') som prosesseres på denne måte kan lagres i bufferkretser (10) hvor et tids- styrt forhold som tilhører prosesseringssignalene (41) kan forandres til synkronisme med klokkepulsene (3a, 3b) av de første klokkesignaler (3) før de fremkommer som utgående signaler (4).
NO961454A 1993-10-12 1996-04-12 Signalprosesseringsenhet NO961454L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9303339A SE9303339L (sv) 1993-10-12 1993-10-12 Signalbearbetande enhet med intern klocksignal
PCT/SE1994/000910 WO1995010904A1 (en) 1993-10-12 1994-10-03 Signal processing unit

Publications (2)

Publication Number Publication Date
NO961454D0 NO961454D0 (no) 1996-04-12
NO961454L true NO961454L (no) 1996-05-10

Family

ID=20391388

Family Applications (1)

Application Number Title Priority Date Filing Date
NO961454A NO961454L (no) 1993-10-12 1996-04-12 Signalprosesseringsenhet

Country Status (13)

Country Link
US (1) US5572529A (no)
EP (1) EP0723725B1 (no)
JP (1) JP2923363B2 (no)
KR (1) KR100277756B1 (no)
CN (1) CN1095261C (no)
AU (1) AU680560B2 (no)
BR (1) BR9407802A (no)
CA (1) CA2173950C (no)
DE (1) DE69433463D1 (no)
FI (1) FI961593A0 (no)
NO (1) NO961454L (no)
SE (1) SE9303339L (no)
WO (1) WO1995010904A1 (no)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10340165A1 (de) * 2003-09-01 2005-03-24 Robert Bosch Gmbh Verfahren und Vorrichtung zur Anbindung von Sensoren oder Aktoren an ein Bus-System
DE102005017182A1 (de) * 2005-04-13 2006-10-19 Man Roland Druckmaschinen Ag Vorrichtung und Verfahren zum Andrücken einer Bespannung an einen Druckwerkzylinder einer Rotationsdruckmaschine

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2479515A1 (fr) * 1980-03-28 1981-10-02 Telecommunications Sa Systeme de transmission numerique a l'alternat
JPH0642663B2 (ja) * 1988-03-16 1994-06-01 富士通株式会社 ディジタル通信方式の中間中継局
EP0379279A3 (en) * 1989-01-17 1991-09-11 Marconi Instruments Limited Data transmission synchroniser
US5359605A (en) * 1989-06-22 1994-10-25 U.S. Philips Corporation Circuit arrangement for adjusting the bit rates of two signals
DE3924283A1 (de) * 1989-07-22 1991-01-31 Standard Elektrik Lorenz Ag Schaltungsanordnung zur durchschaltung eines digitalen dienstkanals in einer richtfunk-zwischenstelle
FR2660818B1 (fr) * 1990-04-06 1992-06-19 France Telecom Relais-commutateur de trames pour reseau numerique asynchrone.
FR2669798B1 (fr) * 1990-11-23 1994-09-16 Lmt Radio Professionelle Dispositif pour la transmission d'informations synchrones par un reseau asynchrone, notamment un reseau atm.
SE515076C2 (sv) * 1992-07-01 2001-06-05 Ericsson Telefon Ab L M Multiplexor-/demultiplexorkrets
FR2700089B1 (fr) * 1992-12-30 1995-02-03 Fabrice Bourgart Trame multidébit et dispositif de multiplexage de données à débits non multiples.
EP0620662A1 (en) * 1993-02-16 1994-10-19 ALCATEL BELL Naamloze Vennootschap Processing, serializing and synchronizing device

Also Published As

Publication number Publication date
AU680560B2 (en) 1997-07-31
US5572529A (en) 1996-11-05
JPH08510886A (ja) 1996-11-12
NO961454D0 (no) 1996-04-12
BR9407802A (pt) 1997-05-06
EP0723725B1 (en) 2004-01-02
FI961593A (fi) 1996-04-11
SE501296C2 (sv) 1995-01-09
JP2923363B2 (ja) 1999-07-26
WO1995010904A1 (en) 1995-04-20
KR960705427A (ko) 1996-10-09
SE9303339L (sv) 1995-01-09
AU7951694A (en) 1995-05-04
EP0723725A1 (en) 1996-07-31
FI961593A0 (fi) 1996-04-11
CN1133112A (zh) 1996-10-09
CN1095261C (zh) 2002-11-27
CA2173950C (en) 2000-12-19
KR100277756B1 (ko) 2001-02-01
SE9303339D0 (sv) 1993-10-12
DE69433463D1 (de) 2004-02-05

Similar Documents

Publication Publication Date Title
AU2003260069A1 (en) Method and apparatus for setting and compensating read latency in a high speed dram
WO1998013768A3 (en) Interface for transferring data between two clock domains
GB9502868D0 (en) Oversampled logic analyzer
CA2338548A1 (en) System and method for synchronizing, storing and accurately reproducing video signals
CA2102406A1 (en) Apparatus for and Method of Synchronizing a Clock Signal
JPS5639694A (en) Method and device for synchrnonizing timing in transmission of digital information signal
JPH02253464A (ja) プログラマブルなデータ転送タイミング
NO961454L (no) Signalprosesseringsenhet
TW255079B (en) Communications unit with data and clock recovery circuit
US5513338A (en) Apparatus for tracing activity on a bus of an in-circuit emulator
JPS5473009A (en) Time compression and expansion apparatus of audio signal
JPS5633769A (en) Control method for writing to buffer memory device
JPS57123455A (en) Instruction executing device
WO2002035703A3 (en) A system and method for grouped gating control logic
JP2682502B2 (ja) 不揮発性メモリの出力データのローディングタイミング方法及び回路
SU1427376A1 (ru) Устройство дл синхронизации двух блоков обработки
JPS6281142A (ja) 位相同期回路
JPS5718150A (en) Time-division data receiving and transferring method
EP0344736A3 (en) High-speed synchronous data transfer system
SU1278811A1 (ru) Устройство дл ситуационного управлени
SU1665373A1 (ru) Ассоциативное суммирующее устройство
SU1109803A1 (ru) Блок формировани тактирующих сигналов дл доменного запоминающего устройства
JPS60244880A (ja) レ−ダビデオ信号の記憶装置
SU1356220A1 (ru) Аналого-цифровое устройство задержки
SU1418723A1 (ru) Устройство буферной пам ти

Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application