NO20045727D0 - Fremgangsmate i fremstillingen av en elektronisk innretning - Google Patents

Fremgangsmate i fremstillingen av en elektronisk innretning

Info

Publication number
NO20045727D0
NO20045727D0 NO20045727A NO20045727A NO20045727D0 NO 20045727 D0 NO20045727 D0 NO 20045727D0 NO 20045727 A NO20045727 A NO 20045727A NO 20045727 A NO20045727 A NO 20045727A NO 20045727 D0 NO20045727 D0 NO 20045727D0
Authority
NO
Norway
Prior art keywords
manufacturing
electronic device
electronic
Prior art date
Application number
NO20045727A
Other languages
English (en)
Other versions
NO322202B1 (no
Inventor
Hans Gude Gudesen
Olle Hagel
Peter Dyreklev
Per-Erik Nordal
Anders Hagerstrom
Original Assignee
Thin Film Electronics Asa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics Asa filed Critical Thin Film Electronics Asa
Priority to NO20045727A priority Critical patent/NO322202B1/no
Publication of NO20045727D0 publication Critical patent/NO20045727D0/no
Priority to JP2007549297A priority patent/JP2008527690A/ja
Priority to CN200580048829A priority patent/CN100585731C/zh
Priority to EP05821538A priority patent/EP1831893A1/en
Priority to KR1020077015819A priority patent/KR100891391B1/ko
Priority to PCT/NO2005/000481 priority patent/WO2006071122A1/en
Priority to US11/319,383 priority patent/US20060160251A1/en
Publication of NO322202B1 publication Critical patent/NO322202B1/no

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
NO20045727A 2004-12-30 2004-12-30 Fremgangsmate i fremstillingen av en elektronisk innretning NO322202B1 (no)

Priority Applications (7)

Application Number Priority Date Filing Date Title
NO20045727A NO322202B1 (no) 2004-12-30 2004-12-30 Fremgangsmate i fremstillingen av en elektronisk innretning
JP2007549297A JP2008527690A (ja) 2004-12-30 2005-12-23 メモリ・デバイス製造方法
CN200580048829A CN100585731C (zh) 2004-12-30 2005-12-23 存储器件制造中的方法
EP05821538A EP1831893A1 (en) 2004-12-30 2005-12-23 A method in the fabrication of a memory device
KR1020077015819A KR100891391B1 (ko) 2004-12-30 2005-12-23 메모리 장치의 제조 방법
PCT/NO2005/000481 WO2006071122A1 (en) 2004-12-30 2005-12-23 A method in the fabrication of a memory device
US11/319,383 US20060160251A1 (en) 2004-12-30 2005-12-29 Method in the fabrication of a memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NO20045727A NO322202B1 (no) 2004-12-30 2004-12-30 Fremgangsmate i fremstillingen av en elektronisk innretning

Publications (2)

Publication Number Publication Date
NO20045727D0 true NO20045727D0 (no) 2004-12-30
NO322202B1 NO322202B1 (no) 2006-08-28

Family

ID=35209732

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20045727A NO322202B1 (no) 2004-12-30 2004-12-30 Fremgangsmate i fremstillingen av en elektronisk innretning

Country Status (7)

Country Link
US (1) US20060160251A1 (no)
EP (1) EP1831893A1 (no)
JP (1) JP2008527690A (no)
KR (1) KR100891391B1 (no)
CN (1) CN100585731C (no)
NO (1) NO322202B1 (no)
WO (1) WO2006071122A1 (no)

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SG135079A1 (en) * 2006-03-02 2007-09-28 Sony Corp Memory device which comprises a multi-layer capacitor
EP2016591A1 (en) * 2006-04-28 2009-01-21 Agfa-Gevaert Conventionally printable non-volatile passive memory element and method of making thereof.
US8137767B2 (en) 2006-11-22 2012-03-20 Fujifilm Corporation Antireflective film, polarizing plate and image display device
US8110450B2 (en) 2007-12-19 2012-02-07 Palo Alto Research Center Incorporated Printed TFT and TFT array with self-aligned gate
US20090167496A1 (en) * 2007-12-31 2009-07-02 Unity Semiconductor Corporation Radio frequency identification transponder memory
US7573063B1 (en) * 2008-05-15 2009-08-11 Xerox Corporation Organic thin film transistors
JP6023188B2 (ja) 2011-06-27 2016-11-09 シン フイルム エレクトロニクス エイエスエイ フレキシブルな基板上に設けられた積層体を含む電子コンポーネント中の短絡回路の低減
CN106876398B (zh) 2011-06-27 2020-10-20 薄膜电子有限公司 含横向尺寸改变吸收缓冲层的铁电存储单元及其制造方法
CN104205250A (zh) * 2012-03-30 2014-12-10 阿尔卑斯电气株式会社 导电图案形成基板的制造方法
KR101382890B1 (ko) * 2012-06-21 2014-04-08 청주대학교 산학협력단 나노 박막을 이용한 전기 광학 변조기 및 그 제조방법
CN104409632B (zh) * 2014-05-31 2017-05-10 福州大学 一种多层结构有机阻变存储器的3d打印制备方法
CN106575575B (zh) * 2014-06-09 2018-12-28 沙特基础全球技术有限公司 使用脉冲电磁辐射来处理薄膜有机铁电材料
CN104810361B (zh) * 2015-04-30 2019-01-29 于翔 一种存储器
EP3226271B1 (en) * 2016-04-01 2021-03-17 RISE Research Institutes of Sweden AB Electrochemical device
US10636471B2 (en) * 2016-04-20 2020-04-28 Micron Technology, Inc. Memory arrays, ferroelectric transistors, and methods of reading and writing relative to memory cells of memory arrays
CN105742501B (zh) * 2016-05-03 2018-07-06 苏州大学 基于经膦酸或三氯硅烷修饰的ito玻璃基底的有机电存储器件及其制备方法
US10832775B1 (en) 2019-07-18 2020-11-10 International Business Machines Corporation Cross-point array of polymer junctions with individually-programmed conductances that can be reset
CN111180582B (zh) * 2020-02-12 2021-12-21 福州大学 一种基于驻极体的突触晶体管及其制备方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1022470A (ja) * 1996-07-02 1998-01-23 Hitachi Ltd 半導体記憶装置及びその製造方法
JP2002026282A (ja) * 2000-06-30 2002-01-25 Seiko Epson Corp 単純マトリクス型メモリ素子の製造方法
JP3901432B2 (ja) * 2000-08-22 2007-04-04 セイコーエプソン株式会社 強誘電体キャパシタを有するメモリセルアレイおよびその製造方法
NO20005980L (no) * 2000-11-27 2002-05-28 Thin Film Electronics Ab Ferroelektrisk minnekrets og fremgangsmåte ved dens fremstilling
US6541309B2 (en) * 2001-03-21 2003-04-01 Hewlett-Packard Development Company Lp Fabricating a molecular electronic device having a protective barrier layer
KR100424090B1 (ko) * 2001-06-25 2004-03-22 삼성에스디아이 주식회사 유기 전계 발광 소자용 정공 수송층, 그 정공 수송층을사용한유기 전계 발광 소자 및 그 소자의 제조 방법
US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
NO20015735D0 (no) * 2001-11-23 2001-11-23 Thin Film Electronics Asa Barrierelag
US6828685B2 (en) * 2002-06-14 2004-12-07 Hewlett-Packard Development Company, L.P. Memory device having a semiconducting polymer film
US7026079B2 (en) * 2002-08-22 2006-04-11 Agfa Gevaert Process for preparing a substantially transparent conductive layer configuration
US7179534B2 (en) * 2003-01-31 2007-02-20 Princeton University Conductive-polymer electronic switch
US6656763B1 (en) * 2003-03-10 2003-12-02 Advanced Micro Devices, Inc. Spin on polymers for organic memory devices
US20050006640A1 (en) * 2003-06-26 2005-01-13 Jackson Warren B. Polymer-based memory element
NO20041733L (no) * 2004-04-28 2005-10-31 Thin Film Electronics Asa Organisk elektronisk krets med funksjonelt mellomsjikt og fremgangsmate til dens fremstilling.

Also Published As

Publication number Publication date
CN100585731C (zh) 2010-01-27
JP2008527690A (ja) 2008-07-24
WO2006071122A1 (en) 2006-07-06
NO322202B1 (no) 2006-08-28
KR100891391B1 (ko) 2009-04-02
CN101133460A (zh) 2008-02-27
KR20070087022A (ko) 2007-08-27
US20060160251A1 (en) 2006-07-20
EP1831893A1 (en) 2007-09-12

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