NL9100334A - Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt. - Google Patents

Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt. Download PDF

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Publication number
NL9100334A
NL9100334A NL9100334A NL9100334A NL9100334A NL 9100334 A NL9100334 A NL 9100334A NL 9100334 A NL9100334 A NL 9100334A NL 9100334 A NL9100334 A NL 9100334A NL 9100334 A NL9100334 A NL 9100334A
Authority
NL
Netherlands
Prior art keywords
layer
heat treatment
metal
silicon
silicide
Prior art date
Application number
NL9100334A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL9100334A priority Critical patent/NL9100334A/nl
Priority to EP92200459A priority patent/EP0501561B1/en
Priority to DE69215926T priority patent/DE69215926T2/de
Priority to JP4069645A priority patent/JP2719863B2/ja
Priority to KR1019920002630A priority patent/KR100237095B1/ko
Publication of NL9100334A publication Critical patent/NL9100334A/nl
Priority to US08/038,045 priority patent/US5302552A/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7848Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/019Contacts of silicides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/147Silicides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/934Sheet resistance, i.e. dopant parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
NL9100334A 1991-02-26 1991-02-26 Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt. NL9100334A (nl)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL9100334A NL9100334A (nl) 1991-02-26 1991-02-26 Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt.
EP92200459A EP0501561B1 (en) 1991-02-26 1992-02-18 Method of manufacturing a semiconductor device whereby a self-aligned cobalt or nickel silicide is formed
DE69215926T DE69215926T2 (de) 1991-02-26 1992-02-18 Verfahren zum Herstellen einer Halbleiteranordnung, wobei ein selbstregistrierendes Kobalt- oder Nickelsilizid gebildet wird
JP4069645A JP2719863B2 (ja) 1991-02-26 1992-02-19 半導体装置の製造方法
KR1019920002630A KR100237095B1 (ko) 1991-02-26 1992-02-21 반도체 소자의 제조방법
US08/038,045 US5302552A (en) 1991-02-26 1993-03-26 Method of manufacturing a semiconductor device whereby a self-aligned cobalt or nickel silicide is formed

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL9100334A NL9100334A (nl) 1991-02-26 1991-02-26 Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt.
NL9100334 1992-02-26

Publications (1)

Publication Number Publication Date
NL9100334A true NL9100334A (nl) 1992-09-16

Family

ID=19858928

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9100334A NL9100334A (nl) 1991-02-26 1991-02-26 Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een zelfregistrerend kobalt- of nikkel-silicide gevormd wordt.

Country Status (6)

Country Link
US (1) US5302552A (ko)
EP (1) EP0501561B1 (ko)
JP (1) JP2719863B2 (ko)
KR (1) KR100237095B1 (ko)
DE (1) DE69215926T2 (ko)
NL (1) NL9100334A (ko)

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US5506449A (en) * 1993-03-24 1996-04-09 Kawasaki Steel Corporation Interconnection structure for semiconductor integrated circuit and manufacture of the same
TW297142B (ko) 1993-09-20 1997-02-01 Handotai Energy Kenkyusho Kk
JP2891092B2 (ja) * 1994-03-07 1999-05-17 日本電気株式会社 半導体装置の製造方法
US5624869A (en) * 1994-04-13 1997-04-29 International Business Machines Corporation Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
US5457069A (en) * 1994-08-31 1995-10-10 National Science Council Process for fabricating device having titanium-tungsten barrier layer and silicide layer contacted shallow junction simultaneously formed
US5895255A (en) * 1994-11-30 1999-04-20 Kabushiki Kaisha Toshiba Shallow trench isolation formation with deep trench cap
US5536676A (en) * 1995-04-03 1996-07-16 National Science Council Low temperature formation of silicided shallow junctions by ion implantation into thin silicon films
GB2339966B (en) * 1996-06-28 2000-12-20 Lg Electronics Inc Polysilicon thin film transistor
US5869396A (en) * 1996-07-15 1999-02-09 Chartered Semiconductor Manufacturing Ltd. Method for forming a polycide gate electrode
JP3003796B2 (ja) 1997-01-23 2000-01-31 日本電気株式会社 Mos型半導体装置の製造方法
US6127249A (en) 1997-02-20 2000-10-03 Micron Technology, Inc. Metal silicidation methods and methods for using same
US6156632A (en) 1997-08-15 2000-12-05 Micron Technology, Inc. Method of forming polycide structures
US6074960A (en) 1997-08-20 2000-06-13 Micron Technology, Inc. Method and composition for selectively etching against cobalt silicide
JP2008060594A (ja) * 1997-11-17 2008-03-13 Toshiba Corp 半導体装置の製造方法
US6071782A (en) 1998-02-13 2000-06-06 Sharp Laboratories Of America, Inc. Partial silicidation method to form shallow source/drain junctions
US6022801A (en) * 1998-02-18 2000-02-08 International Business Machines Corporation Method for forming an atomically flat interface for a highly disordered metal-silicon barrier film
TW383463B (en) 1998-06-01 2000-03-01 United Microelectronics Corp Manufacturing method for dual damascene structure
US6680248B2 (en) 1998-06-01 2004-01-20 United Microelectronics Corporation Method of forming dual damascene structure
US6204177B1 (en) * 1998-11-04 2001-03-20 Advanced Micro Devices, Inc. Method of forming junction leakage free metal silicide in a semiconductor wafer by alloying refractory metal
KR100564416B1 (ko) * 1998-12-30 2006-07-06 주식회사 하이닉스반도체 반도체소자의 살리사이드층 형성방법
KR100628253B1 (ko) * 2000-08-09 2006-09-27 매그나칩 반도체 유한회사 반도체 소자의 자기 정렬 실리사이드 형성방법
US6890854B2 (en) 2000-11-29 2005-05-10 Chartered Semiconductor Manufacturing, Inc. Method and apparatus for performing nickel salicidation
US20020084502A1 (en) * 2000-12-29 2002-07-04 Jin Jang Carbon nanotip and fabricating method thereof
US6765269B2 (en) 2001-01-26 2004-07-20 Integrated Device Technology, Inc. Conformal surface silicide strap on spacer and method of making same
US6743721B2 (en) 2002-06-10 2004-06-01 United Microelectronics Corp. Method and system for making cobalt silicide
US6905560B2 (en) * 2002-12-31 2005-06-14 International Business Machines Corporation Retarding agglomeration of Ni monosilicide using Ni alloys
KR100947525B1 (ko) * 2003-03-12 2010-03-12 삼성전자주식회사 액정 표시 장치용 박막 트랜지스터 기판 및 이의 제조방법
KR100870176B1 (ko) * 2003-06-27 2008-11-25 삼성전자주식회사 니켈 합금 샐리사이드 공정, 이를 사용하여 반도체소자를제조하는 방법, 그에 의해 형성된 니켈 합금 실리사이드막및 이를 사용하여 제조된 반도체소자
US6797614B1 (en) * 2003-05-19 2004-09-28 Advanced Micro Devices, Inc. Nickel alloy for SMOS process silicidation
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US7575959B2 (en) * 2004-11-26 2009-08-18 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
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US20110031596A1 (en) * 2009-08-05 2011-02-10 Gruenhagen Mike D Nickel-titanum soldering layers in semiconductor devices
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CN102856177B (zh) * 2011-06-27 2015-01-28 中芯国际集成电路制造(北京)有限公司 半导体器件和用于制造半导体器件的方法

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US5047367A (en) * 1990-06-08 1991-09-10 Intel Corporation Process for formation of a self aligned titanium nitride/cobalt silicide bilayer

Also Published As

Publication number Publication date
DE69215926T2 (de) 1997-05-28
JP2719863B2 (ja) 1998-02-25
EP0501561B1 (en) 1996-12-18
JPH0594966A (ja) 1993-04-16
KR100237095B1 (ko) 2000-01-15
EP0501561A1 (en) 1992-09-02
US5302552A (en) 1994-04-12
DE69215926D1 (de) 1997-01-30
KR930018657A (ko) 1993-09-22

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