NL9100064A - Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor. - Google Patents

Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor. Download PDF

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Publication number
NL9100064A
NL9100064A NL9100064A NL9100064A NL9100064A NL 9100064 A NL9100064 A NL 9100064A NL 9100064 A NL9100064 A NL 9100064A NL 9100064 A NL9100064 A NL 9100064A NL 9100064 A NL9100064 A NL 9100064A
Authority
NL
Netherlands
Prior art keywords
layer
gate electrode
etched
opening
semiconductor device
Prior art date
Application number
NL9100064A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL9100064A priority Critical patent/NL9100064A/nl
Priority to TW080104532A priority patent/TW198132B/zh
Priority to EP92200022A priority patent/EP0495541A1/en
Priority to KR1019920000333A priority patent/KR920015641A/ko
Priority to JP4005805A priority patent/JPH04334029A/ja
Publication of NL9100064A publication Critical patent/NL9100064A/nl

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/605Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having significant overlap between the lightly-doped extensions and the gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
NL9100064A 1991-01-16 1991-01-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor. NL9100064A (nl)

Priority Applications (5)

Application Number Priority Date Filing Date Title
NL9100064A NL9100064A (nl) 1991-01-16 1991-01-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor.
TW080104532A TW198132B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-01-16 1991-06-11
EP92200022A EP0495541A1 (en) 1991-01-16 1992-01-07 Method of manufacturing a semiconductor device provided with a field effect transistor
KR1019920000333A KR920015641A (ko) 1991-01-16 1992-01-13 전계효과 트랜지스터가 구비된 반도체 디바이스 제조방법
JP4005805A JPH04334029A (ja) 1991-01-16 1992-01-16 半導体装置の製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL9100064A NL9100064A (nl) 1991-01-16 1991-01-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor.
NL9100064 1991-01-16

Publications (1)

Publication Number Publication Date
NL9100064A true NL9100064A (nl) 1992-08-17

Family

ID=19858727

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9100064A NL9100064A (nl) 1991-01-16 1991-01-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting voorzien van een veldeffecttransistor.

Country Status (5)

Country Link
EP (1) EP0495541A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH04334029A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR920015641A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (1) NL9100064A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW198132B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2718287B1 (fr) * 1994-03-31 1996-08-02 Alain Straboni Procédé de fabrication d'un transistor à effet de champ à grille isolée, en particulier de longueur de canal réduite, et transistor correspondant.
KR100295639B1 (ko) * 1998-01-14 2001-08-07 김영환 플러그형성방법
CN103594368B (zh) * 2012-08-15 2016-08-10 中芯国际集成电路制造(上海)有限公司 半导体器件及其制造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677736A (en) * 1986-04-17 1987-07-07 General Electric Company Self-aligned inlay transistor with or without source and drain self-aligned metallization extensions
US4907048A (en) * 1987-11-23 1990-03-06 Xerox Corporation Double implanted LDD transistor self-aligned with gate
US4895520A (en) * 1989-02-02 1990-01-23 Standard Microsystems Corporation Method of fabricating a submicron silicon gate MOSFETg21 which has a self-aligned threshold implant
US4984042A (en) * 1989-02-13 1991-01-08 Motorola, Inc. MOS transistors using selective polysilicon deposition
JPH0758701B2 (ja) * 1989-06-08 1995-06-21 株式会社東芝 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0495541A1 (en) 1992-07-22
KR920015641A (ko) 1992-08-27
JPH04334029A (ja) 1992-11-20
TW198132B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-01-11

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