NL8602455A - Werkwijze voor het vormen van gedrukte bedradingen op een basisplaat. - Google Patents

Werkwijze voor het vormen van gedrukte bedradingen op een basisplaat. Download PDF

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Publication number
NL8602455A
NL8602455A NL8602455A NL8602455A NL8602455A NL 8602455 A NL8602455 A NL 8602455A NL 8602455 A NL8602455 A NL 8602455A NL 8602455 A NL8602455 A NL 8602455A NL 8602455 A NL8602455 A NL 8602455A
Authority
NL
Netherlands
Prior art keywords
layer
metal
paste
wiring
copper
Prior art date
Application number
NL8602455A
Other languages
English (en)
Dutch (nl)
Original Assignee
Asahi Chem Res Lab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chem Res Lab filed Critical Asahi Chem Res Lab
Publication of NL8602455A publication Critical patent/NL8602455A/nl

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4685Manufacturing of cross-over conductors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
NL8602455A 1985-09-29 1986-09-29 Werkwijze voor het vormen van gedrukte bedradingen op een basisplaat. NL8602455A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP21604185 1985-09-29
JP60216041A JPS6276600A (ja) 1985-09-29 1985-09-29 基板に導電回路を形成する方法

Publications (1)

Publication Number Publication Date
NL8602455A true NL8602455A (nl) 1987-04-16

Family

ID=16682349

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8602455A NL8602455A (nl) 1985-09-29 1986-09-29 Werkwijze voor het vormen van gedrukte bedradingen op een basisplaat.

Country Status (7)

Country Link
US (1) US4734156A (de)
JP (1) JPS6276600A (de)
KR (1) KR900001840B1 (de)
DE (1) DE3631632A1 (de)
FR (1) FR2588146B1 (de)
GB (1) GB2181303B (de)
NL (1) NL8602455A (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837050A (en) * 1986-09-30 1989-06-06 Asahi Chemical Research Laboratory Co., Ltd. Method for producing electrically conductive circuits on a base board
KR900005308B1 (ko) * 1987-12-31 1990-07-27 정풍물산 주식회사 인쇄회로기판과 그의 제조방법
JPH01214100A (ja) * 1988-02-21 1989-08-28 Asahi Chem Res Lab Ltd 電磁波シールド回路及びその製造方法
BR8907268A (pt) * 1988-12-24 1991-03-12 Technology Aplications Company Processo de efetuar uma conexao eletrica,placa de circuito impresso, processo de produzir uma almofada de contato,processo de produzir um capacitor,circuito impresso e processo de aplicar uma camada em um padrao desejado a um substrato
US4991285A (en) * 1989-11-17 1991-02-12 Rockwell International Corporation Method of fabricating multi-layer board
US5072378A (en) * 1989-12-18 1991-12-10 Storage Technology Corporation Direct access storage device with independently stored parity
DE4227085A1 (de) * 1992-08-17 1994-02-24 Bosch Gmbh Robert Verfahren zur Herstellung fein strukturierter elektrisch leitfähiger Schichten
US5461202A (en) * 1992-10-05 1995-10-24 Matsushita Electric Industrial Co., Ltd. Flexible wiring board and its fabrication method
US5336363A (en) * 1993-09-24 1994-08-09 Applied Materials, Inc. Low temperature dry etch of copper
EP0744884A3 (de) * 1995-05-23 1997-09-24 Hitachi Chemical Co Ltd Verfahren zur Herstellung einer mehrschichtigen Leiterplatte
US7012811B1 (en) 2000-05-10 2006-03-14 Micron Technology, Inc. Method of tuning a multi-path circuit
WO2020133421A1 (zh) * 2018-12-29 2020-07-02 深南电路股份有限公司 多样化装配印刷线路板及制造方法
TWI766342B (zh) * 2020-08-10 2022-06-01 大陸商鵬鼎控股(深圳)股份有限公司 電路板及其製備方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1765037U (de) * 1958-02-14 1958-04-17 Max Grundig Schaltungsplatte mit in der technik der gedruckten schaltungen aufgebrachten strombahnen.
FR2133155A5 (de) * 1971-04-09 1972-11-24 Cii
JPS4876059A (de) * 1972-01-14 1973-10-13
JPS50932A (de) * 1973-05-04 1975-01-08
JPS5210568A (en) * 1974-12-28 1977-01-26 Hideo Machida Method of manufacturing multilayered printed wiring substrate
US4076575A (en) * 1976-06-30 1978-02-28 International Business Machines Corporation Integrated fabrication method of forming connectors through insulative layers
US4420364A (en) * 1976-11-02 1983-12-13 Sharp Kabushiki Kaisha High-insulation multi-layer device formed on a metal substrate
FR2402379A1 (fr) * 1977-08-31 1979-03-30 Cayrol Pierre Henri Perfectionnements apportes aux circuits imprimes
DE2838982B2 (de) * 1978-09-07 1980-09-18 Standard Elektrik Lorenz Ag, 7000 Stuttgart Verfahren zum Herstellen von Mehrebenen-Leiterplatten
JPS56103260A (en) * 1980-01-22 1981-08-18 Asahi Kagaku Kenkyusho:Kk Conductive paint containing copper powder
JPS5797970U (de) * 1980-12-08 1982-06-16
EP0074605B1 (de) * 1981-09-11 1990-08-29 Kabushiki Kaisha Toshiba Verfahren zum Herstellen eines Substrats für Multischichtschaltung
JPS61185994A (ja) * 1985-02-13 1986-08-19 信越化学工業株式会社 耐熱性フレキシブルプリント配線用基板およびその製造方法
US4661372A (en) * 1985-12-23 1987-04-28 General Motors Corporation UV-induced copper-catalyzed electroless deposition onto styrene-derivative polymer surface

Also Published As

Publication number Publication date
KR870003679A (ko) 1987-04-18
GB8620904D0 (en) 1986-10-08
GB2181303A (en) 1987-04-15
GB2181303B (en) 1989-09-06
DE3631632C2 (de) 1992-01-30
DE3631632A1 (de) 1987-04-02
JPH0213477B2 (de) 1990-04-04
FR2588146B1 (fr) 1994-05-20
JPS6276600A (ja) 1987-04-08
KR900001840B1 (ko) 1990-03-24
US4734156A (en) 1988-03-29
FR2588146A1 (fr) 1987-04-03

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
BV The patent application has lapsed