NL8300040A - Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. - Google Patents

Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. Download PDF

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Publication number
NL8300040A
NL8300040A NL8300040A NL8300040A NL8300040A NL 8300040 A NL8300040 A NL 8300040A NL 8300040 A NL8300040 A NL 8300040A NL 8300040 A NL8300040 A NL 8300040A NL 8300040 A NL8300040 A NL 8300040A
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NL
Netherlands
Prior art keywords
unit
line
gate
units
digits
Prior art date
Application number
NL8300040A
Other languages
English (en)
Dutch (nl)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of NL8300040A publication Critical patent/NL8300040A/nl

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Bus Control (AREA)
  • Telephonic Communication Services (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
NL8300040A 1982-01-07 1983-01-06 Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. NL8300040A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/337,672 US4463445A (en) 1982-01-07 1982-01-07 Circuitry for allocating access to a demand-shared bus
US33767282 1982-01-07

Publications (1)

Publication Number Publication Date
NL8300040A true NL8300040A (nl) 1983-08-01

Family

ID=23321519

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8300040A NL8300040A (nl) 1982-01-07 1983-01-06 Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn.

Country Status (8)

Country Link
US (1) US4463445A (sv)
KR (1) KR880002196B1 (sv)
CA (1) CA1193338A (sv)
DE (1) DE3300260A1 (sv)
FR (1) FR2519440B1 (sv)
GB (1) GB2114334B (sv)
NL (1) NL8300040A (sv)
SE (1) SE450055B (sv)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4620278A (en) * 1983-08-29 1986-10-28 Sperry Corporation Distributed bus arbitration according each bus user the ability to inhibit all new requests to arbitrate the bus, or to cancel its own pending request, and according the highest priority user the ability to stop the bus
US4633394A (en) * 1984-04-24 1986-12-30 International Business Machines Corp. Distributed arbitration for multiple processors
DE3546662C3 (de) * 1985-02-22 1997-04-03 Bosch Gmbh Robert Verfahren zum Betreiben einer Datenverarbeitungsanlage
US4703420A (en) * 1985-02-28 1987-10-27 International Business Machines Corporation System for arbitrating use of I/O bus by co-processor and higher priority I/O units in which co-processor automatically request bus access in anticipation of need
US4760515A (en) * 1985-10-28 1988-07-26 International Business Machines Corporation Arbitration apparatus for determining priority of access to a shared bus on a rotating priority basis
US4794516A (en) * 1985-10-31 1988-12-27 International Business Machines Corporation Method and apparatus for communicating data between a host and a plurality of parallel processors
US4809164A (en) * 1986-03-26 1989-02-28 Tandem Computers Incorporated Processor controlled modifying of tabled input/output priority
US5146565A (en) * 1986-07-18 1992-09-08 Intel Corporation I/O Control system having a plurality of access enabling bits for controlling access to selective ports of an I/O device
JP2633900B2 (ja) * 1988-04-22 1997-07-23 株式会社日立製作所 共通バス制御方法
US5349690A (en) * 1988-05-11 1994-09-20 Digital Equipment Corporation Fair arbitration scheme for arbitrating between multiple nodes in a computer system seeking control of a common bus
US4961140A (en) * 1988-06-29 1990-10-02 International Business Machines Corporation Apparatus and method for extending a parallel synchronous data and message bus
US5088024A (en) * 1989-01-31 1992-02-11 Wisconsin Alumni Research Foundation Round-robin protocol method for arbitrating access to a shared bus arbitration providing preference to lower priority units after bus access by a higher priority unit
US5274774A (en) * 1989-01-31 1993-12-28 Wisconsin Alumni Research Foundation First-come first-serve arbitration protocol
US5168568A (en) * 1989-02-06 1992-12-01 Compaq Computer Corporation Delaying arbitration of bus access in digital computers
US5060139A (en) * 1989-04-07 1991-10-22 Tektronix, Inc. Futurebus interrupt subsystem apparatus
JP3553060B2 (ja) * 1990-01-02 2004-08-11 モトローラ・インコーポレイテッド マイクロコンピュータにおける逐次割込み
US5212796A (en) * 1990-01-02 1993-05-18 Motorola, Inc. System with modules using priority numbers related to interrupt vectors for bit-serial-arbitration on independent arbitration bus while CPU executing instructions
US5263163A (en) * 1990-01-19 1993-11-16 Codex Corporation Arbitration among multiple users of a shared resource
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
CA2051029C (en) * 1990-11-30 1996-11-05 Pradeep S. Sindhu Arbitration of packet switched busses, including busses for shared memory multiprocessors
US5301282A (en) * 1991-10-15 1994-04-05 International Business Machines Corp. Controlling bus allocation using arbitration hold
US5265092A (en) * 1992-03-18 1993-11-23 Digital Equipment Corporation Synchronization mechanism for link state packet routing
US5553310A (en) * 1992-10-02 1996-09-03 Compaq Computer Corporation Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems
US5535395A (en) * 1992-10-02 1996-07-09 Compaq Computer Corporation Prioritization of microprocessors in multiprocessor computer systems
US5553248A (en) * 1992-10-02 1996-09-03 Compaq Computer Corporation System for awarding the highest priority to a microprocessor releasing a system bus after aborting a locked cycle upon detecting a locked retry signal
DE4304187B4 (de) * 1993-02-12 2005-11-10 Tenovis Gmbh & Co. Kg Verfahren zur Beschleunigung des Zugriffswettbewerbs für an ein Bussystem angeschlossene Stationen in Kommunikations-Vermittlungsanlagen
US5546548A (en) * 1993-03-31 1996-08-13 Intel Corporation Arbiter and arbitration process for a dynamic and flexible prioritization
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
US5388245A (en) * 1993-06-01 1995-02-07 Intel Corporation Memory arbitration method and apparatus for multiple-cycle memory coprocessors employing a data cache unit and stack RAM
US5548771A (en) * 1993-11-02 1996-08-20 Motorola Inc. Multi-processor data processing system having multiple ports coupled to multiple interface circuits
US5603046A (en) * 1993-11-02 1997-02-11 Motorola Inc. Method for complex data movement in a multi-processor data processing system
DE19614238C1 (de) * 1996-04-10 1997-12-11 Siemens Ag Kommunikationssystem mit einer Meisterstation und mindestens einer Sklavenstation
US5898694A (en) * 1996-12-30 1999-04-27 Cabletron Systems, Inc. Method of round robin bus arbitration
US6356560B1 (en) * 1997-05-30 2002-03-12 Adtran, Inc. Arbitration mechanism for statistically multiplexed frame relay switching system
US5909558A (en) * 1997-07-31 1999-06-01 Linzmeier; Daniel Low power serial arbitration system
KR100455396B1 (ko) * 2002-10-14 2004-11-06 삼성전자주식회사 마스터 블록들의 우선 순위를 결정하는 파라미터 발생회로 및 파라미터 발생 방법.
DE102004013635B4 (de) * 2004-03-19 2006-04-20 Infineon Technologies Ag Verfahren zur Vergabe von Buszugriffsrechten in Multimaster-Bussystemen, sowie Multimaster-Bussystem zur Durchführung des Verfahrens
DE102010023569A1 (de) * 2010-06-08 2011-12-08 Siemens Aktiengesellschaft Verteiltes Kommunikationssystem, insbesondere für Leistungsschalter
US8706936B2 (en) 2011-11-14 2014-04-22 Arm Limited Integrated circuit having a bus network, and method for the integrated circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4871547A (sv) * 1971-12-27 1973-09-27 Hitachi Ltd
GB1365838A (en) * 1972-04-21 1974-09-04 Ibm Data handling system
US3983540A (en) * 1975-09-08 1976-09-28 Honeywell Inc. Rapid bus priority resolution
US4096571A (en) * 1976-09-08 1978-06-20 Codex Corporation System for resolving memory access conflicts among processors and minimizing processor waiting times for access to memory by comparing waiting times and breaking ties by an arbitrary priority ranking
SE414087B (sv) * 1977-02-28 1980-07-07 Ellemtel Utvecklings Ab Anordning i ett datorsystem vid utsendning av signaler fran en processor till en eller flera andra processorer varvid prioriterade signaler sends direkt utan tidsfordrojning och oprioriterade signalers ordningsfoljd ...
US4209840A (en) * 1978-06-28 1980-06-24 Honeywell Inc. Data processing protocol system
US4320452A (en) * 1978-06-29 1982-03-16 Standard Oil Company (Indiana) Digital bus and control circuitry for data routing and transmission
US4281380A (en) * 1978-12-27 1981-07-28 Harris Corporation Bus collision avoidance system for distributed network data processing communications system
US4281381A (en) * 1979-05-14 1981-07-28 Bell Telephone Laboratories, Incorporated Distributed first-come first-served bus allocation apparatus
DE3009308A1 (de) * 1980-03-11 1981-10-01 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zum uebertragen von datensignalen

Also Published As

Publication number Publication date
KR880002196B1 (ko) 1988-10-17
FR2519440A1 (fr) 1983-07-08
GB2114334B (en) 1985-09-18
GB2114334A (en) 1983-08-17
DE3300260C2 (sv) 1990-02-22
US4463445A (en) 1984-07-31
DE3300260A1 (de) 1983-07-14
CA1193338A (en) 1985-09-10
SE8207441D0 (sv) 1982-12-28
KR840003564A (ko) 1984-09-08
SE450055B (sv) 1987-06-01
SE8207441L (sv) 1983-07-08
GB8300292D0 (en) 1983-02-09
FR2519440B1 (fr) 1985-07-12

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Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
A85 Still pending on 85-01-01
BV The patent application has lapsed