NL173110C - Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht. - Google Patents

Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.

Info

Publication number
NL173110C
NL173110C NLAANVRAGE7103548,A NL7103548A NL173110C NL 173110 C NL173110 C NL 173110C NL 7103548 A NL7103548 A NL 7103548A NL 173110 C NL173110 C NL 173110C
Authority
NL
Netherlands
Prior art keywords
semi
conductor
layers
manufacturing
different material
Prior art date
Application number
NLAANVRAGE7103548,A
Other languages
English (en)
Other versions
NL7103548A (nl
NL173110B (nl
Inventor
Maria Magdalena Nijdam-Paffen
Johannes Arnoldus Ing Appels
Wilhelmus Henricus Verkuijlen
Else Dr Kooi
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NLAANVRAGE7103548,A priority Critical patent/NL173110C/nl
Priority to US00230614A priority patent/US3783047A/en
Priority to AU39914/72A priority patent/AU470165B2/en
Priority to DE2212049A priority patent/DE2212049C2/de
Priority to GB1177172A priority patent/GB1382082A/en
Priority to SE7203257A priority patent/SE383803B/xx
Priority to BR1440/72A priority patent/BR7201440D0/pt
Priority to IT67807/72A priority patent/IT952978B/it
Priority to CH369672A priority patent/CH542514A/de
Priority to CA137,106A priority patent/CA954236A/en
Priority to AT0217472A priority patent/AT374622B/de
Priority to ES400794A priority patent/ES400794A1/es
Priority to JP47026231A priority patent/JPS5135350B1/ja
Priority to BE780907A priority patent/BE780907A/xx
Priority to FR7209441A priority patent/FR2130397B1/fr
Publication of NL7103548A publication Critical patent/NL7103548A/xx
Priority to JP51012408A priority patent/JPS5229153B2/ja
Priority to JP51012407A priority patent/JPS5229152B2/ja
Priority to JP51012409A priority patent/JPS51139269A/ja
Publication of NL173110B publication Critical patent/NL173110B/nl
Application granted granted Critical
Publication of NL173110C publication Critical patent/NL173110C/nl

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/113—Nitrides of boron or aluminum or gallium
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
NLAANVRAGE7103548,A 1971-03-17 1971-03-17 Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht. NL173110C (nl)

Priority Applications (18)

Application Number Priority Date Filing Date Title
NLAANVRAGE7103548,A NL173110C (nl) 1971-03-17 1971-03-17 Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
US00230614A US3783047A (en) 1971-03-17 1972-03-01 Method of manufacturing a semiconductor device and semiconductor device manufactured by using such a method
DE2212049A DE2212049C2 (de) 1971-03-17 1972-03-13 Verfahren zur Herstellung einer Halbleiteranordnung und Verfahren zur Herstellung eines Transistors
AU39914/72A AU470165B2 (en) 1971-03-17 1972-03-13 Method of manufacturing a semiconductor device and semiconductor device manufactured by using sucha method
SE7203257A SE383803B (sv) 1971-03-17 1972-03-14 Sett att framstella en halvledaranordning
BR1440/72A BR7201440D0 (pt) 1971-03-17 1972-03-14 Um processo para fabricar um dispositivo semicondutor
IT67807/72A IT952978B (it) 1971-03-17 1972-03-14 Procedimento per fabbricare un dispositivo semiconduttore e dispositivo ottenuto col proce dimento
CH369672A CH542514A (de) 1971-03-17 1972-03-14 Verfahren zur Herstellung einer Halbleiteranordnung und durch dieses Verfahren hergestellte Halbleiteranordnung
GB1177172A GB1382082A (en) 1971-03-17 1972-03-14 Methods of manufacturing semiconductor devices
CA137,106A CA954236A (en) 1971-03-17 1972-03-14 Method of manufacturing a semiconductor device and semiconductor device manufactured by using such a method
AT0217472A AT374622B (de) 1971-03-17 1972-03-15 Verfahren zur herstellung einer halbleiteranordnung mit einem halbleiterkoerper, bei dem die elektrischen eigenschaften von zwei an durch masken definierte oberflaechenteile des halbleiterkoerpers grenzenden zonen des halbleiterkoerpers geaendert werden
ES400794A ES400794A1 (es) 1971-03-17 1972-03-15 Un metodo de fabricacion de un dispositivo semiconductor.
JP47026231A JPS5135350B1 (nl) 1971-03-17 1972-03-16
BE780907A BE780907A (fr) 1971-03-17 1972-03-17 Procede de fabrication d'un dispositif semiconducteur et dispositif semiconducteur obtenu par la mise en oeuvre de ce procede
FR7209441A FR2130397B1 (nl) 1971-03-17 1972-03-17
JP51012407A JPS5229152B2 (nl) 1971-03-17 1976-02-09
JP51012408A JPS5229153B2 (nl) 1971-03-17 1976-02-09
JP51012409A JPS51139269A (en) 1971-03-17 1976-02-09 Method of manufacturing semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE7103548,A NL173110C (nl) 1971-03-17 1971-03-17 Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.

Publications (3)

Publication Number Publication Date
NL7103548A NL7103548A (nl) 1972-09-19
NL173110B NL173110B (nl) 1983-07-01
NL173110C true NL173110C (nl) 1983-12-01

Family

ID=19812705

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7103548,A NL173110C (nl) 1971-03-17 1971-03-17 Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.

Country Status (15)

Country Link
US (1) US3783047A (nl)
JP (4) JPS5135350B1 (nl)
AT (1) AT374622B (nl)
AU (1) AU470165B2 (nl)
BE (1) BE780907A (nl)
BR (1) BR7201440D0 (nl)
CA (1) CA954236A (nl)
CH (1) CH542514A (nl)
DE (1) DE2212049C2 (nl)
ES (1) ES400794A1 (nl)
FR (1) FR2130397B1 (nl)
GB (1) GB1382082A (nl)
IT (1) IT952978B (nl)
NL (1) NL173110C (nl)
SE (1) SE383803B (nl)

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961355A (en) * 1972-06-30 1976-06-01 International Business Machines Corporation Semiconductor device having electrically insulating barriers for surface leakage sensitive devices and method of forming
NL161301C (nl) * 1972-12-29 1980-01-15 Philips Nv Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.
NL176029C (nl) * 1973-02-01 1985-02-01 Philips Nv Geintegreerde logische schakeling met komplementaire transistoren.
US3885994A (en) * 1973-05-25 1975-05-27 Trw Inc Bipolar transistor construction method
US3888706A (en) * 1973-08-06 1975-06-10 Rca Corp Method of making a compact guard-banded mos integrated circuit device using framelike diffusion-masking structure
US3951693A (en) * 1974-01-17 1976-04-20 Motorola, Inc. Ion-implanted self-aligned transistor device including the fabrication method therefor
US4038110A (en) * 1974-06-17 1977-07-26 Ibm Corporation Planarization of integrated circuit surfaces through selective photoresist masking
DE2438256A1 (de) * 1974-08-08 1976-02-19 Siemens Ag Verfahren zum herstellen einer monolithischen halbleiterverbundanordnung
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring
US4044454A (en) * 1975-04-16 1977-08-30 Ibm Corporation Method for forming integrated circuit regions defined by recessed dielectric isolation
US4002511A (en) * 1975-04-16 1977-01-11 Ibm Corporation Method for forming masks comprising silicon nitride and novel mask structures produced thereby
US3948694A (en) * 1975-04-30 1976-04-06 Motorola, Inc. Self-aligned method for integrated circuit manufacture
NL7506594A (nl) * 1975-06-04 1976-12-07 Philips Nv Werkwijze voor het vervaardigen van een halfge- leiderinrichting en halfgeleiderinrichting ver- vaardigd met behulp van de werkwijze.
US3976511A (en) * 1975-06-30 1976-08-24 Ibm Corporation Method for fabricating integrated circuit structures with full dielectric isolation by ion bombardment
US3961999A (en) * 1975-06-30 1976-06-08 Ibm Corporation Method for forming recessed dielectric isolation with a minimized "bird's beak" problem
US3966514A (en) * 1975-06-30 1976-06-29 Ibm Corporation Method for forming dielectric isolation combining dielectric deposition and thermal oxidation
US4045250A (en) * 1975-08-04 1977-08-30 Rca Corporation Method of making a semiconductor device
FR2358748A1 (fr) * 1976-07-15 1978-02-10 Radiotechnique Compelec Procede d'autoalignement des elements d'un dispositif semi-conducteur et dispositif realise suivant ce procede
US4131497A (en) * 1977-07-12 1978-12-26 International Business Machines Corporation Method of manufacturing self-aligned semiconductor devices
US4135954A (en) * 1977-07-12 1979-01-23 International Business Machines Corporation Method for fabricating self-aligned semiconductor devices utilizing selectively etchable masking layers
US4135289A (en) * 1977-08-23 1979-01-23 Bell Telephone Laboratories, Incorporated Method for producing a buried junction memory device
DE2911726C2 (de) * 1978-03-27 1985-08-01 Ncr Corp., Dayton, Ohio Verfahren zur Herstellung eines Feldeffekttransistors
DE2824026A1 (de) * 1978-06-01 1979-12-20 Licentia Gmbh Verfahren zum herstellen eines sperrschicht-feldeffekttransistors
US4182636A (en) * 1978-06-30 1980-01-08 International Business Machines Corporation Method of fabricating self-aligned contact vias
JPS5538084A (en) * 1978-09-11 1980-03-17 Nec Corp Semiconductor integrated circuit device
JPS55128868A (en) * 1979-03-28 1980-10-06 Fujitsu Ltd Method of fabricating semiconductor device
NL7903158A (nl) * 1979-04-23 1980-10-27 Philips Nv Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
JPS55154763A (en) * 1979-05-23 1980-12-02 Hitachi Ltd Manufacture of semiconductor device
US4677456A (en) * 1979-05-25 1987-06-30 Raytheon Company Semiconductor structure and manufacturing method
US4289550A (en) * 1979-05-25 1981-09-15 Raytheon Company Method of forming closely spaced device regions utilizing selective etching and diffusion
JPS588139B2 (ja) * 1979-05-31 1983-02-14 富士通株式会社 半導体装置の製造方法
US4376664A (en) * 1979-05-31 1983-03-15 Fujitsu Limited Method of producing a semiconductor device
JPS5856546Y2 (ja) * 1979-09-26 1983-12-27 日本軽金属株式会社 パネル連結取付装置
US4313782A (en) * 1979-11-14 1982-02-02 Rca Corporation Method of manufacturing submicron channel transistors
US4656498A (en) * 1980-10-27 1987-04-07 Texas Instruments Incorporated Oxide-isolated integrated Schottky logic
US4511911A (en) * 1981-07-22 1985-04-16 International Business Machines Corporation Dense dynamic memory cell structure and process
US4443932A (en) * 1982-01-18 1984-04-24 Motorla, Inc. Self-aligned oxide isolated process and device
US4569698A (en) * 1982-02-25 1986-02-11 Raytheon Company Method of forming isolated device regions by selective successive etching of composite masking layers and semiconductor material prior to ion implantation
GB2115609B (en) * 1982-02-25 1986-04-30 Raytheon Co Semiconductor structure manufacturing method
US4591890A (en) * 1982-12-20 1986-05-27 Motorola Inc. Radiation hard MOS devices and methods for the manufacture thereof
US4572765A (en) * 1983-05-02 1986-02-25 Fairchild Camera & Instrument Corporation Method of fabricating integrated circuit structures using replica patterning
JPS6281727A (ja) * 1985-10-05 1987-04-15 Fujitsu Ltd 埋込型素子分離溝の形成方法
US4729816A (en) * 1987-01-02 1988-03-08 Motorola, Inc. Isolation formation process with active area protection
NL8700541A (nl) * 1987-03-06 1988-10-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een plak silicium plaatselijk wordt voorzien van veldoxidegebieden.
JP2609619B2 (ja) * 1987-08-25 1997-05-14 三菱電機株式会社 半導体装置
KR0167231B1 (ko) * 1994-11-11 1999-02-01 문정환 반도체장치의 격리방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
US3451867A (en) * 1966-05-31 1969-06-24 Gen Electric Processes of epitaxial deposition or diffusion employing a silicon carbide masking layer
JPS517551A (en) * 1974-07-06 1976-01-21 Akira Ito Purasuchitsukugaisoseidenkionsuikino kozo

Also Published As

Publication number Publication date
SE383803B (sv) 1976-03-29
BE780907A (fr) 1972-09-18
AU470165B2 (en) 1973-09-20
IT952978B (it) 1973-07-30
CH542514A (de) 1973-09-30
DE2212049C2 (de) 1981-10-29
GB1382082A (en) 1975-01-29
NL7103548A (nl) 1972-09-19
BR7201440D0 (pt) 1973-06-07
ATA217472A (de) 1979-01-15
DE2212049A1 (de) 1972-09-21
FR2130397A1 (nl) 1972-11-03
NL173110B (nl) 1983-07-01
JPS539061B2 (nl) 1978-04-03
AT374622B (de) 1984-05-10
AU3991472A (en) 1973-09-20
JPS51139269A (en) 1976-12-01
JPS5229153B2 (nl) 1977-07-30
ES400794A1 (es) 1975-01-16
CA954236A (en) 1974-09-03
FR2130397B1 (nl) 1977-09-02
US3783047A (en) 1974-01-01
JPS51102471A (nl) 1976-09-09
JPS51102472A (nl) 1976-09-09
JPS5229152B2 (nl) 1977-07-30
JPS5135350B1 (nl) 1976-10-01

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