NL1003207C2 - Werkwijze voor het fabriceren van een flip-chip-halfgeleiderinrichting met een inductor. - Google Patents

Werkwijze voor het fabriceren van een flip-chip-halfgeleiderinrichting met een inductor. Download PDF

Info

Publication number
NL1003207C2
NL1003207C2 NL1003207A NL1003207A NL1003207C2 NL 1003207 C2 NL1003207 C2 NL 1003207C2 NL 1003207 A NL1003207 A NL 1003207A NL 1003207 A NL1003207 A NL 1003207A NL 1003207 C2 NL1003207 C2 NL 1003207C2
Authority
NL
Netherlands
Prior art keywords
flip chip
copper
over
bulge
inductor
Prior art date
Application number
NL1003207A
Other languages
English (en)
Dutch (nl)
Other versions
NL1003207A1 (nl
Inventor
Michael Jeffrey Pfeifer
George William Marlin
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of NL1003207A1 publication Critical patent/NL1003207A1/xx
Application granted granted Critical
Publication of NL1003207C2 publication Critical patent/NL1003207C2/nl

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10Inductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01049Indium [In]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01051Antimony [Sb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19042Component type being an inductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
NL1003207A 1995-05-30 1996-05-24 Werkwijze voor het fabriceren van een flip-chip-halfgeleiderinrichting met een inductor. NL1003207C2 (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45278495 1995-05-30
US08/452,784 US5541135A (en) 1995-05-30 1995-05-30 Method of fabricating a flip chip semiconductor device having an inductor

Publications (2)

Publication Number Publication Date
NL1003207A1 NL1003207A1 (nl) 1996-12-03
NL1003207C2 true NL1003207C2 (nl) 1997-06-24

Family

ID=23797921

Family Applications (1)

Application Number Title Priority Date Filing Date
NL1003207A NL1003207C2 (nl) 1995-05-30 1996-05-24 Werkwijze voor het fabriceren van een flip-chip-halfgeleiderinrichting met een inductor.

Country Status (3)

Country Link
US (1) US5541135A (ja)
JP (1) JP3629337B2 (ja)
NL (1) NL1003207C2 (ja)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6448169B1 (en) * 1995-12-21 2002-09-10 International Business Machines Corporation Apparatus and method for use in manufacturing semiconductor devices
JP3409598B2 (ja) * 1996-08-29 2003-05-26 ソニー株式会社 半導体装置の製造方法
US6083773A (en) * 1997-09-16 2000-07-04 Micron Technology, Inc. Methods of forming flip chip bumps and related flip chip bump constructions
US5904156A (en) * 1997-09-24 1999-05-18 International Business Machines Corporation Dry film resist removal in the presence of electroplated C4's
US6642136B1 (en) 2001-09-17 2003-11-04 Megic Corporation Method of making a low fabrication cost, high performance, high reliability chip scale package
US6037667A (en) * 1998-08-24 2000-03-14 Micron Technology, Inc. Socket assembly for use with solder ball
US8021976B2 (en) 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US6495442B1 (en) 2000-10-18 2002-12-17 Magic Corporation Post passivation interconnection schemes on top of the IC chips
US6300250B1 (en) 1999-08-09 2001-10-09 Taiwan Semiconductor Manufacturing Company Method of forming bumps for flip chip applications
US6413858B1 (en) * 1999-08-27 2002-07-02 Micron Technology, Inc. Barrier and electroplating seed layer
US6562545B1 (en) 1999-09-17 2003-05-13 Micron Technology, Inc. Method of making a socket assembly for use with a solder ball
US6362525B1 (en) 1999-11-09 2002-03-26 Cypress Semiconductor Corp. Circuit structure including a passive element formed within a grid array substrate and method for making the same
US6469394B1 (en) 2000-01-31 2002-10-22 Fujitsu Limited Conductive interconnect structures and methods for forming conductive interconnect structures
US6180445B1 (en) 2000-04-24 2001-01-30 Taiwan Semiconductor Manufacturing Company Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed
AU2001274414A1 (en) * 2000-06-30 2002-01-08 Jds Uniphase Corporation Microelectronic packages including reactive components, and methods of fabricating the same
US6714113B1 (en) 2000-11-14 2004-03-30 International Business Machines Corporation Inductor for integrated circuits
US6815324B2 (en) * 2001-02-15 2004-11-09 Megic Corporation Reliable metal bumps on top of I/O pads after removal of test probe marks
US8158508B2 (en) * 2001-03-05 2012-04-17 Megica Corporation Structure and manufacturing method of a chip scale package
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
TWI313507B (en) * 2002-10-25 2009-08-11 Megica Corporatio Method for assembling chips
US6869515B2 (en) 2001-03-30 2005-03-22 Uri Cohen Enhanced electrochemical deposition (ECD) filling of high aspect ratio openings
EP2315510A3 (en) * 2001-06-05 2012-05-02 Dai Nippon Printing Co., Ltd. Wiring board provided with passive element
US7099293B2 (en) * 2002-05-01 2006-08-29 Stmicroelectronics, Inc. Buffer-less de-skewing for symbol combination in a CDMA demodulator
TWI245402B (en) 2002-01-07 2005-12-11 Megic Corp Rod soldering structure and manufacturing process thereof
US6878633B2 (en) * 2002-12-23 2005-04-12 Freescale Semiconductor, Inc. Flip-chip structure and method for high quality inductors and transformers
KR100585104B1 (ko) * 2003-10-24 2006-05-30 삼성전자주식회사 초박형 플립칩 패키지의 제조방법
US7394161B2 (en) * 2003-12-08 2008-07-01 Megica Corporation Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto
US8067837B2 (en) * 2004-09-20 2011-11-29 Megica Corporation Metallization structure over passivation layer for IC chip
US8294279B2 (en) 2005-01-25 2012-10-23 Megica Corporation Chip package with dam bar restricting flow of underfill
JP4591100B2 (ja) * 2005-02-03 2010-12-01 ソニー株式会社 半導体装置およびその製造方法
US20070138628A1 (en) * 2005-12-15 2007-06-21 Lam Ken M Apparatus and method for increasing the quantity of discrete electronic components in an integrated circuit package
US8258599B2 (en) * 2005-12-15 2012-09-04 Atmel Corporation Electronics package with an integrated circuit device having post wafer fabrication integrated passive components
US7932590B2 (en) * 2006-07-13 2011-04-26 Atmel Corporation Stacked-die electronics package with planar and three-dimensional inductor elements
US7652348B1 (en) 2006-07-27 2010-01-26 National Semiconductor Corporation Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits
US7829425B1 (en) * 2006-08-15 2010-11-09 National Semiconductor Corporation Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits
US7776705B2 (en) * 2006-09-06 2010-08-17 Atmel Corporation Method for fabricating a thick copper line and copper inductor resulting therefrom
USRE48422E1 (en) 2007-09-05 2021-02-02 Research & Business Foundation Sungkyunkwan Univ. Method of making flip chip
KR100874588B1 (ko) 2007-09-05 2008-12-16 성균관대학교산학협력단 전기적 특성 평가가 가능한 플립칩 및 이것의 제조 방법
CN101952961B (zh) * 2008-02-25 2013-01-30 飞兆半导体公司 包括集成薄膜电感器的微模块及其制造方法
US20110064512A1 (en) * 2008-07-03 2011-03-17 Shaw Thomas J Cleaning Tool
US8777504B2 (en) * 2008-07-03 2014-07-15 Retractable Technologies, Inc. Cleaning tool
US9059026B2 (en) 2010-06-01 2015-06-16 Taiwan Semiconductor Manufacturing Company, Ltd. 3-D inductor and transformer
US8471358B2 (en) 2010-06-01 2013-06-25 Taiwan Semiconductor Manufacturing Company, Ltd. 3D inductor and transformer
US20120086101A1 (en) 2010-10-06 2012-04-12 International Business Machines Corporation Integrated circuit and interconnect, and method of fabricating same
US9324667B2 (en) 2012-01-13 2016-04-26 Freescale Semiconductor, Inc. Semiconductor devices with compliant interconnects
US9041152B2 (en) 2013-03-14 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Inductor with magnetic material
US9324557B2 (en) 2014-03-14 2016-04-26 Avago Technologies General Ip (Singapore) Pte. Ltd. Method for fabricating equal height metal pillars of different diameters
US20230033082A1 (en) * 2021-07-30 2023-02-02 Texas Instruments Incorporated Bulk acoustic wave resonator with an integrated passive device fabricated using bump process

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087314A (en) * 1976-09-13 1978-05-02 Motorola, Inc. Bonding pedestals for semiconductor devices
EP0316912A2 (en) * 1987-11-18 1989-05-24 Casio Computer Company Limited A bump electrode structure of a semiconductor device and a method for forming the same
EP0398485A1 (en) * 1989-05-16 1990-11-22 Gec-Marconi Limited A method of making a Flip Chip Solder bond structure for devices with gold based metallisation
EP0402061A2 (en) * 1989-06-05 1990-12-12 Motorola, Inc. Metallization process
US5310699A (en) * 1984-08-28 1994-05-10 Sharp Kabushiki Kaisha Method of manufacturing a bump electrode
JPH0714876A (ja) * 1993-06-17 1995-01-17 Matsushita Electron Corp 集積回路装置及びその製造方法
US5409567A (en) * 1994-04-28 1995-04-25 Motorola, Inc. Method of etching copper layers

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691628A (en) * 1969-10-31 1972-09-19 Gen Electric Method of fabricating composite integrated circuits
US4034399A (en) * 1976-02-27 1977-07-05 Rca Corporation Interconnection means for an array of majority carrier microwave devices
US5189507A (en) * 1986-12-17 1993-02-23 Raychem Corporation Interconnection of electronic components
US5276351A (en) * 1988-10-17 1994-01-04 Semiconductor Energy Laboratory Co., Ltd. Electronic device and a manufacturing method for the same
US5200364A (en) * 1990-01-26 1993-04-06 Texas Instruments Incorporated Packaged integrated circuit with encapsulated electronic devices
US5410179A (en) * 1990-04-05 1995-04-25 Martin Marietta Corporation Microwave component having tailored operating characteristics and method of tailoring
US5087896A (en) * 1991-01-16 1992-02-11 Hughes Aircraft Company Flip-chip MMIC oscillator assembly with off-chip coplanar waveguide resonant inductor
US5177670A (en) * 1991-02-08 1993-01-05 Hitachi, Ltd. Capacitor-carrying semiconductor module
JP2820187B2 (ja) * 1992-04-16 1998-11-05 三星電子 株式会社 半導体装置の製造方法
US5397729A (en) * 1992-06-15 1995-03-14 Asahi Kasei Microsystems Co., Ltd. Method for fabrication of semiconductor device having polycrystalline silicon and metal silicides
US5420063A (en) * 1994-04-11 1995-05-30 National Semiconductor Corporation Method of producing a resistor in an integrated circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087314A (en) * 1976-09-13 1978-05-02 Motorola, Inc. Bonding pedestals for semiconductor devices
US5310699A (en) * 1984-08-28 1994-05-10 Sharp Kabushiki Kaisha Method of manufacturing a bump electrode
EP0316912A2 (en) * 1987-11-18 1989-05-24 Casio Computer Company Limited A bump electrode structure of a semiconductor device and a method for forming the same
EP0398485A1 (en) * 1989-05-16 1990-11-22 Gec-Marconi Limited A method of making a Flip Chip Solder bond structure for devices with gold based metallisation
EP0402061A2 (en) * 1989-06-05 1990-12-12 Motorola, Inc. Metallization process
JPH0714876A (ja) * 1993-06-17 1995-01-17 Matsushita Electron Corp 集積回路装置及びその製造方法
US5409567A (en) * 1994-04-28 1995-04-25 Motorola, Inc. Method of etching copper layers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 95, no. 001 *

Also Published As

Publication number Publication date
JPH08330353A (ja) 1996-12-13
US5541135A (en) 1996-07-30
JP3629337B2 (ja) 2005-03-16
NL1003207A1 (nl) 1996-12-03

Similar Documents

Publication Publication Date Title
NL1003207C2 (nl) Werkwijze voor het fabriceren van een flip-chip-halfgeleiderinrichting met een inductor.
US5478773A (en) Method of making an electronic device having an integrated inductor
US8344479B2 (en) Integrated circuit inductor with integrated vias
US8129265B2 (en) High performance system-on-chip discrete components using post passivation process
US7176556B2 (en) Semiconductor system-in-package
KR100737188B1 (ko) 전자 부품 및 그 제조 방법
US7531417B2 (en) High performance system-on-chip passive device using post passivation process
US6027980A (en) Method of forming a decoupling capacitor
GB2285174A (en) Via-hole and production method of via-hole
US7935607B2 (en) Integrated passive device with a high resistivity substrate and method for forming the same
JP3723780B2 (ja) 半導体装置及びその製造方法
JPH0936312A (ja) インダクタンス素子およびその製造方法
US7919860B2 (en) Semiconductor device having wafer level chip scale packaging substrate decoupling
CN104037170A (zh) 具有集成式无源装置的半导体装置及其制造工艺
KR100890716B1 (ko) 반도체 부품을 제조하는 방법 및 그 반도체 부품
EP0757846B1 (en) Electronic component comprising a thin-film structure with passive elements
NL193808C (nl) Metalliseringspatroon voor een halfgeleiderinrichting, en werkwijze voor het vervaardigen daarvan.
KR100240647B1 (ko) 반도체 소자의 캐패시터 제조 방법
US6781229B1 (en) Method for integrating passives on-die utilizing under bump metal and related structure
US5861341A (en) Plated nickel-gold/dielectric interface for passivated MMICs
EP1128435A2 (en) Microwave electric elements using porous silicon dioxide layer and forming method of same
JP5005856B2 (ja) 半導体基板の表面をオーバーレイする高性能集積回路のためのインダクターを形成する方法
US20030222328A1 (en) Monolithic bridge capacitor
JP4644949B2 (ja) 半導体装置及びそのスパイラルインダクタ製造方法
KR20050064657A (ko) 고주파 소자의 인덕터 제조방법

Legal Events

Date Code Title Description
AD1A A request for search or an international type search has been filed
PD2B A search report has been drawn up
VD1 Lapsed due to non-payment of the annual fee

Effective date: 20011201