MY163982A - Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same - Google Patents

Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same

Info

Publication number
MY163982A
MY163982A MYPI2013001098A MYPI2013001098A MY163982A MY 163982 A MY163982 A MY 163982A MY PI2013001098 A MYPI2013001098 A MY PI2013001098A MY PI2013001098 A MYPI2013001098 A MY PI2013001098A MY 163982 A MY163982 A MY 163982A
Authority
MY
Malaysia
Prior art keywords
mask sheet
semiconductor device
adhesive
manufacturing semiconductor
property
Prior art date
Application number
MYPI2013001098A
Other languages
English (en)
Inventor
Yamai Atsufumi
Horike Takayuki
Mori Takahiro
Ichikawa Takamasa
Yamada Hiromi
Machii Satoru
Original Assignee
Tomoegawa Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tomoegawa Co Ltd filed Critical Tomoegawa Co Ltd
Publication of MY163982A publication Critical patent/MY163982A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
MYPI2013001098A 2012-04-02 2013-03-28 Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same MY163982A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012084096A JP5824402B2 (ja) 2012-04-02 2012-04-02 半導体装置製造用マスクシート及びそれを用いた半導体装置の製造方法

Publications (1)

Publication Number Publication Date
MY163982A true MY163982A (en) 2017-11-15

Family

ID=49363269

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2013001098A MY163982A (en) 2012-04-02 2013-03-28 Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same

Country Status (5)

Country Link
JP (1) JP5824402B2 (ko)
KR (1) KR101475139B1 (ko)
CN (1) CN103360973A (ko)
MY (1) MY163982A (ko)
TW (1) TWI500733B (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6247629B2 (ja) * 2014-12-11 2017-12-13 Ckd株式会社 コイル用シートの製造方法、及びコイルの製造方法
TWI621684B (zh) * 2015-09-01 2018-04-21 Lintec Corp Adhesive sheet
JP6840466B2 (ja) * 2016-03-08 2021-03-10 株式会社アムコー・テクノロジー・ジャパン 半導体パッケージ及び半導体パッケージの製造方法
KR102032767B1 (ko) 2017-05-12 2019-10-17 (주)인랩 Qfn 반도체 패키지, 이의 제조방법 및 qfn 반도체 패키지 제조용 마스크 시트
JP7045172B2 (ja) * 2017-11-28 2022-03-31 藤森工業株式会社 カバーレイフィルムおよびそれを用いた電子機器
TWI661022B (zh) * 2018-05-30 2019-06-01 律勝科技股份有限公司 接著劑組成物及其接著劑與硬化物
CN112424972A (zh) * 2018-08-29 2021-02-26 悟勞茂材料公司 掩模的制造方法、掩模及框架一体型掩模
KR102313245B1 (ko) 2021-01-04 2021-10-14 (주)인랩 반도체 패키지용 마스킹 테이프
CN115491136A (zh) * 2022-09-21 2022-12-20 江门市优彼思半导体材料有限公司 一种掩模带及其制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0827430A (ja) * 1994-07-18 1996-01-30 Sumitomo Bakelite Co Ltd 高温時の物性が改良されたフィルム接着剤及びその製造方法
TW294702B (ko) * 1994-03-08 1997-01-01 Sumitomo Bakelite Co
JP2002129126A (ja) * 2000-10-23 2002-05-09 Tomoegawa Paper Co Ltd 半導体装置用接着剤組成物および接着シート
JP4002736B2 (ja) * 2001-03-21 2007-11-07 株式会社巴川製紙所 半導体装置組立用マスクシートおよび半導体装置の組み立て方法
JP4251807B2 (ja) * 2001-12-17 2009-04-08 株式会社巴川製紙所 半導体装置製造用接着シート
JP4319892B2 (ja) * 2003-11-07 2009-08-26 株式会社巴川製紙所 半導体装置製造用接着シート及び半導体装置の製造方法
JP4863690B2 (ja) * 2005-10-31 2012-01-25 株式会社巴川製紙所 半導体装置製造用接着シート及び半導体装置並びにその製造方法
JP4654062B2 (ja) * 2005-03-30 2011-03-16 株式会社巴川製紙所 半導体装置製造用接着シート及び半導体装置の製造方法
TWI460249B (zh) * 2006-02-16 2014-11-11 Shinetsu Chemical Co 黏合組成物、黏合膜及製造半導體元件的方法

Also Published As

Publication number Publication date
TWI500733B (zh) 2015-09-21
TW201408749A (zh) 2014-03-01
JP2013213137A (ja) 2013-10-17
KR101475139B1 (ko) 2014-12-23
CN103360973A (zh) 2013-10-23
KR20130113377A (ko) 2013-10-15
JP5824402B2 (ja) 2015-11-25

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