MY163982A - Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same - Google Patents
Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the sameInfo
- Publication number
- MY163982A MY163982A MYPI2013001098A MYPI2013001098A MY163982A MY 163982 A MY163982 A MY 163982A MY PI2013001098 A MYPI2013001098 A MY PI2013001098A MY PI2013001098 A MYPI2013001098 A MY PI2013001098A MY 163982 A MY163982 A MY 163982A
- Authority
- MY
- Malaysia
- Prior art keywords
- mask sheet
- semiconductor device
- adhesive
- manufacturing semiconductor
- property
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Adhesive Tapes (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
AS A MASK SHEET, A MASK SHEET IS DESIRED IN WHICH TAPING WITH RESPECT TO A L/F CAN BE PERFORMED AT A LOWER TEMPERATURE THAN A THERMOPLASTIC MASK SHEET, THERMAL DEGRADATION, WHICH MAY CAUSE AN ADHESIVE REMAINS DURING PEELING OFF THE MASK SHEET, IS DIFFICULT TO GENERATED EVEN WHEN EXPOSED TO A HIGH TEMPERATURE, A WARP IS REDUCED WITH THE FLATNESS, A W/B PROPERTY IS EXCELLENT WITH THE HARDNESS AT A HIGH TEMPERATURE BEING HARDER THAN THAT OF AN ADHESIVE MASK SHEET OF THE RELATED ART, LESS MOLDED RESIN LEAKAGE OCCURS DURING SEALING THAN THAT OF THE ADHESIVE MASK SHEET, AND AN EASILY-PEELING-OFF PROPERTY IS OBTAINED AFTER A PLASMA CLEANING PROCESS, AND A SMALL AMOUNT OF ADHESIVE REMAINS. THE PRESENT INVENTION PROVIDES A MASK SHEET FOR MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A THERMOSET ADHESIVE LAYER WHICH IS LAMINATED ON ONE SURFACE OF A BASE LAYER, AND IS PEELABLY ADHERED TO A METAL PLATE, IN WHICH THE THERMOSET ADHESIVE LAYER CONTAINS A POLYIMIDE RESIN CONTAINING A SILOXANE SKELETON WITH A GLASS TRANSITION TEMPERATURE OF 45°C TO 170°C, AN EPOXY RESIN, A CURING AGENT, AND A FLUORINE ADDITIVE.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012084096A JP5824402B2 (en) | 2012-04-02 | 2012-04-02 | Mask sheet for manufacturing semiconductor device and method for manufacturing semiconductor device using the same |
Publications (1)
Publication Number | Publication Date |
---|---|
MY163982A true MY163982A (en) | 2017-11-15 |
Family
ID=49363269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI2013001098A MY163982A (en) | 2012-04-02 | 2013-03-28 | Mask sheet for manufacturing semiconductor device and method of manufacturing semiconductor device using the same |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP5824402B2 (en) |
KR (1) | KR101475139B1 (en) |
CN (1) | CN103360973A (en) |
MY (1) | MY163982A (en) |
TW (1) | TWI500733B (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6247629B2 (en) * | 2014-12-11 | 2017-12-13 | Ckd株式会社 | Coil sheet manufacturing method and coil manufacturing method |
KR101930197B1 (en) * | 2015-09-01 | 2018-12-17 | 린텍 가부시키가이샤 | Adhesive sheet |
JP6840466B2 (en) | 2016-03-08 | 2021-03-10 | 株式会社アムコー・テクノロジー・ジャパン | Semiconductor package and manufacturing method of semiconductor package |
KR102032767B1 (en) | 2017-05-12 | 2019-10-17 | (주)인랩 | QFN semiconductor package, method of fabricating the same and mask sheet for manufacturing the same |
JP7045172B2 (en) * | 2017-11-28 | 2022-03-31 | 藤森工業株式会社 | Coverlay film and electronic devices using it |
TWI661022B (en) * | 2018-05-30 | 2019-06-01 | 律勝科技股份有限公司 | Adhesive composition and adhesive sheet and cured product thereof |
WO2020045900A1 (en) * | 2018-08-29 | 2020-03-05 | 주식회사 티지오테크 | Method for making mask, mask, and frame-integrated mask |
KR102313245B1 (en) | 2021-01-04 | 2021-10-14 | (주)인랩 | Masking tape for semiconductor packaging |
CN115491136A (en) * | 2022-09-21 | 2022-12-20 | 江门市优彼思半导体材料有限公司 | Mask belt and preparation method thereof |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW294702B (en) * | 1994-03-08 | 1997-01-01 | Sumitomo Bakelite Co | |
JPH0827430A (en) * | 1994-07-18 | 1996-01-30 | Sumitomo Bakelite Co Ltd | Film adhesive improved in physical property at high temperature and its production |
JP2002129126A (en) * | 2000-10-23 | 2002-05-09 | Tomoegawa Paper Co Ltd | Adhesive composition and adhesive sheet for semiconductor device |
JP4002736B2 (en) * | 2001-03-21 | 2007-11-07 | 株式会社巴川製紙所 | Mask sheet for assembling semiconductor device and assembling method of semiconductor device |
JP4251807B2 (en) * | 2001-12-17 | 2009-04-08 | 株式会社巴川製紙所 | Adhesive sheet for semiconductor device manufacturing |
JP4319892B2 (en) * | 2003-11-07 | 2009-08-26 | 株式会社巴川製紙所 | Adhesive sheet for manufacturing semiconductor device and method for manufacturing semiconductor device |
JP4863690B2 (en) * | 2005-10-31 | 2012-01-25 | 株式会社巴川製紙所 | Adhesive sheet for manufacturing semiconductor device, semiconductor device and manufacturing method thereof |
JP4654062B2 (en) * | 2005-03-30 | 2011-03-16 | 株式会社巴川製紙所 | Adhesive sheet for manufacturing semiconductor device and method for manufacturing semiconductor device |
TWI460249B (en) * | 2006-02-16 | 2014-11-11 | Shinetsu Chemical Co | Adhesive composition, adhesive film, and method of producing semiconductor device |
-
2012
- 2012-04-02 JP JP2012084096A patent/JP5824402B2/en active Active
-
2013
- 2013-03-28 MY MYPI2013001098A patent/MY163982A/en unknown
- 2013-03-28 TW TW102111144A patent/TWI500733B/en active
- 2013-03-28 CN CN2013101055562A patent/CN103360973A/en active Pending
- 2013-04-02 KR KR1020130035722A patent/KR101475139B1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
JP5824402B2 (en) | 2015-11-25 |
TW201408749A (en) | 2014-03-01 |
KR20130113377A (en) | 2013-10-15 |
JP2013213137A (en) | 2013-10-17 |
TWI500733B (en) | 2015-09-21 |
KR101475139B1 (en) | 2014-12-23 |
CN103360973A (en) | 2013-10-23 |
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