MX2015009838A - Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. - Google Patents
Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos.Info
- Publication number
- MX2015009838A MX2015009838A MX2015009838A MX2015009838A MX2015009838A MX 2015009838 A MX2015009838 A MX 2015009838A MX 2015009838 A MX2015009838 A MX 2015009838A MX 2015009838 A MX2015009838 A MX 2015009838A MX 2015009838 A MX2015009838 A MX 2015009838A
- Authority
- MX
- Mexico
- Prior art keywords
- data processing
- ldpc
- bits
- information
- ldpc code
- Prior art date
Links
- 238000003672 processing method Methods 0.000 title abstract 2
- 239000011159 matrix material Substances 0.000 abstract 7
- 230000002349 favourable effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1151—Algebraically constructed LDPC codes, e.g. LDPC codes derived from Euclidean geometries [EG-LDPC codes]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Multimedia (AREA)
- Discrete Mathematics (AREA)
- Computing Systems (AREA)
- Algebra (AREA)
- Error Detection And Correction (AREA)
Abstract
Esta tecnología pertenece a un dispositivo para el procesamiento de datos y un método para el procesamiento de datos que es capaz de proporcionar un código LDPC que tiene una tasa de error favorable. Este codificador LDPC codifica en una longitud de código de 64,800 bits y una tasa de codificación de 7/30, 8/30, 9/30, 10/30 u 11/30LDPC. El código LDPC contiene bits de información y bits de paridad, y una matriz de comprobación (H) se configura a partir de una sección de la matriz de información que corresponde a los bits de información del código LDPC, y una sección de la matriz de paridad que corresponde a los bits de paridad. La sección de la matriz de información de la matriz de comprobación (H) está representada por una tabla de valores iniciales de la matriz de comprobación que expresa la posición de un elemento de la sección de la matriz de información para cada una de las 360 filas. Esta tecnología se puede aplicar en casos cuando se realiza la codificación LDPC y la decodificación LDPC.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013023880 | 2013-02-08 | ||
PCT/JP2014/051621 WO2014123015A1 (ja) | 2013-02-08 | 2014-01-27 | データ処理装置、及びデータ処理方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2015009838A true MX2015009838A (es) | 2015-10-14 |
Family
ID=51299612
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2015009838A MX2015009838A (es) | 2013-02-08 | 2014-01-27 | Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. |
Country Status (9)
Country | Link |
---|---|
US (1) | US20150358032A1 (es) |
EP (1) | EP2955853A4 (es) |
JP (1) | JPWO2014123015A1 (es) |
KR (1) | KR102091562B1 (es) |
CN (1) | CN104969478B (es) |
CA (1) | CA2899820C (es) |
MX (1) | MX2015009838A (es) |
RU (1) | RU2654132C2 (es) |
WO (1) | WO2014123015A1 (es) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014167861A1 (ja) * | 2013-04-12 | 2014-10-16 | パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ | 送信方法 |
EP3048736A4 (en) * | 2013-09-20 | 2017-05-24 | Sony Corporation | Data processing device and data processing method |
JP6885030B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
JP6885027B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
JP6885029B2 (ja) | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
JP6885028B2 (ja) * | 2016-11-18 | 2021-06-09 | ソニーグループ株式会社 | 送信装置、及び、送信方法 |
JP6930377B2 (ja) | 2017-10-31 | 2021-09-01 | ソニーグループ株式会社 | 送信装置及び送信方法 |
JP6930375B2 (ja) | 2017-10-31 | 2021-09-01 | ソニーグループ株式会社 | 送信装置及び送信方法 |
JP6930374B2 (ja) * | 2017-10-31 | 2021-09-01 | ソニーグループ株式会社 | 送信装置及び送信方法 |
JP6930376B2 (ja) * | 2017-10-31 | 2021-09-01 | ソニーグループ株式会社 | 送信装置及び送信方法 |
CN110830048B (zh) * | 2019-11-14 | 2021-10-12 | 天津大学 | 基于奇偶校验矩阵分解构造全分集ldpc码的纠错方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4224777B2 (ja) | 2003-05-13 | 2009-02-18 | ソニー株式会社 | 復号方法および復号装置、並びにプログラム |
US7234098B2 (en) * | 2003-10-27 | 2007-06-19 | The Directv Group, Inc. | Method and apparatus for providing reduced memory low density parity check (LDPC) codes |
KR20060016059A (ko) * | 2004-08-16 | 2006-02-21 | 삼성전자주식회사 | 가변 블록 길이를 가지는 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
BRPI0515948A (pt) * | 2004-10-01 | 2008-08-12 | Thomson Licensing | decodificador de verificação de paridade de baixa densidade (ldpc) |
US7953047B2 (en) * | 2005-01-24 | 2011-05-31 | Qualcomm Incorporated | Parser for multiple data streams in a communication system |
CN1976238A (zh) * | 2006-12-21 | 2007-06-06 | 复旦大学 | 基于块填充算法的准循环低密度奇偶校验码的构造方法 |
KR101339120B1 (ko) * | 2007-01-24 | 2013-12-09 | 퀄컴 인코포레이티드 | 가변 크기들의 패킷들의 ldpc 인코딩 및 디코딩 |
ES2398851T3 (es) * | 2007-10-30 | 2013-03-22 | Sony Corporation | Aparato y método de procesamiento de datos |
TWI427937B (zh) * | 2007-11-26 | 2014-02-21 | Sony Corp | Data processing device and data processing method |
NZ585421A (en) * | 2007-11-26 | 2013-03-28 | Sony Corp | An apparatus for encoding using a low-density parity check code |
TWI410055B (zh) * | 2007-11-26 | 2013-09-21 | Sony Corp | Data processing device, data processing method and program product for performing data processing method on computer |
TWI497920B (zh) * | 2007-11-26 | 2015-08-21 | Sony Corp | Data processing device and data processing method |
EP2091156B1 (en) * | 2008-02-18 | 2013-08-28 | Samsung Electronics Co., Ltd. | Apparatus and method for channel encoding and decoding in a communication system using low-density parity-check codes |
US8726137B2 (en) * | 2009-02-02 | 2014-05-13 | Telefonaktiebolaget L M Ericsson (Publ) | Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes |
JP2011176782A (ja) * | 2010-02-26 | 2011-09-08 | Sony Corp | データ処理装置、及びデータ処理方法 |
JP2012147197A (ja) * | 2011-01-11 | 2012-08-02 | Panasonic Corp | 通信装置、通信方法、及び通信プログラム |
CA2900007C (en) * | 2013-02-08 | 2023-01-24 | Sony Corporation | Data processing device and data processing method |
-
2014
- 2014-01-27 MX MX2015009838A patent/MX2015009838A/es not_active Application Discontinuation
- 2014-01-27 CA CA2899820A patent/CA2899820C/en active Active
- 2014-01-27 RU RU2015132106A patent/RU2654132C2/ru active
- 2014-01-27 KR KR1020157020208A patent/KR102091562B1/ko active IP Right Grant
- 2014-01-27 CN CN201480007106.2A patent/CN104969478B/zh active Active
- 2014-01-27 JP JP2014560719A patent/JPWO2014123015A1/ja active Pending
- 2014-01-27 US US14/760,622 patent/US20150358032A1/en not_active Abandoned
- 2014-01-27 WO PCT/JP2014/051621 patent/WO2014123015A1/ja active Application Filing
- 2014-01-27 EP EP14749107.0A patent/EP2955853A4/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
US20150358032A1 (en) | 2015-12-10 |
WO2014123015A1 (ja) | 2014-08-14 |
CA2899820C (en) | 2023-01-24 |
KR20150117651A (ko) | 2015-10-20 |
EP2955853A1 (en) | 2015-12-16 |
KR102091562B1 (ko) | 2020-04-14 |
RU2654132C2 (ru) | 2018-05-16 |
JPWO2014123015A1 (ja) | 2017-02-02 |
CN104969478A (zh) | 2015-10-07 |
CA2899820A1 (en) | 2014-08-14 |
CN104969478B (zh) | 2019-05-07 |
EP2955853A4 (en) | 2016-08-24 |
RU2015132106A (ru) | 2017-02-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
MX2015009839A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2015009838A (es) | Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. | |
MX338477B (es) | Aparato de procesamiento de datos y metodo de procesamiento de datos. | |
MY191686A (en) | Data processing apparatus and data processing method | |
MX2015014230A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2019013109A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2016003220A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2019013223A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2019015119A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2015009939A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2017010997A (es) | Dispositivo de perforacion de paridad para la codificacion de informacion de señalizacion de longitud fija y metodo de perforacion de paridad que lo utiliza. | |
MX2017010999A (es) | Dispositivo de perforacion de paridad para la codificacion de informacion de señalizacion de longitud variable y metodo de perforacion de paridad que lo utiliza. | |
PH12020550521A1 (en) | Transmission device, transmission method, reception device, and reception method | |
MX350601B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 64800 y un índice de código de 4/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX2017010995A (es) | Aparato de intercalado de paridad para codificar informacion de señalizacion con longitud fija, y metodo de intercalado de paridad que utiliza el mismo. | |
MX2016003228A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2020004875A (es) | Aparato de intercalado de paridad para codificar informacion de se?alizacion con longitud fija, y metodo de intercalado de paridad que utiliza el mismo. | |
MX350602B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 64800 y un índice de código de 7/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX2016003484A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX2016003222A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
MX350599B (es) | Codificador de revisión de paridad de baja densidad y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX350600B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 64800 y un índice de código de 2/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX350608B (es) | Codificador de revisión de paridad de baja densidad que tiene una longitud de 16200 y un índice de código de 5/15 y método de codificación de revisión de paridad de baja densidad que utiliza el mismo. | |
MX2014012113A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 3/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. | |
MX2014012117A (es) | Codificador de revision de paridad de baja densidad que tiene una longitud de 64800 y un indice de codigo de 3/15 y metodo de codificacion de revision de paridad de baja densidad que utiliza el mismo. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FA | Abandonment or withdrawal |