BRPI0515948A - decodificador de verificação de paridade de baixa densidade (ldpc) - Google Patents
decodificador de verificação de paridade de baixa densidade (ldpc)Info
- Publication number
- BRPI0515948A BRPI0515948A BRPI0515948-2A BRPI0515948A BRPI0515948A BR PI0515948 A BRPI0515948 A BR PI0515948A BR PI0515948 A BRPI0515948 A BR PI0515948A BR PI0515948 A BRPI0515948 A BR PI0515948A
- Authority
- BR
- Brazil
- Prior art keywords
- ldpc
- groups
- ldpc decoder
- low density
- density parity
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
" DECODIFICADOR DE VERIFICAçãO DE PARIDADE DE BAIXA DENSIDADE ( LDPC) " um receptor de satélite compreende um primeiro plano, um demodulador e um decodificador de LDPC. O primeiro plano recebe um sinal codificado de LDPC DVB-S2 e provê um sinal convertido descendentemente para o demodulador. o último demodula o sinal convertido descendentemente e provê um sinal demodulado para o decodificador de LDPC. o decodificador de LDPC tem uma arquitetura parcialmente paralela e divide as mensagens do nó de bit em N/360 grupos e as mensagens do nó de verificação em q grupos, onde q= m/360. Cada grupo é processado por 360 processadores de nó de bit ou 360 processadores de nó verificação, respectivamente.De maneira ilustrativa, o decodificador de LDPC, inclui uma memória que é dividida tal que as mensagens associadas com os grupos de nó de bit são consecutivamente endereçadas. Alternativamente, o decodificador de LDPC inclui uma memória que é dividida tal que as mensagens associadas com os grupos do nó de verificação são consecutivamente endereçadas.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US61541804P | 2004-10-01 | 2004-10-01 | |
PCT/US2005/033342 WO2006055086A1 (en) | 2004-10-01 | 2005-09-19 | A low density parity check (ldpc) decoder |
Publications (1)
Publication Number | Publication Date |
---|---|
BRPI0515948A true BRPI0515948A (pt) | 2008-08-12 |
Family
ID=35414744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BRPI0515948-2A BRPI0515948A (pt) | 2004-10-01 | 2005-09-19 | decodificador de verificação de paridade de baixa densidade (ldpc) |
Country Status (7)
Country | Link |
---|---|
US (1) | US20080104474A1 (pt) |
EP (1) | EP1800408A1 (pt) |
JP (1) | JP2008515342A (pt) |
KR (1) | KR20070062534A (pt) |
CN (1) | CN101032084B (pt) |
BR (1) | BRPI0515948A (pt) |
WO (1) | WO2006055086A1 (pt) |
Families Citing this family (55)
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CN101322319B (zh) * | 2005-12-01 | 2012-11-28 | 汤姆逊许可公司 | 用于对低密度奇偶校验编码信号解码的设备和方法 |
JP4807063B2 (ja) * | 2005-12-20 | 2011-11-02 | ソニー株式会社 | 復号装置、制御方法、およびプログラム |
KR101154995B1 (ko) * | 2006-07-14 | 2012-06-15 | 엘지전자 주식회사 | Ldpc 부호화를 수행하는 방법 |
US7895500B2 (en) * | 2006-07-28 | 2011-02-22 | Via Telecom Co., Ltd. | Systems and methods for reduced complexity LDPC decoding |
JP4283829B2 (ja) * | 2006-08-17 | 2009-06-24 | 株式会社モバイルテクノ | 低密度パリティチェック符号復号装置 |
WO2008034289A1 (en) * | 2006-09-18 | 2008-03-27 | Juntan Zhang | Bit mapping scheme for an ldpc coded 32apsk system |
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JP4985386B2 (ja) * | 2007-12-25 | 2012-07-25 | 住友電気工業株式会社 | 受信装置 |
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CN101946414B (zh) * | 2008-02-18 | 2013-08-14 | 三星电子株式会社 | 用于编码和解码使用低密度奇偶校验检查码的通信系统中的信道的设备和方法 |
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JP5307137B2 (ja) * | 2008-07-04 | 2013-10-02 | 三菱電機株式会社 | 検査行列生成装置、検査行列生成方法、検査行列生成プログラム、送信装置、受信装置及び通信システム |
US8219873B1 (en) | 2008-10-20 | 2012-07-10 | Link—A—Media Devices Corporation | LDPC selective decoding scheduling using a cost function |
KR101596850B1 (ko) * | 2009-01-23 | 2016-02-23 | 엘지전자 주식회사 | 신호 송수신 장치 및 방법 |
KR101634188B1 (ko) | 2009-02-12 | 2016-06-28 | 엘지전자 주식회사 | 신호 송수신 장치 및 방법 |
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EP2282470A1 (en) * | 2009-08-07 | 2011-02-09 | Thomson Licensing | Data reception using low density parity check coding and constellation mapping |
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CN102594365B (zh) * | 2012-02-29 | 2015-02-18 | 中山大学 | 一种ldpc码的动态异步bp译码方法 |
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CN104124980B (zh) * | 2014-07-16 | 2018-04-20 | 上海交通大学 | 适合连续变量量子密钥分发的高速秘密协商方法 |
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KR102287627B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287620B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287625B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287623B1 (ko) * | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
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JP4225163B2 (ja) * | 2003-05-13 | 2009-02-18 | ソニー株式会社 | 復号装置および復号方法、並びにプログラム |
KR100809619B1 (ko) * | 2003-08-26 | 2008-03-05 | 삼성전자주식회사 | 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법 |
US7260763B2 (en) * | 2004-03-11 | 2007-08-21 | Nortel Networks Limited | Algebraic low-density parity check code design for variable block sizes and code rates |
US7281192B2 (en) * | 2004-04-05 | 2007-10-09 | Broadcom Corporation | LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing |
US7165205B2 (en) * | 2004-05-14 | 2007-01-16 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
US7143333B2 (en) * | 2004-08-09 | 2006-11-28 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
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2005
- 2005-09-19 BR BRPI0515948-2A patent/BRPI0515948A/pt not_active IP Right Cessation
- 2005-09-19 KR KR1020077007394A patent/KR20070062534A/ko not_active Application Discontinuation
- 2005-09-19 CN CN2005800328231A patent/CN101032084B/zh not_active Expired - Fee Related
- 2005-09-19 EP EP05798137A patent/EP1800408A1/en not_active Ceased
- 2005-09-19 US US11/662,565 patent/US20080104474A1/en not_active Abandoned
- 2005-09-19 JP JP2007534638A patent/JP2008515342A/ja not_active Withdrawn
- 2005-09-19 WO PCT/US2005/033342 patent/WO2006055086A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
JP2008515342A (ja) | 2008-05-08 |
CN101032084A (zh) | 2007-09-05 |
CN101032084B (zh) | 2010-05-05 |
KR20070062534A (ko) | 2007-06-15 |
WO2006055086A1 (en) | 2006-05-26 |
EP1800408A1 (en) | 2007-06-27 |
US20080104474A1 (en) | 2008-05-01 |
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