KR980005622A

KR980005622A - Method of forming a contact hole in a semiconductor device

Info

Publication number: KR980005622A
Application number: KR1019960025787A
Authority: KR
Inventors: 김근태; 김진웅
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1996-06-29
Filing date: 1996-06-29
Publication date: 1998-03-30

Abstract

본 발명은 반도체 소자의 콘택홀 형성방법에 관한 것으로, 반도체 기판 상부에 게이트전극을 형성하고 상기 반도체 기판의 전체 표면 상부에 완충막을 형성한 다음, 상기 완충막 상부에 식각 장벽층을 형성하되, 콘택홀이 형성될 부분을 두껍게 형성하고 상기 반도체 기판의 전체 표면 상부를 평탄화시키는 하부절연층을 형성한 다음, 상기 하부절연층을 식각하되, 콘택마스크를 이용하여 상기 식각장벽층이 노출되도록 식각하고 상기 노출된 식각장벽층을 습식방법으로 식각한 다음, 상기 반도체 기판의 전체 표면 상부에 절연막을 소정두께 형성하고 상기 절연막을 이방성 식각하되, 과도식각하여 상기 완충막을 제거함으로써 상기 하부절연층과 식각장벽층 측벽에 절연막 스페이서를 형성하는 동시에 자기정렬적인 콘택홀을 형성하되, 식각장벽층인 질화막을 두껍게 형성하여 상기 질화막과 하부절연층의 식각선택비 차이를 확보하고 자기정렬 방법으로 콘택홀을 형성함으로써 반도체 소자의 특성 및 신뢰성을 향상 시키고 그에 따른 반도체 소자의 고집적화를 가능하게 하는 잇점이 있다.A method for forming a contact hole in a semiconductor device includes forming a gate electrode on a semiconductor substrate, forming a buffer layer on the entire surface of the semiconductor substrate, and forming an etch barrier layer on the buffer layer, Forming a lower insulation layer on the upper surface of the semiconductor substrate, the upper insulation layer being formed to be thicker on a portion of the semiconductor substrate where the holes are to be formed, etching the lower insulation layer to expose the etching barrier layer using a contact mask, Etching the exposed etch barrier layer by a wet process, forming an insulating layer on the entire surface of the semiconductor substrate to a predetermined thickness, and anisotropically etching the insulating layer, wherein the buffer layer is removed by overetching to remove the buffer layer, Forming an insulating film spacer on the sidewall and forming a self-aligned contact hole, There is an advantage in that the nitride film is formed thick to secure the difference in etch selectivity between the nitride film and the lower insulating layer and the contact hole is formed by the self-aligning method, thereby improving the characteristics and reliability of the semiconductor device, .

Description

Method of forming a contact hole in a semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제1a도 내지 1e도는 본 발명의 실시예에 의한 반도체 소자의 콘택홀 형성방법을 도시한 단면도.FIGS. 1A to 1E are cross-sectional views illustrating a method of forming a contact hole in a semiconductor device according to an embodiment of the present invention; FIGS.

Claims

A step of forming a gate electrode on the semiconductor substrate, a step of forming a buffer film on the entire surface of the semiconductor substrate, a step of forming an etching barrier layer on the buffer film, Forming a lower insulating layer for planarizing an entire surface of the semiconductor substrate; etching the lower insulating layer to expose the etching barrier layer using a contact mask; Etching the barrier layer by a wet method; forming a predetermined thickness of the insulating film on the entire surface of the semiconductor substrate; and etching the insulating film by excessive etching to remove the buffer film, thereby forming the lower insulating layer and the etching barrier layer Comprising the steps of forming an insulating film spacer on a sidewall and forming a self-aligned contact hole How it's forming contact holes.

The method according to claim 1, wherein the buffer film is formed of an oxide film.

The method of claim 1, wherein the etching barrier layer is formed of a nitride film.

The method according to claim 1, wherein the insulating film is formed of an oxide film.

The method of claim 1, wherein the wet process is performed using a phosphoric acid solution.

※ Note: It is disclosed by the contents of the first application.