KR970067896A - Method for manufacturing flash memory device - Google Patents

Method for manufacturing flash memory device Download PDF

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Publication number
KR970067896A
KR970067896A KR1019960007113A KR19960007113A KR970067896A KR 970067896 A KR970067896 A KR 970067896A KR 1019960007113 A KR1019960007113 A KR 1019960007113A KR 19960007113 A KR19960007113 A KR 19960007113A KR 970067896 A KR970067896 A KR 970067896A
Authority
KR
South Korea
Prior art keywords
forming
film
insulating film
flash memory
memory device
Prior art date
Application number
KR1019960007113A
Other languages
Korean (ko)
Inventor
장윤수
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960007113A priority Critical patent/KR970067896A/en
Publication of KR970067896A publication Critical patent/KR970067896A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 플래쉬 메모리 소자의 제조방법을 제공하는 것으로 게이트전극의 일측면에 절연막 스페이서를 형성하여 산화공정시 제1 및 제2 폴리실리콘층의 측면산화를 방지함으로써 게이트전극의 채널 길이가 짧아지는 것을 방지할 수 있을 뿐 아니라 절연막 스페이서의 두께를 조절함으로써 프로그램 특성을 최적화 할 수 있는 효과가 있다.The present invention provides a method of manufacturing a flash memory device in which an insulating film spacer is formed on one side of a gate electrode to prevent lateral oxidation of the first and second polysilicon layers during an oxidation process, It is possible to optimize the program characteristic by adjusting the thickness of the insulating film spacer.

Description

플래쉬 메모리 소자의 제조방법Method for manufacturing flash memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제3A 내지 3F도는 본 발명에 따른 플래쉬 메모리 소자의 제조방법을 설명하기 위한 소자의 단면도.3A to 3F are sectional views of a device for explaining a method of manufacturing a flash memory device according to the present invention.

Claims (2)

플래쉬 메모리 소자의 제조방법에 있어서 실리콘기판상에 제1 폴리실리콘층, 유전체막 및 제2 폴리실리콘층으로 이루는 적층형 게이트전극을 형성하는 단계와 상기 단계로부터 상기 실리콘기판내에 접합영역을 형성한 후 전체구조 상부에 제1 절연막 및 BPSG막을 순차적으로 형성하는 단계와 상기 단계로부터 상기 게이트 전극간에 형성된 상기 BPSG막 및 제1 절연막을 순차적으로 식각하여 콘택홀을 형성하는 단계와 상기 단계로부터 상기 콘택홀 및 BPSG막상에 제2 절연막을 형성하는 단계와 상기 단계로부터 상기 제2 절연막을 식각하여 상기 게이트 전극의 일측면에 절연막 스페이서를 형성하는 단계와 상기 단계로부터 상기 콘택홀내부를 산화시켜 노출된 상기 실리콘기판 및 제2 폴리실리콘층상에 산화막을 형성시키는 단계와 상기 단계로부터 상기 BPSG막 및 산화막상에 제3 폴리실리콘층을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 제조방법.A method of manufacturing a flash memory device, comprising: forming a laminated gate electrode composed of a first polysilicon layer, a dielectric film, and a second polysilicon layer on a silicon substrate; and forming a junction region in the silicon substrate from the step Forming a contact hole by sequentially etching the BPSG film and the first insulating film formed between the gate electrodes from the step of forming the first insulating film and the BPSG film on the structure, Forming a second insulating film on the film and etching the second insulating film to form an insulating film spacer on one side surface of the gate electrode, and oxidizing the inside of the contact hole to expose the exposed silicon substrate, Forming an oxide film on the second polysilicon layer; And forming a third polysilicon layer on the SG film and the oxide film. 제1항에 있어서 상기 제2 절연막은 나이트라이드로 이루어지는 것을 특징으로 하는 반도체 소자의 제조방법.The method for manufacturing a semiconductor device according to claim 1, wherein the second insulating film is made of nitride.
KR1019960007113A 1996-03-16 1996-03-16 Method for manufacturing flash memory device KR970067896A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960007113A KR970067896A (en) 1996-03-16 1996-03-16 Method for manufacturing flash memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960007113A KR970067896A (en) 1996-03-16 1996-03-16 Method for manufacturing flash memory device

Publications (1)

Publication Number Publication Date
KR970067896A true KR970067896A (en) 1997-10-13

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ID=66216210

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960007113A KR970067896A (en) 1996-03-16 1996-03-16 Method for manufacturing flash memory device

Country Status (1)

Country Link
KR (1) KR970067896A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390917B1 (en) * 2001-06-29 2003-07-12 주식회사 하이닉스반도체 Method for fabricating flash memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390917B1 (en) * 2001-06-29 2003-07-12 주식회사 하이닉스반도체 Method for fabricating flash memory device

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