KR970703048A - 자기 증폭 다이나믹 mos 트랜지스터 메모리 셀을 포함하는 장치 제조 방법(gain cell dram structure and process for producing the same) - Google Patents
자기 증폭 다이나믹 mos 트랜지스터 메모리 셀을 포함하는 장치 제조 방법(gain cell dram structure and process for producing the same)Info
- Publication number
- KR970703048A KR970703048A KR1019960706266A KR19960706266A KR970703048A KR 970703048 A KR970703048 A KR 970703048A KR 1019960706266 A KR1019960706266 A KR 1019960706266A KR 19960706266 A KR19960706266 A KR 19960706266A KR 970703048 A KR970703048 A KR 970703048A
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- pct
- memory
- date nov
- memory transistor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEP4417150.1 | 1994-05-17 | ||
| DE4417150A DE4417150C2 (de) | 1994-05-17 | 1994-05-17 | Verfahren zur Herstellung einer Anordnung mit selbstverstärkenden dynamischen MOS-Transistorspeicherzellen |
| PCT/EP1995/001656 WO1995031828A1 (de) | 1994-05-17 | 1995-05-02 | Gain cell dram struktur und verfahren zur herstellung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR970703048A true KR970703048A (ko) | 1997-06-10 |
| KR100338462B1 KR100338462B1 (ko) | 2002-11-22 |
Family
ID=6518220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960706266A KR100338462B1 (ko) | 1994-05-17 | 1995-05-02 | 자기증폭다이나믹mos트랜지스터메모리셀을포함하는장치제조방법 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5710072A (ko) |
| EP (1) | EP0760166B1 (ko) |
| JP (1) | JP3744938B2 (ko) |
| KR (1) | KR100338462B1 (ko) |
| AT (1) | ATE165188T1 (ko) |
| DE (2) | DE4417150C2 (ko) |
| TW (1) | TW295724B (ko) |
| WO (1) | WO1995031828A1 (ko) |
Families Citing this family (54)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE59608588D1 (de) * | 1995-09-26 | 2002-02-21 | Infineon Technologies Ag | Selbstverstärkende DRAM-Speicherzellenanordnung |
| US6004835A (en) * | 1997-04-25 | 1999-12-21 | Micron Technology, Inc. | Method of forming integrated circuitry, conductive lines, a conductive grid, a conductive network, an electrical interconnection to anode location and an electrical interconnection with a transistor source/drain region |
| DE19723936A1 (de) * | 1997-06-06 | 1998-12-10 | Siemens Ag | DRAM-Zellenanordnung und Verfahren zu deren Herstellung |
| US6110799A (en) * | 1997-06-30 | 2000-08-29 | Intersil Corporation | Trench contact process |
| US6037628A (en) | 1997-06-30 | 2000-03-14 | Intersil Corporation | Semiconductor structures with trench contacts |
| DE19800340A1 (de) * | 1998-01-07 | 1999-07-15 | Siemens Ag | Halbleiterspeicheranordnung und Verfahren zu deren Herstellung |
| TW406419B (en) * | 1998-01-15 | 2000-09-21 | Siemens Ag | Memory-cells arrangement and its production method |
| TW442837B (en) * | 1998-12-03 | 2001-06-23 | Infineon Technologies Ag | Integrated circuit-arrangement and its production method |
| JP3955409B2 (ja) | 1999-03-17 | 2007-08-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US20030060013A1 (en) * | 1999-09-24 | 2003-03-27 | Bruce D. Marchant | Method of manufacturing trench field effect transistors with trenched heavy body |
| US6461918B1 (en) * | 1999-12-20 | 2002-10-08 | Fairchild Semiconductor Corporation | Power MOS device with improved gate charge performance |
| US6696726B1 (en) * | 2000-08-16 | 2004-02-24 | Fairchild Semiconductor Corporation | Vertical MOSFET with ultra-low resistance and low gate charge |
| US7745289B2 (en) | 2000-08-16 | 2010-06-29 | Fairchild Semiconductor Corporation | Method of forming a FET having ultra-low on-resistance and low gate charge |
| US6903411B1 (en) * | 2000-08-25 | 2005-06-07 | Agere Systems Inc. | Architecture for circuit connection of a vertical transistor |
| US7345342B2 (en) * | 2001-01-30 | 2008-03-18 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
| US6710403B2 (en) * | 2002-07-30 | 2004-03-23 | Fairchild Semiconductor Corporation | Dual trench power MOSFET |
| US6818513B2 (en) * | 2001-01-30 | 2004-11-16 | Fairchild Semiconductor Corporation | Method of forming a field effect transistor having a lateral depletion structure |
| US6803626B2 (en) | 2002-07-18 | 2004-10-12 | Fairchild Semiconductor Corporation | Vertical charge control semiconductor device |
| US6916745B2 (en) * | 2003-05-20 | 2005-07-12 | Fairchild Semiconductor Corporation | Structure and method for forming a trench MOSFET having self-aligned features |
| US7132712B2 (en) | 2002-11-05 | 2006-11-07 | Fairchild Semiconductor Corporation | Trench structure having one or more diodes embedded therein adjacent a PN junction |
| FI120310B (fi) * | 2001-02-13 | 2009-09-15 | Valtion Teknillinen | Parannettu menetelmä erittyvien proteiinien tuottamiseksi sienissä |
| US6576506B2 (en) * | 2001-06-29 | 2003-06-10 | Agere Systems Inc. | Electrostatic discharge protection in double diffused MOS transistors |
| US7061066B2 (en) * | 2001-10-17 | 2006-06-13 | Fairchild Semiconductor Corporation | Schottky diode using charge balance structure |
| KR100859701B1 (ko) * | 2002-02-23 | 2008-09-23 | 페어차일드코리아반도체 주식회사 | 고전압 수평형 디모스 트랜지스터 및 그 제조 방법 |
| AU2002258715A1 (en) * | 2002-04-04 | 2003-10-20 | Illusion Technologies, Llc | Miniature/micro scale power generation system |
| US6621129B1 (en) * | 2002-05-24 | 2003-09-16 | Macronix International Co., Ltd. | MROM memory cell structure for storing multi level bit information |
| JP3594140B2 (ja) * | 2002-06-26 | 2004-11-24 | 沖電気工業株式会社 | 半導体装置の製造方法 |
| TWI320571B (en) * | 2002-09-12 | 2010-02-11 | Qs Semiconductor Australia Pty Ltd | Dynamic nonvolatile random access memory ne transistor cell and random access memory array |
| US7033891B2 (en) * | 2002-10-03 | 2006-04-25 | Fairchild Semiconductor Corporation | Trench gate laterally diffused MOSFET devices and methods for making such devices |
| US7576388B1 (en) * | 2002-10-03 | 2009-08-18 | Fairchild Semiconductor Corporation | Trench-gate LDMOS structures |
| US6710418B1 (en) | 2002-10-11 | 2004-03-23 | Fairchild Semiconductor Corporation | Schottky rectifier with insulation-filled trenches and method of forming the same |
| US7652326B2 (en) * | 2003-05-20 | 2010-01-26 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
| KR100994719B1 (ko) * | 2003-11-28 | 2010-11-16 | 페어차일드코리아반도체 주식회사 | 슈퍼정션 반도체장치 |
| US7368777B2 (en) * | 2003-12-30 | 2008-05-06 | Fairchild Semiconductor Corporation | Accumulation device with charge balance structure and method of forming the same |
| US20050199918A1 (en) * | 2004-03-15 | 2005-09-15 | Daniel Calafut | Optimized trench power MOSFET with integrated schottky diode |
| US7352036B2 (en) * | 2004-08-03 | 2008-04-01 | Fairchild Semiconductor Corporation | Semiconductor power device having a top-side drain using a sinker trench |
| US7265415B2 (en) * | 2004-10-08 | 2007-09-04 | Fairchild Semiconductor Corporation | MOS-gated transistor with reduced miller capacitance |
| JP2008536316A (ja) * | 2005-04-06 | 2008-09-04 | フェアチャイルド・セミコンダクター・コーポレーション | トレンチゲート電界効果トランジスタおよびその形成方法 |
| US7385248B2 (en) * | 2005-08-09 | 2008-06-10 | Fairchild Semiconductor Corporation | Shielded gate field effect transistor with improved inter-poly dielectric |
| US7244985B2 (en) * | 2005-09-06 | 2007-07-17 | Ememory Technology Inc. | Non-volatile memory array |
| TWI266389B (en) * | 2005-11-11 | 2006-11-11 | Powerchip Semiconductor Corp | Non-volatile memory and manufacturing method and operating method thereof |
| US7446374B2 (en) | 2006-03-24 | 2008-11-04 | Fairchild Semiconductor Corporation | High density trench FET with integrated Schottky diode and method of manufacture |
| US7319256B1 (en) | 2006-06-19 | 2008-01-15 | Fairchild Semiconductor Corporation | Shielded gate trench FET with the shield and gate electrodes being connected together |
| EP2208229A4 (en) | 2007-09-21 | 2011-03-16 | Fairchild Semiconductor | SUPER TRANSITION STRUCTURES FOR PERFORMANCE ARRANGEMENTS AND MANUFACTURING PROCESSES |
| US7772668B2 (en) * | 2007-12-26 | 2010-08-10 | Fairchild Semiconductor Corporation | Shielded gate trench FET with multiple channels |
| US20120273916A1 (en) | 2011-04-27 | 2012-11-01 | Yedinak Joseph A | Superjunction Structures for Power Devices and Methods of Manufacture |
| US20100090263A1 (en) * | 2008-10-10 | 2010-04-15 | Qimonda Ag | Memory devices including semiconductor pillars |
| US8174067B2 (en) | 2008-12-08 | 2012-05-08 | Fairchild Semiconductor Corporation | Trench-based power semiconductor devices with increased breakdown voltage characteristics |
| US8432000B2 (en) | 2010-06-18 | 2013-04-30 | Fairchild Semiconductor Corporation | Trench MOS barrier schottky rectifier with a planar surface using CMP techniques |
| US8487371B2 (en) | 2011-03-29 | 2013-07-16 | Fairchild Semiconductor Corporation | Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same |
| US8786010B2 (en) | 2011-04-27 | 2014-07-22 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
| US8772868B2 (en) | 2011-04-27 | 2014-07-08 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
| US8673700B2 (en) | 2011-04-27 | 2014-03-18 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
| US8836028B2 (en) | 2011-04-27 | 2014-09-16 | Fairchild Semiconductor Corporation | Superjunction structures for power devices and methods of manufacture |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3380377D1 (en) * | 1982-06-24 | 1989-09-14 | Harris Semiconductor Patents | Vertical igfet device and method for fabricating same |
| JPS60128654A (ja) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | 半導体集積回路 |
| US4788158A (en) * | 1985-09-25 | 1988-11-29 | Texas Instruments Incorporated | Method of making vertical inverter |
| US5164325A (en) * | 1987-10-08 | 1992-11-17 | Siliconix Incorporated | Method of making a vertical current flow field effect transistor |
| US4999811A (en) * | 1987-11-30 | 1991-03-12 | Texas Instruments Incorporated | Trench DRAM cell with dynamic gain |
| JPH01307256A (ja) * | 1988-06-06 | 1989-12-12 | Hitachi Ltd | 半導体記憶装置 |
| JPH0244763A (ja) * | 1988-08-05 | 1990-02-14 | Oki Electric Ind Co Ltd | 半導体記憶装置およびその製造方法 |
| US4989055A (en) * | 1989-06-15 | 1991-01-29 | Texas Instruments Incorporated | Dynamic random access memory cell |
| TW199237B (ko) * | 1990-07-03 | 1993-02-01 | Siemens Ag | |
| KR920022532A (ko) * | 1991-05-13 | 1992-12-19 | 문정환 | 이중 수직 채널을 갖는 스태틱램 및 그 제조방법 |
| DE4340967C1 (de) * | 1993-12-01 | 1994-10-27 | Siemens Ag | Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor |
-
1994
- 1994-05-17 DE DE4417150A patent/DE4417150C2/de not_active Expired - Fee Related
-
1995
- 1995-03-02 TW TW084101963A patent/TW295724B/zh not_active IP Right Cessation
- 1995-05-02 WO PCT/EP1995/001656 patent/WO1995031828A1/de active IP Right Grant
- 1995-05-02 US US08/737,236 patent/US5710072A/en not_active Expired - Lifetime
- 1995-05-02 DE DE59501925T patent/DE59501925D1/de not_active Expired - Lifetime
- 1995-05-02 KR KR1019960706266A patent/KR100338462B1/ko not_active IP Right Cessation
- 1995-05-02 AT AT95919372T patent/ATE165188T1/de active
- 1995-05-02 EP EP95919372A patent/EP0760166B1/de not_active Expired - Lifetime
- 1995-05-02 JP JP52931595A patent/JP3744938B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE59501925D1 (de) | 1998-05-20 |
| DE4417150C2 (de) | 1996-03-14 |
| ATE165188T1 (de) | 1998-05-15 |
| US5710072A (en) | 1998-01-20 |
| DE4417150A1 (de) | 1995-11-23 |
| EP0760166A1 (de) | 1997-03-05 |
| TW295724B (ko) | 1997-01-11 |
| WO1995031828A1 (de) | 1995-11-23 |
| JP3744938B2 (ja) | 2006-02-15 |
| JPH10500253A (ja) | 1998-01-06 |
| KR100338462B1 (ko) | 2002-11-22 |
| EP0760166B1 (de) | 1998-04-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20120504 Year of fee payment: 11 |
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| LAPS | Lapse due to unpaid annual fee |