KR970077084A - 저비용의 볼 그리드 어레이 장치 및 그 제조 방법 - Google Patents
저비용의 볼 그리드 어레이 장치 및 그 제조 방법 Download PDFInfo
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- KR970077084A KR970077084A KR1019970018939A KR19970018939A KR970077084A KR 970077084 A KR970077084 A KR 970077084A KR 1019970018939 A KR1019970018939 A KR 1019970018939A KR 19970018939 A KR19970018939 A KR 19970018939A KR 970077084 A KR970077084 A KR 970077084A
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- substrate
- panel
- grid array
- ball grid
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- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 claims 5
- 239000004020 conductor Substances 0.000 claims 3
- 229910000679 solder Inorganic materials 0.000 claims 3
- 238000002844 melting Methods 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 abstract 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 abstract 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 abstract 1
- 239000000919 ceramic Substances 0.000 abstract 1
- 229920003192 poly(bis maleimide) Polymers 0.000 abstract 1
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Abstract
예를 들어, 비스말레이미드 트리아진(BT) 또는 세라믹(Al2O3)의 판넬은 최종 결과의 볼 그리드 어레이(BGA)에 의해 실질적으로 충전되고 차지되는 크기로 선택된다. 최종 결과의 장치는 초기 판넬의 거의 전체영역으로 배치되고 그 전체 영역을 차지한다. 장치를 용이하게 단일화 하기 위하여 판넬의 적절한 위치에 구조적 약한 부분을 설치한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 상부에 BGA 장치가 형성된 본 발명의 바람직한 실시예의 기판 판넬의 평면도.
Claims (6)
- 복수의 기판을 포함하는 패널로서, 기판을 실질적으로 판넬의 전체 영역을 정의하는 판넬과, 각각의 패널과 결합된 복수의 도전성 볼을 구비하는 것을 특징으로 하는 볼 그리드 어레이 구조.
- 제1항에 있어서, 패널은 각각의 기판을 용이하게 분리할 수 있도록 구조적으로 약한 부분을 복수개 갖는 것을 특징으로 하는 볼 그리드 어레이 구조.
- 제1항에 있어서, 각각 기판에 결합된 복수의 반도체 장치를 더 구비하는 것을 특징으로 하는 볼 그리드 어레이 구조.
- 복수의 기판을 정의하는 패널을 설치하는 단계로서, 상기 기판은 실질적으로 패널의 전체 영역을 정의하는 단계, 각각의 기판과 결합된 복수의 도전성 볼을 설치하는 단계, 각각의 기판과 결합된 반도체 장치를 설치하는 단계, 각각의 반도체 장치를 밀봉하는 단계, 각각의 기판이 그 결합된 도전성 볼, 반도체 장치 및 밀봉부와 함께 볼 그리드 어레이 장치를 정의하는 단계, 및 각각의 볼 그리드 어레이 장치를 서로 분리하는 단계를 구비하는 것을 특징으로 하는 볼 그리드 어레이 구조를 제조하는 방법.
- 통로를 정의하는 기판, 상기 통로상에 적어도 부분적으로 연장하는 기판의 한 측면상의 도체, 도체에 접촉하는 상기 통로내의 도전성 소자, 및 도전성 소자와 접촉하고 기판의 반대측면을 초과하여 연장하는 도전성 범프를 구비하는 것을 특징으로 하는 볼 그리드 어레이 구조.
- 통로의 한단부에 인접한 기판상에 땜납 본체를 설치하는 단계, 및 땜납 본체를 용융하는 단계로서, 통로는 모세관 작용을 제공하도록 충분히 작아 용융된 땜납이 통로로 흡입되는 단계를 구비하는 것을 특징으로 하는 기판에 의해 정의된 통로내에 도체를 설치하는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US8/649,395 | 1996-05-17 | ||
US08/649,395 US5783866A (en) | 1996-05-17 | 1996-05-17 | Low cost ball grid array device and method of manufacture thereof |
US08/649,395 | 1996-05-17 |
Publications (2)
Publication Number | Publication Date |
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KR970077084A true KR970077084A (ko) | 1997-12-12 |
KR100271047B1 KR100271047B1 (ko) | 2000-12-01 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970018939A KR100271047B1 (ko) | 1996-05-17 | 1997-05-16 | 저비용의 볼 그리드 어레이 장치 및 그 제조 방법 |
Country Status (2)
Country | Link |
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US (2) | US5783866A (ko) |
KR (1) | KR100271047B1 (ko) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6013948A (en) * | 1995-11-27 | 2000-01-11 | Micron Technology, Inc. | Stackable chip scale semiconductor package with mating contacts on opposed surfaces |
US6861290B1 (en) | 1995-12-19 | 2005-03-01 | Micron Technology, Inc. | Flip-chip adaptor package for bare die |
TW382736B (en) * | 1996-04-18 | 2000-02-21 | Eastern Kk | Circuit board for a semiconductor device and method of making the same |
US6962829B2 (en) * | 1996-10-31 | 2005-11-08 | Amkor Technology, Inc. | Method of making near chip size integrated circuit package |
JP3173410B2 (ja) * | 1997-03-14 | 2001-06-04 | 松下電器産業株式会社 | パッケージ基板およびその製造方法 |
JPH1154658A (ja) * | 1997-07-30 | 1999-02-26 | Hitachi Ltd | 半導体装置及びその製造方法並びにフレーム構造体 |
USRE43112E1 (en) | 1998-05-04 | 2012-01-17 | Round Rock Research, Llc | Stackable ball grid array package |
WO2000007234A1 (en) * | 1998-07-28 | 2000-02-10 | Hitachi Chemical Company, Ltd. | Semiconductor device and method for manufacturing the same |
JP4073098B2 (ja) * | 1998-11-18 | 2008-04-09 | 三洋電機株式会社 | 半導体装置の製造方法 |
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-
1996
- 1996-05-17 US US08/649,395 patent/US5783866A/en not_active Expired - Lifetime
-
1997
- 1997-05-16 KR KR1019970018939A patent/KR100271047B1/ko not_active IP Right Cessation
-
1998
- 1998-02-20 US US09/026,781 patent/US6054338A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100271047B1 (ko) | 2000-12-01 |
US6054338A (en) | 2000-04-25 |
US5783866A (en) | 1998-07-21 |
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