KR970054403A - 자가정렬형 티(t)형 게이트 제조방법 - Google Patents

자가정렬형 티(t)형 게이트 제조방법 Download PDF

Info

Publication number
KR970054403A
KR970054403A KR1019950069310A KR19950069310A KR970054403A KR 970054403 A KR970054403 A KR 970054403A KR 1019950069310 A KR1019950069310 A KR 1019950069310A KR 19950069310 A KR19950069310 A KR 19950069310A KR 970054403 A KR970054403 A KR 970054403A
Authority
KR
South Korea
Prior art keywords
metal layer
gate
metal
layer
forming
Prior art date
Application number
KR1019950069310A
Other languages
English (en)
Other versions
KR0179116B1 (ko
Inventor
조준환
Original Assignee
구자홍
Lg 전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 구자홍, Lg 전자 주식회사 filed Critical 구자홍
Priority to KR1019950069310A priority Critical patent/KR0179116B1/ko
Priority to US08/781,900 priority patent/US5773333A/en
Publication of KR970054403A publication Critical patent/KR970054403A/ko
Application granted granted Critical
Publication of KR0179116B1 publication Critical patent/KR0179116B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28581—Deposition of Schottky electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H01L21/28593—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T asymmetrical sectional shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8128—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate with recessed gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

본 발명은 자가정렬형 T형 게이트 제조방법에 관한 것으로, 오믹전극과 게이트 전극을 통해서 패터닝하여 재현성이 우수하고 공정을 단순화하는데 적당한 자가정렬형 T형 게이트 제조방법을 제공하기 위한 것이다.
이를 위해 본 발명의 자가정렬형 T형 게이트 제조방법은 기판상에 절연막, 제1금속층, 제1감광막을 차례로 형성한 후 상기 제1감광막을 패터닝하는 제1단계, 상기 제1감광막 패턴 하부에서 메사(Mesa)형태로 언더컷되도록 상기 제1금속층을 선택적으로 제거하여 게이트 패턴을 형성하고, 상기 절연막을 상기 제1금속층과 동일 형태로 제1금속층 하부에서 언더컷되도록 선택적으로 제거하여 오믹전극 영역을 패터닝하는 제2단계, 상기 오믹전극 영역에 제2금속을 증착하여 오믹전극을 형성한 후 상기 제1금속층을 중심으로 좌,우 비대칭되도록 상기 절연막을 선택적으로 제거하는 제3단계, 상기 제1금속층을 포함한 전면에 제2감광막을 도포한 후 상기 제1금속층의 표면에 노출될 때까지 제2감광막을 제거하는 제4단계, 상기 제1금속층을 제거하고 상기 절연막을 선택적으로 제거하여 게이트 전극 영역을 형성하고, 상기 게이트 전극 영역에 제3금속을 증착하여 T형 게이트를 형성하는 제5단계를 포함하여 이루어짐을 특징으로 한다.

Description

자가정렬형 티(T)형 게이트 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 (a)~(l)은 종래 자가정렬형 T형 게이트 제조방법을 나타낸 공정단면도.
제2도는 (a)~(j)는 본 발명의 자가정렬형 T형 게이트 제조방법을 나타낸 공정단면도.

Claims (10)

  1. 기판상에 절연막, 제1금속층, 제1감광막을 차례로 형성한 후 상기 제1감광막을 패터닝하는 제1단계, 상기 제1감광막 패턴 하부에서 메사(Mesa)형태로 언더컷되도록 상기 제1금속층을 선택적으로 제거하여 게이트 패턴을 형성하고, 상기 절연막을 상기 제1금속층과 동일 형태로 제1금속층 하부에서 언더컷되도록 선택적으로 제거하여 오믹전극 영역을 패터닝하는 제2단계, 상기 오믹전극 영역에 제2금속을 증착하여 오믹전극을 형성한 후 상기 제1금속층을 중심으로 좌,우 비대칭되도록 상기 절연막을 선택적으로 제거하는 제3단계, 상기 제1금속층을 포함한 전면에 제2감광막을 도포한 후 상기 제1금속층의 표면에 노출될 때까지 제2감광막을 제거하는 제4단계, 상기 제1금속층을 제거하고 상기 절연막을 선택적으로 제거하여 게이트 전극 영역을 형성하고, 상기 게이트 전극 영역에 제3금속을 증착하여 T형 게이트를 형성하는 제5단계를 포함하여 이루어짐을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  2. 제1항에 있어서, 상기 절연막과 제1금속층은 서로 식각 선택비를 달리함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  3. 제1항에 있어서, 상기 게이트 패턴 형성을 위한 제1금속층은 Cl 계통의 가스를 이용하여 식각함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  4. 제1항에 있어서, 상기 오믹전극 영역 형성을 위한 절연막의 식각은 CF4계통의 가스를 이용함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  5. 제1항 및 제4항에 있어서, 상기 절연막은 플라즈마 손상을 감소시키기 위해 ECR(Electron Cyclotron Resonance) 장비를 사용함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  6. 제1항에 있어서, 상기 제2금속층 AuGe, Ni, Au 등을 사용한 것을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  7. 제1항에 있어서, 제5단계는 제1금속층의 표면이 노출될 때까지 제2감광막을 제거하는 단계, 상기 제1금속층을 제거하고 상기 절연막을 건식식각한 다음, 건식 및 습식식각을 통해 기판의 소정깊이까지 제거하는 단계, 상기 제2감광막의 첨예화된 부분을 제거한 후 T형 게이트용 금속을 증착하는 단계를 포함하여 이루어짐을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  8. 제1항에 있어서, 상기 제3금속은 Ti, Pt, Au 등을 사용하는 것을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  9. 제1항에 있어서, 상기 절연막이 제1금속층을 중심으로 좌,우 대칭되도록 패터닝함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
  10. 제1항 및 제7항에 있어서, 제2감광막은 O2를 이용한 반응성 이온식각 공정을 통해 제거함을 특징으로 하는 자가정렬형 T형 게이트 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950069310A 1995-12-30 1995-12-30 자가정렬형 티형 게이트 제조방법 KR0179116B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950069310A KR0179116B1 (ko) 1995-12-30 1995-12-30 자가정렬형 티형 게이트 제조방법
US08/781,900 US5773333A (en) 1995-12-30 1996-12-30 Method for manufacturing self-aligned T-type gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950069310A KR0179116B1 (ko) 1995-12-30 1995-12-30 자가정렬형 티형 게이트 제조방법

Publications (2)

Publication Number Publication Date
KR970054403A true KR970054403A (ko) 1997-07-31
KR0179116B1 KR0179116B1 (ko) 1999-03-20

Family

ID=19448406

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950069310A KR0179116B1 (ko) 1995-12-30 1995-12-30 자가정렬형 티형 게이트 제조방법

Country Status (2)

Country Link
US (1) US5773333A (ko)
KR (1) KR0179116B1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963806A (en) 1996-12-09 1999-10-05 Mosel Vitelic, Inc. Method of forming memory cell with built-in erasure feature
US6773944B2 (en) * 2001-11-07 2004-08-10 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
JP4191096B2 (ja) * 2003-07-18 2008-12-03 Ｔｄｋ株式会社 磁性材を含む被加工体の加工方法及び磁気記録媒体の製造方法
US7045404B2 (en) * 2004-01-16 2006-05-16 Cree, Inc. Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof
US20060009038A1 (en) * 2004-07-12 2006-01-12 International Business Machines Corporation Processing for overcoming extreme topography
DE102007006640A1 (de) * 2007-02-06 2008-08-07 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Aufbringen einer Struktur auf ein Halbleiterbauelement
CN101217153B (zh) * 2008-01-18 2012-02-29 友达光电股份有限公司 主动元件阵列结构及其制造方法
US9443957B1 (en) 2015-03-12 2016-09-13 International Business Machines Corporation Self-aligned source and drain regions for semiconductor devices

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7412383A (nl) * 1974-09-19 1976-03-23 Philips Nv Werkwijze voor het vervaardigen van een in- richting met een geleiderpatroon.
US4767721A (en) * 1986-02-10 1988-08-30 Hughes Aircraft Company Double layer photoresist process for well self-align and ion implantation masking
US4700462A (en) * 1986-10-08 1987-10-20 Hughes Aircraft Company Process for making a T-gated transistor
US4731340A (en) * 1987-02-24 1988-03-15 Rockwell International Corporation Dual lift-off self aligning process for making heterojunction bipolar transistors
JPH0279437A (ja) * 1988-09-14 1990-03-20 Mitsubishi Electric Corp 半導体装置の製造方法
JPH06140434A (ja) * 1992-10-26 1994-05-20 Mitsubishi Electric Corp 電界効果型トランジスタの製造方法

Also Published As

Publication number Publication date
US5773333A (en) 1998-06-30
KR0179116B1 (ko) 1999-03-20

Similar Documents

Publication Publication Date Title
US4839304A (en) Method of making a field effect transistor with overlay gate structure
US4956314A (en) Differential etching of silicon nitride
KR940001443A (ko) T형 단면구조의게이트 금속전극을 갖는 전계효과 트랜지스터의 제조방법
US20080124852A1 (en) Method of forming T- or gamma-shaped electrode
KR970054403A (ko) 자가정렬형 티(t)형 게이트 제조방법
US5376812A (en) Semiconductor device
US6051484A (en) Semiconductor device and method of manufacturing thereof
JPS57103364A (en) Preparation of field-effect trasistor
JPH03278543A (ja) 電界効果トランジスタの製造方法
JPH06333955A (ja) 電界効果トランジスタ及びその製造方法
JPH01194475A (ja) 電界効果トランジスタ及びその製造方法
KR100264532B1 (ko) 모드 또는 문턱전압이 각기 다른 전계효과 트랜지스터 제조 방법
JPH04137737A (ja) 半導体装置の製造方法
JP2822956B2 (ja) 化合物半導体装置の製造方法
KR100217140B1 (ko) 박막트랜지스터의 제조방법
JPH0684951A (ja) 半導体装置の製造方法
KR0172293B1 (ko) 반도체 장치의 콘택홀 형성방법
JPH05283429A (ja) 薄膜トランジスタ装置の製造方法
JPH0677254A (ja) 電極の形成方法
JPH03268332A (ja) 半導体装置の製造方法
JPH1012632A (ja) 半導体装置の製造方法
JPS6279677A (ja) 半導体装置の製造方法
JPH04354123A (ja) ドライエッチング方法
KR970067638A (ko) 반도체장치의 콘택홀 형성방법
KR940004842A (ko) 포토리소그래피 공정을 줄인 박막트랜지스터의 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20010926

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee