KR970000330B1 - 리프레시기능 개선형 반도체 기억장치 - Google Patents

리프레시기능 개선형 반도체 기억장치 Download PDF

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Publication number
KR970000330B1
KR970000330B1 KR1019900000758A KR900000758A KR970000330B1 KR 970000330 B1 KR970000330 B1 KR 970000330B1 KR 1019900000758 A KR1019900000758 A KR 1019900000758A KR 900000758 A KR900000758 A KR 900000758A KR 970000330 B1 KR970000330 B1 KR 970000330B1
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KR
South Korea
Prior art keywords
memory
refresh
write
blocks
sense amplifier
Prior art date
Application number
KR1019900000758A
Other languages
English (en)
Korean (ko)
Other versions
KR900012275A (ko
Inventor
히로노리 아까마쯔
아끼노리 시바야마
히사가즈 고따니
준꼬 마쯔시마
Original Assignee
마쓰시다 덴기 산교 가부시기가이샤
다니이 아끼오
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 마쓰시다 덴기 산교 가부시기가이샤, 다니이 아끼오 filed Critical 마쓰시다 덴기 산교 가부시기가이샤
Publication of KR900012275A publication Critical patent/KR900012275A/ko
Application granted granted Critical
Publication of KR970000330B1 publication Critical patent/KR970000330B1/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08Control thereof

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR1019900000758A 1989-01-23 1990-01-23 리프레시기능 개선형 반도체 기억장치 KR970000330B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1013818A JP2574444B2 (ja) 1989-01-23 1989-01-23 半導体記憶装置
JP1-13818 1989-01-23

Publications (2)

Publication Number Publication Date
KR900012275A KR900012275A (ko) 1990-08-03
KR970000330B1 true KR970000330B1 (ko) 1997-01-08

Family

ID=11843863

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900000758A KR970000330B1 (ko) 1989-01-23 1990-01-23 리프레시기능 개선형 반도체 기억장치

Country Status (2)

Country Link
JP (1) JP2574444B2 (ja)
KR (1) KR970000330B1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100499621B1 (ko) * 1997-12-24 2005-09-08 주식회사 하이닉스반도체 액세스타임향상용반도체메모리장치

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100455372B1 (ko) * 1997-11-03 2004-12-17 삼성전자주식회사 자동 리프레쉬 수행시간이 감소될 수 있는 싱크로너스 디램

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6168797A (ja) * 1984-09-11 1986-04-09 Nec Corp ダイナミックメモリ回路
JPS62259294A (ja) * 1986-05-06 1987-11-11 Toshiba Corp 半導体記憶装置
JPS6336079A (ja) * 1986-07-29 1988-02-16 Matsushita Electric Ind Co Ltd チユ−ビング式液体ポンプの制御方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100499621B1 (ko) * 1997-12-24 2005-09-08 주식회사 하이닉스반도체 액세스타임향상용반도체메모리장치

Also Published As

Publication number Publication date
JPH02195593A (ja) 1990-08-02
JP2574444B2 (ja) 1997-01-22
KR900012275A (ko) 1990-08-03

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