KR960006341B1 - Removing method of small pocket - Google Patents

Removing method of small pocket Download PDF

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Publication number
KR960006341B1
KR960006341B1 KR1019920009646A KR920009646A KR960006341B1 KR 960006341 B1 KR960006341 B1 KR 960006341B1 KR 1019920009646 A KR1019920009646 A KR 1019920009646A KR 920009646 A KR920009646 A KR 920009646A KR 960006341 B1 KR960006341 B1 KR 960006341B1
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South Korea
Prior art keywords
film
insulating film
cleaning process
forming
insulation film
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KR1019920009646A
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Korean (ko)
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KR940001313A (en
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박해성
이헌철
손곤
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현대전자산업주식회사
김주용
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Priority to KR1019920009646A priority Critical patent/KR960006341B1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Abstract

forming a conduction film pattern of a predetermined size on an insulation film, and forming a second insulation film being the same material as the first insulation film over the resulting structure; and forming the remnant second insulation film, for preventing generation of under-cut in cleaning process, on side wall of the conduction film pattern by anisotropic etching of the second insulation film. The anisotropic etching process is easily applicable to manufacture of high integration element, and prevention of element demage by etching the remnant increases reliability of semiconductor device.

Description

반도체 소자의 스몰포제거 방법Small desorption method of semiconductor device

제1도는 종래기술에 따른 반도체 소자 제조 공정도,1 is a semiconductor device manufacturing process chart according to the prior art,

제2도는 본 발명의 일실시예에 따른 반도체 소자 제조 공정도.2 is a semiconductor device manufacturing process diagram according to an embodiment of the present invention.

* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

l,3,8:산화막 2,4:폴리실리콘막l, 3,8 oxide film 2,4 polysilicon film

5:감광막 4a:잔류폴리실리콘막5: photosensitive film 4a: residual polysilicon film

7:잔류산화막 8a:잔류 산화막.7: residual oxide film 8a: residual oxide film.

본 발명은 에치백(etch-back)기술을 이용하여 단차상의 차이로 인해 형성되는 스몰포제거 방법에 관한 것으로, 특히 식각 공정 이전에 행하여지는 세정 공정시 생기는 언더컷(under cut) 발생에 의해 생성되는 스몰포제거 방법에 관한 것이다.The present invention is a small cloth formed by the difference in the stepped phase using the etch-back technology The method relates to the removal method, in particular, a small cloth produced by the occurrence of under cut generated during the cleaning process performed before the etching process. It is about a removal method.

일반적으로, 반도체 공정은 집적도가 높아질수록 디자인 규칙이 더욱더 미세해지며, 미세선폭 가공을 기술이 주요 과제임은 이미 알려진 사실이다. 이에 따른 소자의 제작은 일정한 공정을 거친 후 드러난 표면에 산화막이 있는 상태에서 식각 장애물질 또는 비트선 형성 등의 목적으로 폴리실리콘막을 증착하고 패턴을 형성하고 다음 세정을 실시하고 산화막을 형성한 후에 또다시 폴리실리콘막을 증착하여 패턴 하는 공정이 이루어지게 된다.In general, it is already known that the higher the integration level, the finer the design rules become, and that the technology is a major challenge for fine line width processing. According to the fabrication of the device, a polysilicon film is deposited, a pattern is formed, the next cleaning is performed, and an oxide film is formed for the purpose of etching obstacles or bit line formation with an oxide film on the surface exposed after a certain process. The process of depositing a polysilicon film again is performed.

종래기술에 따른 반도체 소자 제조 공정을 첨부된 도면 제1도를 참조하여 자세히 설명하면, 제l도는 종래의 식각 공정도로서, 1,3은 산화막, 2,4는 폴리실리콘막, 5는 감광막, 4a는 식가 잔류물을 각각 나타낸다.The semiconductor device manufacturing process according to the prior art will be described in detail with reference to the accompanying drawings of FIG. 1, where FIG. 1 is a conventional etching process diagram, 1,3 is an oxide film, 2,4 is a polysilicon film, 5 is a photoresist film, and 4a. Denotes a dietary residue, respectively.

먼저, 제1도(a)는 산화막(1)상에 폴리실리콘막(2)이 소정의 크기로 패터닝된 상태이다.First, in FIG. 1A, the polysilicon film 2 is patterned to a predetermined size on the oxide film 1.

이어서, 제1도(b)는 폴리실리콘막 패터닝을 위한 공정(마스크 및 식각 공정)시에 발생한 불순물을 제거하기 위하여 습식 세정 공정을 실시한 상태로서, 도면에 도시된 바와 같이 산화막(1)에 대한 식각이 부수적으로 행하여져 폴리실리콘막 패턴(2) 측벽하부로 산화막이 식각되어 파고들어간 스몰포(small pocket)이 발생된다.Subsequently, FIG. 1B illustrates a wet cleaning process in order to remove impurities generated during a process (mask and etching process) for polysilicon film patterning, and as shown in FIG. Small etch is incidentally performed and the oxide film is etched and penetrated under the sidewall of the polysilicon film pattern 2 (small pocket) occurs.

이 스몰포은 세정 공정시시 케미컬에 의해 먼저 패턴된 상기 폴리실리콘막(2)의 측벽 하단 부위의 상기 산화막(1)이 식각 되게 되는데, 이는 습식 세정 공정시 케미컬에 의해 등방성 식각이 일어나기 매문이다.The small In the cleaning process, the oxide film 1 at the lower end portion of the sidewall of the polysilicon film 2 patterned by the chemical is etched. This is because isotropic etching occurs by the chemical during the wet cleaning process.

이어서, 제1도(c)와 같이 전체구조 상부에 산화막(3) 및 폴리실리콘막(4)을 다시 증착하고 감광막(5)을 도포하고 상기 폴리실리콘막(4)을 패턴하게 되는데, 상기 세정 공정시 형성된 스몰포에 식각되지 않는 잔류 폴리실리콘막(4a)이 발생하게 된다.Subsequently, as shown in FIG. 1C, the oxide film 3 and the polysilicon film 4 are again deposited on the entire structure, the photosensitive film 5 is applied, and the polysilicon film 4 is patterned. Small foam formed during the process Residual polysilicon film 4a that is not etched is generated.

기 종래의 기술 방법에 있어서 상기 스몰포은 주로 미세패턴 형성시 요구되는 비등방성 식각을 할 경우 상기 잔류물의 존재하게 되어 브릿지 발생등 소자의 불량을 야기시키는 단점을 가지는 문제점이 있다.In the conventional method, the small When the anisotropic etching is required when forming a fine pattern, there is a problem in that the presence of the residue causes a defect of a device such as a bridge generation.

상기 문제점을 해결하기 위해 안출된 본 발명은 세정 공정시 발생하는 스몰포을 제거하여 고집적 소자제작에 요구되는 비등방성 식각시 잔류물 형성을 미연에 방지하는 반도체 소자의 스몰포제거 방법을 제공하는데 그 목적이 있다.The present invention devised to solve the above problems is a small foam generated during the cleaning process Small semiconductor device that prevents residue formation during anisotropic etching required for high density device fabrication The purpose is to provide a removal method.

상기 목적을 달성하기 위하여 본 발명은, 제1절연막 상에 소정크기의 전도막 패턴을 형성한 다음 세정공정이 이루어지는 반도체 소자 제조 방법에 있어서, 제1절연막 상에 소정크기의 전도막 패턴을 형성한 다음 천체구조 상부예 상기 제1절연막과 동일물질인 제2절연막을 형성하는 단계; 상기 제2절연막을 비등방성전면식각하여 이후의 세정 공정시 언더컷 발생을 방지하는 잔류 제2절연막을 상기 전도막 패턴 측벽에 형성하되 이후의 세정 공정시 예상되는 식각량만큼의 크기로 잔류제2절연막을 형셩하는 단계, 및 세정공정을 실시하는 단계를 포함하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device in which a conductive film pattern having a predetermined size is formed on a first insulating film, and then a cleaning process is performed, wherein a conductive film pattern having a predetermined size is formed on the first insulating film. Forming a second insulating film of the same material as the first insulating film; A second insulating film is anisotropically etched to form a residual second insulating film on the sidewalls of the conductive film pattern to prevent undercuts in the subsequent cleaning process, and the remaining second insulating film is formed to the same amount as the etching amount expected in the subsequent cleaning process. And forming a washing step.

이하, 첨부된 도면 제2도를 참조하여 본 발명에 따른 일실시에를 자세히 설명하면, 제2도는 본 발명에 따른 식각 공정도로서, 도면에서 1,3,8은 산화막, 2,4는 폴리실리콘막, 5는 감광막, 8a는 잔류산화막을 각각 나타낸다.Hereinafter, an embodiment according to the present invention will be described in detail with reference to FIG. 2, FIG. 2 is an etching process diagram according to the present invention, in which 1, 3, and 8 are oxide films and 2 and 4 are polysilicon. Film 5 is a photosensitive film and 8a a residual oxide film, respectively.

우선, 제2도(a)와 같이 산화막(1)상에 폴리실리콘막(2)을 증착시키고 상기 폴리실리콘막(2)에 불순물을주입한 다음, 상기 폴리실러큰막(2)을 계획왼 소정의 크기로 패터닝 한다.First, as shown in FIG. 2A, a polysilicon film 2 is deposited on the oxide film 1, and impurities are injected into the polysilicon film 2, and then the polysilicon film 2 is left as planned. Pattern to the size of.

이어서, 제2도(b)와 같이 전체구조 상부에 산화막(8)을 증착한다.Next, an oxide film 8 is deposited on the entire structure as shown in FIG.

이어서, 제2도(c)와 같이 상기 산화막(8)을 비등방성 전면 식각으로 에치백(etch-back)하여 상기 폴리실리콘막 패턴(2) 측벽에 잔류산화막(8a)을 형성한다.Subsequently, as shown in FIG. 2C, the oxide layer 8 is etched back by anisotropic front etching to form a residual oxide layer 8a on the sidewall of the polysilicon layer pattern 2.

이어서, 제2도(d)는 세정을 실시한 상태의 단면도로서, 상기 폴리실리콘막 패턴(2) 측벽에 형성된 잔류산화막(8a)에 의해 스몰포이 발생하지 않게 된다.Next, FIG. 2D is a cross-sectional view of the cleaning state, which is formed by the residual oxide film 8a formed on the sidewall of the polysilicon film pattern 2. This will not happen.

끝으로, 산화막(3), 폴리실리콘막(4)을 순서적으로 증착하고 상기 증착한 폴리실리콘막(4)에 불순물을 주입하고 감광막(5) 패턴을 형성하여 상기 폴리실리콘막(4)을 선택식각 하면, 도면에 도시된 바와 같이 스몰포이 발생하지 않은 이유로 잔류 폴리실리콘막도 형성되지 않게 된다.Finally, the oxide film 3 and the polysilicon film 4 are sequentially deposited and impurities are injected into the deposited polysilicon film 4 to form a photosensitive film 5 pattern to form the polysilicon film 4. When selective etching, as shown in the drawing small For this reason, no residual polysilicon film is formed.

상기 본 발명의 일실시예의 작용을 자세히 살펴보면 다음과 같다.Looking at the operation of the embodiment of the present invention in detail as follows.

종래의 문제점인 스몰포발생은 세정공정시 사용하는 화학물질의 특성상 등방성식각 특성을 갖기 때문에 발생하는 것으로, 세정 공정전에 2단계의 공정을 추가함으로써 상기 종래의 문제점을 억제하는 것이다.Small problem that is a conventional problem The occurrence occurs because of the isotropic etching characteristic due to the characteristics of the chemicals used in the cleaning process, and the conventional problem is suppressed by adding a two-step process before the cleaning process.

즉, 세정공정시 발생하는 언더컷 식각량만큼 폴리실리콘막 측벽에 잔류 산화막(8a)을 형성하여 두는 것이다. 그리고 일예로써, 통상적인 세정공정은 약 200Å두께 이하의 산학막을 식각하는 것이 일반적이며 이경우에는 상기 스몰포예상 지역에 200Å의 잔류산화막(8a)을 형성시켜 세정시 스몰포의 발생을 미연에 방지하게 된다.That is, the residual oxide film 8a is formed on the sidewalls of the polysilicon film by the amount of undercut etching generated during the cleaning process. And, for example, in the general cleaning process, it is common to etch an industrial film of about 200 mm thickness or less, in this case, the small cloth Small deposit during cleaning by forming 200 잔류 residual oxide film 8a in the expected area To prevent the occurrence of.

상기와 같이 이루어지는 본 발명은 세정공정에 의한 스몰포을 방지할 수 있어 고집적 소자 제조에 필요한 비등방성 식각의 적용에 용이하고 또한 식각 잔류물에 의한 소자의 손상을 막아 소자의 신뢰도를 증가시킬 수 있는 효과가 있다.The present invention made as described above is a small cloth by the washing step Since it is possible to prevent the anisotropic etching required for high-density device fabrication, there is an effect that can increase the reliability of the device by preventing damage to the device by the etching residue.

Claims (2)

제1절연막 상에 소정크기의 전도막 패턴을 형성한 다음 세정공정이 이루어지는 반도체 소자 제조 방법에 있어서, 제1절연막 상에 소정크기의 전도막 패턴을 형성한 다음 전체구조 상부에 상기 제1절연막과 동일물질인 제2절연막을 형성하는 단계; 상기 제2절연막을 비등방성 전면식각하여 이후의 세정 공정시언더컷 발생을 방지하는 잔류제2절연막을 상기 전도막 패턴 측벽에 형성하되 이후의 세정 공정시 예상되는식각량만큼의 크기로 잔류제2절연막을 형성하는 단계; 및 세정공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 스몰포제거 방법.A method of manufacturing a semiconductor device in which a conductive film pattern having a predetermined size is formed on a first insulating film, and then a cleaning process is performed. A conductive film pattern having a predetermined size is formed on a first insulating film, and then the first insulating film is formed over the entire structure. Forming a second insulating film of the same material; A second insulating film is anisotropically etched to form a second insulating film on the sidewalls of the conductive film pattern to prevent undercuts in the subsequent cleaning process, and the remaining second insulating film is about the same amount as the etching amount expected in the subsequent cleaning process. Forming a; And performing a cleaning process. How to remove. 제1항에 있어서, 상기 잔류 제 2절연막 200Å 이하의 두께를 가지는 것을 특징으로 하는 반도체 소자의 스몰포제거 방법.The small size of the semiconductor device according to claim 1, wherein the semiconductor device has a thickness of 200 잔류 or less of the residual second insulating film. How to remove.
KR1019920009646A 1992-06-03 1992-06-03 Removing method of small pocket KR960006341B1 (en)

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